1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This software is available to you under a choice of one of two
5*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU
6*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file
7*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the
8*4882a593Smuzhiyun * OpenIB.org BSD license below:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or
11*4882a593Smuzhiyun * without modification, are permitted provided that the following
12*4882a593Smuzhiyun * conditions are met:
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * - Redistributions of source code must retain the above
15*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
16*4882a593Smuzhiyun * disclaimer.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above
19*4882a593Smuzhiyun * copyright notice, this list of conditions and the following
20*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials
21*4882a593Smuzhiyun * provided with the distribution.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30*4882a593Smuzhiyun * SOFTWARE.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun #ifndef _CHELSIO_L2T_H
33*4882a593Smuzhiyun #define _CHELSIO_L2T_H
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #include <linux/spinlock.h>
36*4882a593Smuzhiyun #include "t3cdev.h"
37*4882a593Smuzhiyun #include <linux/atomic.h>
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun enum {
40*4882a593Smuzhiyun L2T_STATE_VALID, /* entry is up to date */
41*4882a593Smuzhiyun L2T_STATE_STALE, /* entry may be used but needs revalidation */
42*4882a593Smuzhiyun L2T_STATE_RESOLVING, /* entry needs address resolution */
43*4882a593Smuzhiyun L2T_STATE_UNUSED /* entry not in use */
44*4882a593Smuzhiyun };
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun struct neighbour;
47*4882a593Smuzhiyun struct sk_buff;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun /*
50*4882a593Smuzhiyun * Each L2T entry plays multiple roles. First of all, it keeps state for the
51*4882a593Smuzhiyun * corresponding entry of the HW L2 table and maintains a queue of offload
52*4882a593Smuzhiyun * packets awaiting address resolution. Second, it is a node of a hash table
53*4882a593Smuzhiyun * chain, where the nodes of the chain are linked together through their next
54*4882a593Smuzhiyun * pointer. Finally, each node is a bucket of a hash table, pointing to the
55*4882a593Smuzhiyun * first element in its chain through its first pointer.
56*4882a593Smuzhiyun */
57*4882a593Smuzhiyun struct l2t_entry {
58*4882a593Smuzhiyun u16 state; /* entry state */
59*4882a593Smuzhiyun u16 idx; /* entry index */
60*4882a593Smuzhiyun u32 addr; /* dest IP address */
61*4882a593Smuzhiyun int ifindex; /* neighbor's net_device's ifindex */
62*4882a593Smuzhiyun u16 smt_idx; /* SMT index */
63*4882a593Smuzhiyun u16 vlan; /* VLAN TCI (id: bits 0-11, prio: 13-15 */
64*4882a593Smuzhiyun struct neighbour *neigh; /* associated neighbour */
65*4882a593Smuzhiyun struct l2t_entry *first; /* start of hash chain */
66*4882a593Smuzhiyun struct l2t_entry *next; /* next l2t_entry on chain */
67*4882a593Smuzhiyun struct sk_buff_head arpq; /* queue of packets awaiting resolution */
68*4882a593Smuzhiyun spinlock_t lock;
69*4882a593Smuzhiyun atomic_t refcnt; /* entry reference count */
70*4882a593Smuzhiyun u8 dmac[6]; /* neighbour's MAC address */
71*4882a593Smuzhiyun };
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun struct l2t_data {
74*4882a593Smuzhiyun unsigned int nentries; /* number of entries */
75*4882a593Smuzhiyun struct l2t_entry *rover; /* starting point for next allocation */
76*4882a593Smuzhiyun atomic_t nfree; /* number of free entries */
77*4882a593Smuzhiyun rwlock_t lock;
78*4882a593Smuzhiyun struct rcu_head rcu_head; /* to handle rcu cleanup */
79*4882a593Smuzhiyun struct l2t_entry l2tab[];
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun typedef void (*arp_failure_handler_func)(struct t3cdev * dev,
83*4882a593Smuzhiyun struct sk_buff * skb);
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * Callback stored in an skb to handle address resolution failure.
87*4882a593Smuzhiyun */
88*4882a593Smuzhiyun struct l2t_skb_cb {
89*4882a593Smuzhiyun arp_failure_handler_func arp_failure_handler;
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun #define L2T_SKB_CB(skb) ((struct l2t_skb_cb *)(skb)->cb)
93*4882a593Smuzhiyun
set_arp_failure_handler(struct sk_buff * skb,arp_failure_handler_func hnd)94*4882a593Smuzhiyun static inline void set_arp_failure_handler(struct sk_buff *skb,
95*4882a593Smuzhiyun arp_failure_handler_func hnd)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun L2T_SKB_CB(skb)->arp_failure_handler = hnd;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*
101*4882a593Smuzhiyun * Getting to the L2 data from an offload device.
102*4882a593Smuzhiyun */
103*4882a593Smuzhiyun #define L2DATA(cdev) (rcu_dereference((cdev)->l2opt))
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun #define W_TCB_L2T_IX 0
106*4882a593Smuzhiyun #define S_TCB_L2T_IX 7
107*4882a593Smuzhiyun #define M_TCB_L2T_IX 0x7ffULL
108*4882a593Smuzhiyun #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX)
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun void t3_l2e_free(struct l2t_data *d, struct l2t_entry *e);
111*4882a593Smuzhiyun void t3_l2t_update(struct t3cdev *dev, struct neighbour *neigh);
112*4882a593Smuzhiyun struct l2t_entry *t3_l2t_get(struct t3cdev *cdev, struct dst_entry *dst,
113*4882a593Smuzhiyun struct net_device *dev, const void *daddr);
114*4882a593Smuzhiyun int t3_l2t_send_slow(struct t3cdev *dev, struct sk_buff *skb,
115*4882a593Smuzhiyun struct l2t_entry *e);
116*4882a593Smuzhiyun void t3_l2t_send_event(struct t3cdev *dev, struct l2t_entry *e);
117*4882a593Smuzhiyun struct l2t_data *t3_init_l2t(unsigned int l2t_capacity);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun int cxgb3_ofld_send(struct t3cdev *dev, struct sk_buff *skb);
120*4882a593Smuzhiyun
l2t_send(struct t3cdev * dev,struct sk_buff * skb,struct l2t_entry * e)121*4882a593Smuzhiyun static inline int l2t_send(struct t3cdev *dev, struct sk_buff *skb,
122*4882a593Smuzhiyun struct l2t_entry *e)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun if (likely(e->state == L2T_STATE_VALID))
125*4882a593Smuzhiyun return cxgb3_ofld_send(dev, skb);
126*4882a593Smuzhiyun return t3_l2t_send_slow(dev, skb, e);
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
l2t_release(struct t3cdev * t,struct l2t_entry * e)129*4882a593Smuzhiyun static inline void l2t_release(struct t3cdev *t, struct l2t_entry *e)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun struct l2t_data *d;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun rcu_read_lock();
134*4882a593Smuzhiyun d = L2DATA(t);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun if (atomic_dec_and_test(&e->refcnt) && d)
137*4882a593Smuzhiyun t3_l2e_free(d, e);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun rcu_read_unlock();
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
l2t_hold(struct l2t_data * d,struct l2t_entry * e)142*4882a593Smuzhiyun static inline void l2t_hold(struct l2t_data *d, struct l2t_entry *e)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun if (d && atomic_add_return(1, &e->refcnt) == 1) /* 0 -> 1 transition */
145*4882a593Smuzhiyun atomic_dec(&d->nfree);
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #endif
149