1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Copyright (c) 2003-2008 Chelsio, Inc. All rights reserved. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * This software is available to you under a choice of one of two 5*4882a593Smuzhiyun * licenses. You may choose to be licensed under the terms of the GNU 6*4882a593Smuzhiyun * General Public License (GPL) Version 2, available from the file 7*4882a593Smuzhiyun * COPYING in the main directory of this source tree, or the 8*4882a593Smuzhiyun * OpenIB.org BSD license below: 9*4882a593Smuzhiyun * 10*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or 11*4882a593Smuzhiyun * without modification, are permitted provided that the following 12*4882a593Smuzhiyun * conditions are met: 13*4882a593Smuzhiyun * 14*4882a593Smuzhiyun * - Redistributions of source code must retain the above 15*4882a593Smuzhiyun * copyright notice, this list of conditions and the following 16*4882a593Smuzhiyun * disclaimer. 17*4882a593Smuzhiyun * 18*4882a593Smuzhiyun * - Redistributions in binary form must reproduce the above 19*4882a593Smuzhiyun * copyright notice, this list of conditions and the following 20*4882a593Smuzhiyun * disclaimer in the documentation and/or other materials 21*4882a593Smuzhiyun * provided with the distribution. 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24*4882a593Smuzhiyun * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25*4882a593Smuzhiyun * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26*4882a593Smuzhiyun * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27*4882a593Smuzhiyun * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28*4882a593Smuzhiyun * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29*4882a593Smuzhiyun * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30*4882a593Smuzhiyun * SOFTWARE. 31*4882a593Smuzhiyun */ 32*4882a593Smuzhiyun #ifndef __CHIOCTL_H__ 33*4882a593Smuzhiyun #define __CHIOCTL_H__ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* 36*4882a593Smuzhiyun * Ioctl commands specific to this driver. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun enum { 39*4882a593Smuzhiyun CHELSIO_GETMTUTAB = 1029, 40*4882a593Smuzhiyun CHELSIO_SETMTUTAB = 1030, 41*4882a593Smuzhiyun CHELSIO_SET_PM = 1032, 42*4882a593Smuzhiyun CHELSIO_GET_PM = 1033, 43*4882a593Smuzhiyun CHELSIO_GET_MEM = 1038, 44*4882a593Smuzhiyun CHELSIO_LOAD_FW = 1041, 45*4882a593Smuzhiyun CHELSIO_SET_TRACE_FILTER = 1044, 46*4882a593Smuzhiyun CHELSIO_SET_QSET_PARAMS = 1045, 47*4882a593Smuzhiyun CHELSIO_GET_QSET_PARAMS = 1046, 48*4882a593Smuzhiyun CHELSIO_SET_QSET_NUM = 1047, 49*4882a593Smuzhiyun CHELSIO_GET_QSET_NUM = 1048, 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun struct ch_reg { 53*4882a593Smuzhiyun uint32_t cmd; 54*4882a593Smuzhiyun uint32_t addr; 55*4882a593Smuzhiyun uint32_t val; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun struct ch_cntxt { 59*4882a593Smuzhiyun uint32_t cmd; 60*4882a593Smuzhiyun uint32_t cntxt_type; 61*4882a593Smuzhiyun uint32_t cntxt_id; 62*4882a593Smuzhiyun uint32_t data[4]; 63*4882a593Smuzhiyun }; 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* context types */ 66*4882a593Smuzhiyun enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun struct ch_desc { 69*4882a593Smuzhiyun uint32_t cmd; 70*4882a593Smuzhiyun uint32_t queue_num; 71*4882a593Smuzhiyun uint32_t idx; 72*4882a593Smuzhiyun uint32_t size; 73*4882a593Smuzhiyun uint8_t data[128]; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun struct ch_mem_range { 77*4882a593Smuzhiyun uint32_t cmd; 78*4882a593Smuzhiyun uint32_t mem_id; 79*4882a593Smuzhiyun uint32_t addr; 80*4882a593Smuzhiyun uint32_t len; 81*4882a593Smuzhiyun uint32_t version; 82*4882a593Smuzhiyun uint8_t buf[]; 83*4882a593Smuzhiyun }; 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun struct ch_qset_params { 86*4882a593Smuzhiyun uint32_t cmd; 87*4882a593Smuzhiyun uint32_t qset_idx; 88*4882a593Smuzhiyun int32_t txq_size[3]; 89*4882a593Smuzhiyun int32_t rspq_size; 90*4882a593Smuzhiyun int32_t fl_size[2]; 91*4882a593Smuzhiyun int32_t intr_lat; 92*4882a593Smuzhiyun int32_t polling; 93*4882a593Smuzhiyun int32_t lro; 94*4882a593Smuzhiyun int32_t cong_thres; 95*4882a593Smuzhiyun int32_t vector; 96*4882a593Smuzhiyun int32_t qnum; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun struct ch_pktsched_params { 100*4882a593Smuzhiyun uint32_t cmd; 101*4882a593Smuzhiyun uint8_t sched; 102*4882a593Smuzhiyun uint8_t idx; 103*4882a593Smuzhiyun uint8_t min; 104*4882a593Smuzhiyun uint8_t max; 105*4882a593Smuzhiyun uint8_t binding; 106*4882a593Smuzhiyun }; 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun #ifndef TCB_SIZE 109*4882a593Smuzhiyun # define TCB_SIZE 128 110*4882a593Smuzhiyun #endif 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* TCB size in 32-bit words */ 113*4882a593Smuzhiyun #define TCB_WORDS (TCB_SIZE / 4) 114*4882a593Smuzhiyun 115*4882a593Smuzhiyun enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */ 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun struct ch_mtus { 118*4882a593Smuzhiyun uint32_t cmd; 119*4882a593Smuzhiyun uint32_t nmtus; 120*4882a593Smuzhiyun uint16_t mtus[NMTUS]; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun struct ch_pm { 124*4882a593Smuzhiyun uint32_t cmd; 125*4882a593Smuzhiyun uint32_t tx_pg_sz; 126*4882a593Smuzhiyun uint32_t tx_num_pg; 127*4882a593Smuzhiyun uint32_t rx_pg_sz; 128*4882a593Smuzhiyun uint32_t rx_num_pg; 129*4882a593Smuzhiyun uint32_t pm_total; 130*4882a593Smuzhiyun }; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun struct ch_tcam { 133*4882a593Smuzhiyun uint32_t cmd; 134*4882a593Smuzhiyun uint32_t tcam_size; 135*4882a593Smuzhiyun uint32_t nservers; 136*4882a593Smuzhiyun uint32_t nroutes; 137*4882a593Smuzhiyun uint32_t nfilters; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun struct ch_tcb { 141*4882a593Smuzhiyun uint32_t cmd; 142*4882a593Smuzhiyun uint32_t tcb_index; 143*4882a593Smuzhiyun uint32_t tcb_data[TCB_WORDS]; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun struct ch_tcam_word { 147*4882a593Smuzhiyun uint32_t cmd; 148*4882a593Smuzhiyun uint32_t addr; 149*4882a593Smuzhiyun uint32_t buf[3]; 150*4882a593Smuzhiyun }; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun struct ch_trace { 153*4882a593Smuzhiyun uint32_t cmd; 154*4882a593Smuzhiyun uint32_t sip; 155*4882a593Smuzhiyun uint32_t sip_mask; 156*4882a593Smuzhiyun uint32_t dip; 157*4882a593Smuzhiyun uint32_t dip_mask; 158*4882a593Smuzhiyun uint16_t sport; 159*4882a593Smuzhiyun uint16_t sport_mask; 160*4882a593Smuzhiyun uint16_t dport; 161*4882a593Smuzhiyun uint16_t dport_mask; 162*4882a593Smuzhiyun uint32_t vlan:12; 163*4882a593Smuzhiyun uint32_t vlan_mask:12; 164*4882a593Smuzhiyun uint32_t intf:4; 165*4882a593Smuzhiyun uint32_t intf_mask:4; 166*4882a593Smuzhiyun uint8_t proto; 167*4882a593Smuzhiyun uint8_t proto_mask; 168*4882a593Smuzhiyun uint8_t invert_match:1; 169*4882a593Smuzhiyun uint8_t config_tx:1; 170*4882a593Smuzhiyun uint8_t config_rx:1; 171*4882a593Smuzhiyun uint8_t trace_tx:1; 172*4882a593Smuzhiyun uint8_t trace_rx:1; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun #define SIOCCHIOCTL SIOCDEVPRIVATE 176*4882a593Smuzhiyun 177*4882a593Smuzhiyun #endif 178