1*4882a593Smuzhiyun /**********************************************************************
2*4882a593Smuzhiyun * Author: Cavium, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Contact: support@cavium.com
5*4882a593Smuzhiyun * Please include "LiquidIO" in the subject.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2003-2016 Cavium, Inc.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun * it under the terms of the GNU General Public License, Version 2, as
11*4882a593Smuzhiyun * published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*4882a593Smuzhiyun * NONINFRINGEMENT. See the GNU General Public License for more details.
17*4882a593Smuzhiyun ***********************************************************************/
18*4882a593Smuzhiyun #include <linux/pci.h>
19*4882a593Smuzhiyun #include <linux/netdevice.h>
20*4882a593Smuzhiyun #include "liquidio_common.h"
21*4882a593Smuzhiyun #include "octeon_droq.h"
22*4882a593Smuzhiyun #include "octeon_iq.h"
23*4882a593Smuzhiyun #include "response_manager.h"
24*4882a593Smuzhiyun #include "octeon_device.h"
25*4882a593Smuzhiyun #include "octeon_main.h"
26*4882a593Smuzhiyun #include "octeon_mailbox.h"
27*4882a593Smuzhiyun #include "cn23xx_pf_device.h"
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /**
30*4882a593Smuzhiyun * octeon_mbox_read:
31*4882a593Smuzhiyun * @mbox: Pointer mailbox
32*4882a593Smuzhiyun *
33*4882a593Smuzhiyun * Reads the 8-bytes of data from the mbox register
34*4882a593Smuzhiyun * Writes back the acknowldgement inidcating completion of read
35*4882a593Smuzhiyun */
octeon_mbox_read(struct octeon_mbox * mbox)36*4882a593Smuzhiyun int octeon_mbox_read(struct octeon_mbox *mbox)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun union octeon_mbox_message msg;
39*4882a593Smuzhiyun int ret = 0;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun spin_lock(&mbox->lock);
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun msg.u64 = readq(mbox->mbox_read_reg);
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun if ((msg.u64 == OCTEON_PFVFACK) || (msg.u64 == OCTEON_PFVFSIG)) {
46*4882a593Smuzhiyun spin_unlock(&mbox->lock);
47*4882a593Smuzhiyun return 0;
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
51*4882a593Smuzhiyun mbox->mbox_req.data[mbox->mbox_req.recv_len - 1] = msg.u64;
52*4882a593Smuzhiyun mbox->mbox_req.recv_len++;
53*4882a593Smuzhiyun } else {
54*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) {
55*4882a593Smuzhiyun mbox->mbox_resp.data[mbox->mbox_resp.recv_len - 1] =
56*4882a593Smuzhiyun msg.u64;
57*4882a593Smuzhiyun mbox->mbox_resp.recv_len++;
58*4882a593Smuzhiyun } else {
59*4882a593Smuzhiyun if ((mbox->state & OCTEON_MBOX_STATE_IDLE) &&
60*4882a593Smuzhiyun (msg.s.type == OCTEON_MBOX_REQUEST)) {
61*4882a593Smuzhiyun mbox->state &= ~OCTEON_MBOX_STATE_IDLE;
62*4882a593Smuzhiyun mbox->state |=
63*4882a593Smuzhiyun OCTEON_MBOX_STATE_REQUEST_RECEIVING;
64*4882a593Smuzhiyun mbox->mbox_req.msg.u64 = msg.u64;
65*4882a593Smuzhiyun mbox->mbox_req.q_no = mbox->q_no;
66*4882a593Smuzhiyun mbox->mbox_req.recv_len = 1;
67*4882a593Smuzhiyun } else {
68*4882a593Smuzhiyun if ((mbox->state &
69*4882a593Smuzhiyun OCTEON_MBOX_STATE_RESPONSE_PENDING) &&
70*4882a593Smuzhiyun (msg.s.type == OCTEON_MBOX_RESPONSE)) {
71*4882a593Smuzhiyun mbox->state &=
72*4882a593Smuzhiyun ~OCTEON_MBOX_STATE_RESPONSE_PENDING;
73*4882a593Smuzhiyun mbox->state |=
74*4882a593Smuzhiyun OCTEON_MBOX_STATE_RESPONSE_RECEIVING
75*4882a593Smuzhiyun ;
76*4882a593Smuzhiyun mbox->mbox_resp.msg.u64 = msg.u64;
77*4882a593Smuzhiyun mbox->mbox_resp.q_no = mbox->q_no;
78*4882a593Smuzhiyun mbox->mbox_resp.recv_len = 1;
79*4882a593Smuzhiyun } else {
80*4882a593Smuzhiyun writeq(OCTEON_PFVFERR,
81*4882a593Smuzhiyun mbox->mbox_read_reg);
82*4882a593Smuzhiyun mbox->state |= OCTEON_MBOX_STATE_ERROR;
83*4882a593Smuzhiyun spin_unlock(&mbox->lock);
84*4882a593Smuzhiyun return 1;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun }
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVING) {
91*4882a593Smuzhiyun if (mbox->mbox_req.recv_len < mbox->mbox_req.msg.s.len) {
92*4882a593Smuzhiyun ret = 0;
93*4882a593Smuzhiyun } else {
94*4882a593Smuzhiyun mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVING;
95*4882a593Smuzhiyun mbox->state |= OCTEON_MBOX_STATE_REQUEST_RECEIVED;
96*4882a593Smuzhiyun ret = 1;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun } else {
99*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVING) {
100*4882a593Smuzhiyun if (mbox->mbox_resp.recv_len <
101*4882a593Smuzhiyun mbox->mbox_resp.msg.s.len) {
102*4882a593Smuzhiyun ret = 0;
103*4882a593Smuzhiyun } else {
104*4882a593Smuzhiyun mbox->state &=
105*4882a593Smuzhiyun ~OCTEON_MBOX_STATE_RESPONSE_RECEIVING;
106*4882a593Smuzhiyun mbox->state |=
107*4882a593Smuzhiyun OCTEON_MBOX_STATE_RESPONSE_RECEIVED;
108*4882a593Smuzhiyun ret = 1;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun } else {
111*4882a593Smuzhiyun WARN_ON(1);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun writeq(OCTEON_PFVFACK, mbox->mbox_read_reg);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun spin_unlock(&mbox->lock);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return ret;
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /**
123*4882a593Smuzhiyun * octeon_mbox_write:
124*4882a593Smuzhiyun * @oct: Pointer Octeon Device
125*4882a593Smuzhiyun * @mbox_cmd: Cmd to send to mailbox.
126*4882a593Smuzhiyun *
127*4882a593Smuzhiyun * Populates the queue specific mbox structure
128*4882a593Smuzhiyun * with cmd information.
129*4882a593Smuzhiyun * Write the cmd to mbox register
130*4882a593Smuzhiyun */
octeon_mbox_write(struct octeon_device * oct,struct octeon_mbox_cmd * mbox_cmd)131*4882a593Smuzhiyun int octeon_mbox_write(struct octeon_device *oct,
132*4882a593Smuzhiyun struct octeon_mbox_cmd *mbox_cmd)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun struct octeon_mbox *mbox = oct->mbox[mbox_cmd->q_no];
135*4882a593Smuzhiyun u32 count, i, ret = OCTEON_MBOX_STATUS_SUCCESS;
136*4882a593Smuzhiyun long timeout = LIO_MBOX_WRITE_WAIT_TIME;
137*4882a593Smuzhiyun unsigned long flags;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun spin_lock_irqsave(&mbox->lock, flags);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun if ((mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) &&
142*4882a593Smuzhiyun !(mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED)) {
143*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
144*4882a593Smuzhiyun return OCTEON_MBOX_STATUS_FAILED;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if ((mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) &&
148*4882a593Smuzhiyun !(mbox->state & OCTEON_MBOX_STATE_IDLE)) {
149*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
150*4882a593Smuzhiyun return OCTEON_MBOX_STATUS_BUSY;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun if (mbox_cmd->msg.s.type == OCTEON_MBOX_REQUEST) {
154*4882a593Smuzhiyun memcpy(&mbox->mbox_resp, mbox_cmd,
155*4882a593Smuzhiyun sizeof(struct octeon_mbox_cmd));
156*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_RESPONSE_PENDING;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun count = 0;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun while (readq(mbox->mbox_write_reg) != OCTEON_PFVFSIG) {
164*4882a593Smuzhiyun schedule_timeout_uninterruptible(timeout);
165*4882a593Smuzhiyun if (count++ == LIO_MBOX_WRITE_WAIT_CNT) {
166*4882a593Smuzhiyun ret = OCTEON_MBOX_STATUS_FAILED;
167*4882a593Smuzhiyun break;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun if (ret == OCTEON_MBOX_STATUS_SUCCESS) {
172*4882a593Smuzhiyun writeq(mbox_cmd->msg.u64, mbox->mbox_write_reg);
173*4882a593Smuzhiyun for (i = 0; i < (u32)(mbox_cmd->msg.s.len - 1); i++) {
174*4882a593Smuzhiyun count = 0;
175*4882a593Smuzhiyun while (readq(mbox->mbox_write_reg) !=
176*4882a593Smuzhiyun OCTEON_PFVFACK) {
177*4882a593Smuzhiyun schedule_timeout_uninterruptible(timeout);
178*4882a593Smuzhiyun if (count++ == LIO_MBOX_WRITE_WAIT_CNT) {
179*4882a593Smuzhiyun ret = OCTEON_MBOX_STATUS_FAILED;
180*4882a593Smuzhiyun break;
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun if (ret == OCTEON_MBOX_STATUS_SUCCESS)
184*4882a593Smuzhiyun writeq(mbox_cmd->data[i], mbox->mbox_write_reg);
185*4882a593Smuzhiyun else
186*4882a593Smuzhiyun break;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun spin_lock_irqsave(&mbox->lock, flags);
191*4882a593Smuzhiyun if (mbox_cmd->msg.s.type == OCTEON_MBOX_RESPONSE) {
192*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
193*4882a593Smuzhiyun writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
194*4882a593Smuzhiyun } else {
195*4882a593Smuzhiyun if ((!mbox_cmd->msg.s.resp_needed) ||
196*4882a593Smuzhiyun (ret == OCTEON_MBOX_STATUS_FAILED)) {
197*4882a593Smuzhiyun mbox->state &= ~OCTEON_MBOX_STATE_RESPONSE_PENDING;
198*4882a593Smuzhiyun if (!(mbox->state &
199*4882a593Smuzhiyun (OCTEON_MBOX_STATE_REQUEST_RECEIVING |
200*4882a593Smuzhiyun OCTEON_MBOX_STATE_REQUEST_RECEIVED)))
201*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun return ret;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
get_vf_stats(struct octeon_device * oct,struct oct_vf_stats * stats)209*4882a593Smuzhiyun static void get_vf_stats(struct octeon_device *oct,
210*4882a593Smuzhiyun struct oct_vf_stats *stats)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun int i;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun for (i = 0; i < oct->num_iqs; i++) {
215*4882a593Smuzhiyun if (!oct->instr_queue[i])
216*4882a593Smuzhiyun continue;
217*4882a593Smuzhiyun stats->tx_packets += oct->instr_queue[i]->stats.tx_done;
218*4882a593Smuzhiyun stats->tx_bytes += oct->instr_queue[i]->stats.tx_tot_bytes;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun for (i = 0; i < oct->num_oqs; i++) {
222*4882a593Smuzhiyun if (!oct->droq[i])
223*4882a593Smuzhiyun continue;
224*4882a593Smuzhiyun stats->rx_packets += oct->droq[i]->stats.rx_pkts_received;
225*4882a593Smuzhiyun stats->rx_bytes += oct->droq[i]->stats.rx_bytes_received;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /**
230*4882a593Smuzhiyun * octeon_mbox_process_cmd:
231*4882a593Smuzhiyun * @mbox: Pointer mailbox
232*4882a593Smuzhiyun * @mbox_cmd: Pointer to command received
233*4882a593Smuzhiyun *
234*4882a593Smuzhiyun * Process the cmd received in mbox
235*4882a593Smuzhiyun */
octeon_mbox_process_cmd(struct octeon_mbox * mbox,struct octeon_mbox_cmd * mbox_cmd)236*4882a593Smuzhiyun static int octeon_mbox_process_cmd(struct octeon_mbox *mbox,
237*4882a593Smuzhiyun struct octeon_mbox_cmd *mbox_cmd)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun struct octeon_device *oct = mbox->oct_dev;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun switch (mbox_cmd->msg.s.cmd) {
242*4882a593Smuzhiyun case OCTEON_VF_ACTIVE:
243*4882a593Smuzhiyun dev_dbg(&oct->pci_dev->dev, "got vfactive sending data back\n");
244*4882a593Smuzhiyun mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE;
245*4882a593Smuzhiyun mbox_cmd->msg.s.resp_needed = 1;
246*4882a593Smuzhiyun mbox_cmd->msg.s.len = 2;
247*4882a593Smuzhiyun mbox_cmd->data[0] = 0; /* VF version is in mbox_cmd->data[0] */
248*4882a593Smuzhiyun ((struct lio_version *)&mbox_cmd->data[0])->major =
249*4882a593Smuzhiyun LIQUIDIO_BASE_MAJOR_VERSION;
250*4882a593Smuzhiyun ((struct lio_version *)&mbox_cmd->data[0])->minor =
251*4882a593Smuzhiyun LIQUIDIO_BASE_MINOR_VERSION;
252*4882a593Smuzhiyun ((struct lio_version *)&mbox_cmd->data[0])->micro =
253*4882a593Smuzhiyun LIQUIDIO_BASE_MICRO_VERSION;
254*4882a593Smuzhiyun memcpy(mbox_cmd->msg.s.params, (uint8_t *)&oct->pfvf_hsword, 6);
255*4882a593Smuzhiyun /* Sending core cofig info to the corresponding active VF.*/
256*4882a593Smuzhiyun octeon_mbox_write(oct, mbox_cmd);
257*4882a593Smuzhiyun break;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun case OCTEON_VF_FLR_REQUEST:
260*4882a593Smuzhiyun dev_info(&oct->pci_dev->dev,
261*4882a593Smuzhiyun "got a request for FLR from VF that owns DPI ring %u\n",
262*4882a593Smuzhiyun mbox->q_no);
263*4882a593Smuzhiyun pcie_flr(oct->sriov_info.dpiring_to_vfpcidev_lut[mbox->q_no]);
264*4882a593Smuzhiyun break;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun case OCTEON_PF_CHANGED_VF_MACADDR:
267*4882a593Smuzhiyun if (OCTEON_CN23XX_VF(oct))
268*4882a593Smuzhiyun octeon_pf_changed_vf_macaddr(oct,
269*4882a593Smuzhiyun mbox_cmd->msg.s.params);
270*4882a593Smuzhiyun break;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun case OCTEON_GET_VF_STATS:
273*4882a593Smuzhiyun dev_dbg(&oct->pci_dev->dev, "Got VF stats request. Sending data back\n");
274*4882a593Smuzhiyun mbox_cmd->msg.s.type = OCTEON_MBOX_RESPONSE;
275*4882a593Smuzhiyun mbox_cmd->msg.s.resp_needed = 1;
276*4882a593Smuzhiyun mbox_cmd->msg.s.len = 1 +
277*4882a593Smuzhiyun sizeof(struct oct_vf_stats) / sizeof(u64);
278*4882a593Smuzhiyun get_vf_stats(oct, (struct oct_vf_stats *)mbox_cmd->data);
279*4882a593Smuzhiyun octeon_mbox_write(oct, mbox_cmd);
280*4882a593Smuzhiyun break;
281*4882a593Smuzhiyun default:
282*4882a593Smuzhiyun break;
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun return 0;
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun /**
288*4882a593Smuzhiyun * octeon_mbox_process_message
289*4882a593Smuzhiyun * @mbox: mailbox
290*4882a593Smuzhiyun *
291*4882a593Smuzhiyun * Process the received mbox message.
292*4882a593Smuzhiyun */
octeon_mbox_process_message(struct octeon_mbox * mbox)293*4882a593Smuzhiyun int octeon_mbox_process_message(struct octeon_mbox *mbox)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun struct octeon_mbox_cmd mbox_cmd;
296*4882a593Smuzhiyun unsigned long flags;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun spin_lock_irqsave(&mbox->lock, flags);
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_ERROR) {
301*4882a593Smuzhiyun if (mbox->state & (OCTEON_MBOX_STATE_RESPONSE_PENDING |
302*4882a593Smuzhiyun OCTEON_MBOX_STATE_RESPONSE_RECEIVING)) {
303*4882a593Smuzhiyun memcpy(&mbox_cmd, &mbox->mbox_resp,
304*4882a593Smuzhiyun sizeof(struct octeon_mbox_cmd));
305*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
306*4882a593Smuzhiyun writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
307*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
308*4882a593Smuzhiyun mbox_cmd.recv_status = 1;
309*4882a593Smuzhiyun if (mbox_cmd.fn)
310*4882a593Smuzhiyun mbox_cmd.fn(mbox->oct_dev, &mbox_cmd,
311*4882a593Smuzhiyun mbox_cmd.fn_arg);
312*4882a593Smuzhiyun return 0;
313*4882a593Smuzhiyun }
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
316*4882a593Smuzhiyun writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
317*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
318*4882a593Smuzhiyun return 0;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_RESPONSE_RECEIVED) {
322*4882a593Smuzhiyun memcpy(&mbox_cmd, &mbox->mbox_resp,
323*4882a593Smuzhiyun sizeof(struct octeon_mbox_cmd));
324*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
325*4882a593Smuzhiyun writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
326*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
327*4882a593Smuzhiyun mbox_cmd.recv_status = 0;
328*4882a593Smuzhiyun if (mbox_cmd.fn)
329*4882a593Smuzhiyun mbox_cmd.fn(mbox->oct_dev, &mbox_cmd, mbox_cmd.fn_arg);
330*4882a593Smuzhiyun return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun if (mbox->state & OCTEON_MBOX_STATE_REQUEST_RECEIVED) {
334*4882a593Smuzhiyun memcpy(&mbox_cmd, &mbox->mbox_req,
335*4882a593Smuzhiyun sizeof(struct octeon_mbox_cmd));
336*4882a593Smuzhiyun if (!mbox_cmd.msg.s.resp_needed) {
337*4882a593Smuzhiyun mbox->state &= ~OCTEON_MBOX_STATE_REQUEST_RECEIVED;
338*4882a593Smuzhiyun if (!(mbox->state &
339*4882a593Smuzhiyun OCTEON_MBOX_STATE_RESPONSE_PENDING))
340*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
341*4882a593Smuzhiyun writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
345*4882a593Smuzhiyun octeon_mbox_process_cmd(mbox, &mbox_cmd);
346*4882a593Smuzhiyun return 0;
347*4882a593Smuzhiyun }
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
350*4882a593Smuzhiyun WARN_ON(1);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun return 0;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
octeon_mbox_cancel(struct octeon_device * oct,int q_no)355*4882a593Smuzhiyun int octeon_mbox_cancel(struct octeon_device *oct, int q_no)
356*4882a593Smuzhiyun {
357*4882a593Smuzhiyun struct octeon_mbox *mbox = oct->mbox[q_no];
358*4882a593Smuzhiyun struct octeon_mbox_cmd *mbox_cmd;
359*4882a593Smuzhiyun unsigned long flags = 0;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun spin_lock_irqsave(&mbox->lock, flags);
362*4882a593Smuzhiyun mbox_cmd = &mbox->mbox_resp;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun if (!(mbox->state & OCTEON_MBOX_STATE_RESPONSE_PENDING)) {
365*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
366*4882a593Smuzhiyun return 1;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun mbox->state = OCTEON_MBOX_STATE_IDLE;
370*4882a593Smuzhiyun memset(mbox_cmd, 0, sizeof(*mbox_cmd));
371*4882a593Smuzhiyun writeq(OCTEON_PFVFSIG, mbox->mbox_read_reg);
372*4882a593Smuzhiyun spin_unlock_irqrestore(&mbox->lock, flags);
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun return 0;
375*4882a593Smuzhiyun }
376