1*4882a593Smuzhiyun /**********************************************************************
2*4882a593Smuzhiyun * Author: Cavium, Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Contact: support@cavium.com
5*4882a593Smuzhiyun * Please include "LiquidIO" in the subject.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2003-2016 Cavium, Inc.
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun * it under the terms of the GNU General Public License, Version 2, as
11*4882a593Smuzhiyun * published by the Free Software Foundation.
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, but
14*4882a593Smuzhiyun * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16*4882a593Smuzhiyun * NONINFRINGEMENT. See the GNU General Public License for more details.
17*4882a593Smuzhiyun ***********************************************************************/
18*4882a593Smuzhiyun /*! \file octeon_droq.h
19*4882a593Smuzhiyun * \brief Implementation of Octeon Output queues. "Output" is with
20*4882a593Smuzhiyun * respect to the Octeon device on the NIC. From this driver's point of
21*4882a593Smuzhiyun * view they are ingress queues.
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #ifndef __OCTEON_DROQ_H__
25*4882a593Smuzhiyun #define __OCTEON_DROQ_H__
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* Default number of packets that will be processed in one iteration. */
28*4882a593Smuzhiyun #define MAX_PACKET_BUDGET 0xFFFFFFFF
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /** Octeon descriptor format.
31*4882a593Smuzhiyun * The descriptor ring is made of descriptors which have 2 64-bit values:
32*4882a593Smuzhiyun * -# Physical (bus) address of the data buffer.
33*4882a593Smuzhiyun * -# Physical (bus) address of a octeon_droq_info structure.
34*4882a593Smuzhiyun * The Octeon device DMA's incoming packets and its information at the address
35*4882a593Smuzhiyun * given by these descriptor fields.
36*4882a593Smuzhiyun */
37*4882a593Smuzhiyun struct octeon_droq_desc {
38*4882a593Smuzhiyun /** The buffer pointer */
39*4882a593Smuzhiyun u64 buffer_ptr;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /** The Info pointer */
42*4882a593Smuzhiyun u64 info_ptr;
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun #define OCT_DROQ_DESC_SIZE (sizeof(struct octeon_droq_desc))
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /** Information about packet DMA'ed by Octeon.
48*4882a593Smuzhiyun * The format of the information available at Info Pointer after Octeon
49*4882a593Smuzhiyun * has posted a packet. Not all descriptors have valid information. Only
50*4882a593Smuzhiyun * the Info field of the first descriptor for a packet has information
51*4882a593Smuzhiyun * about the packet.
52*4882a593Smuzhiyun */
53*4882a593Smuzhiyun struct octeon_droq_info {
54*4882a593Smuzhiyun /** The Length of the packet. */
55*4882a593Smuzhiyun u64 length;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /** The Output Receive Header. */
58*4882a593Smuzhiyun union octeon_rh rh;
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #define OCT_DROQ_INFO_SIZE (sizeof(struct octeon_droq_info))
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun struct octeon_skb_page_info {
64*4882a593Smuzhiyun /* DMA address for the page */
65*4882a593Smuzhiyun dma_addr_t dma;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Page for the rx dma **/
68*4882a593Smuzhiyun struct page *page;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun /** which offset into page */
71*4882a593Smuzhiyun unsigned int page_offset;
72*4882a593Smuzhiyun };
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /** Pointer to data buffer.
75*4882a593Smuzhiyun * Driver keeps a pointer to the data buffer that it made available to
76*4882a593Smuzhiyun * the Octeon device. Since the descriptor ring keeps physical (bus)
77*4882a593Smuzhiyun * addresses, this field is required for the driver to keep track of
78*4882a593Smuzhiyun * the virtual address pointers.
79*4882a593Smuzhiyun */
80*4882a593Smuzhiyun struct octeon_recv_buffer {
81*4882a593Smuzhiyun /** Packet buffer, including metadata. */
82*4882a593Smuzhiyun void *buffer;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /** Data in the packet buffer. */
85*4882a593Smuzhiyun u8 *data;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /** pg_info **/
88*4882a593Smuzhiyun struct octeon_skb_page_info pg_info;
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun #define OCT_DROQ_RECVBUF_SIZE (sizeof(struct octeon_recv_buffer))
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /** Output Queue statistics. Each output queue has four stats fields. */
94*4882a593Smuzhiyun struct oct_droq_stats {
95*4882a593Smuzhiyun /** Number of packets received in this queue. */
96*4882a593Smuzhiyun u64 pkts_received;
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /** Bytes received by this queue. */
99*4882a593Smuzhiyun u64 bytes_received;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /** Packets dropped due to no dispatch function. */
102*4882a593Smuzhiyun u64 dropped_nodispatch;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /** Packets dropped due to no memory available. */
105*4882a593Smuzhiyun u64 dropped_nomem;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun /** Packets dropped due to large number of pkts to process. */
108*4882a593Smuzhiyun u64 dropped_toomany;
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun /** Number of packets sent to stack from this queue. */
111*4882a593Smuzhiyun u64 rx_pkts_received;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /** Number of Bytes sent to stack from this queue. */
114*4882a593Smuzhiyun u64 rx_bytes_received;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /** Num of Packets dropped due to receive path failures. */
117*4882a593Smuzhiyun u64 rx_dropped;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun u64 rx_vxlan;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /** Num of failures of recv_buffer_alloc() */
122*4882a593Smuzhiyun u64 rx_alloc_failure;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* The maximum number of buffers that can be dispatched from the
127*4882a593Smuzhiyun * output/dma queue. Set to 64 assuming 1K buffers in DROQ and the fact that
128*4882a593Smuzhiyun * max packet size from DROQ is 64K.
129*4882a593Smuzhiyun */
130*4882a593Smuzhiyun #define MAX_RECV_BUFS 64
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun /** Receive Packet format used when dispatching output queue packets
133*4882a593Smuzhiyun * with non-raw opcodes.
134*4882a593Smuzhiyun * The received packet will be sent to the upper layers using this
135*4882a593Smuzhiyun * structure which is passed as a parameter to the dispatch function
136*4882a593Smuzhiyun */
137*4882a593Smuzhiyun struct octeon_recv_pkt {
138*4882a593Smuzhiyun /** Number of buffers in this received packet */
139*4882a593Smuzhiyun u16 buffer_count;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /** Id of the device that is sending the packet up */
142*4882a593Smuzhiyun u16 octeon_id;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /** Length of data in the packet buffer */
145*4882a593Smuzhiyun u32 length;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /** The receive header */
148*4882a593Smuzhiyun union octeon_rh rh;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /** Pointer to the OS-specific packet buffer */
151*4882a593Smuzhiyun void *buffer_ptr[MAX_RECV_BUFS];
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /** Size of the buffers pointed to by ptr's in buffer_ptr */
154*4882a593Smuzhiyun u32 buffer_size[MAX_RECV_BUFS];
155*4882a593Smuzhiyun };
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun #define OCT_RECV_PKT_SIZE (sizeof(struct octeon_recv_pkt))
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /** The first parameter of a dispatch function.
160*4882a593Smuzhiyun * For a raw mode opcode, the driver dispatches with the device
161*4882a593Smuzhiyun * pointer in this structure.
162*4882a593Smuzhiyun * For non-raw mode opcode, the driver dispatches the recv_pkt
163*4882a593Smuzhiyun * created to contain the buffers with data received from Octeon.
164*4882a593Smuzhiyun * ---------------------
165*4882a593Smuzhiyun * | *recv_pkt ----|---
166*4882a593Smuzhiyun * |-------------------| |
167*4882a593Smuzhiyun * | 0 or more bytes | |
168*4882a593Smuzhiyun * | reserved by driver| |
169*4882a593Smuzhiyun * |-------------------|<-/
170*4882a593Smuzhiyun * | octeon_recv_pkt |
171*4882a593Smuzhiyun * | |
172*4882a593Smuzhiyun * |___________________|
173*4882a593Smuzhiyun */
174*4882a593Smuzhiyun struct octeon_recv_info {
175*4882a593Smuzhiyun void *rsvd;
176*4882a593Smuzhiyun struct octeon_recv_pkt *recv_pkt;
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun #define OCT_RECV_INFO_SIZE (sizeof(struct octeon_recv_info))
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /** Allocate a recv_info structure. The recv_pkt pointer in the recv_info
182*4882a593Smuzhiyun * structure is filled in before this call returns.
183*4882a593Smuzhiyun * @param extra_bytes - extra bytes to be allocated at the end of the recv info
184*4882a593Smuzhiyun * structure.
185*4882a593Smuzhiyun * @return - pointer to a newly allocated recv_info structure.
186*4882a593Smuzhiyun */
octeon_alloc_recv_info(int extra_bytes)187*4882a593Smuzhiyun static inline struct octeon_recv_info *octeon_alloc_recv_info(int extra_bytes)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun struct octeon_recv_info *recv_info;
190*4882a593Smuzhiyun u8 *buf;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun buf = kmalloc(OCT_RECV_PKT_SIZE + OCT_RECV_INFO_SIZE +
193*4882a593Smuzhiyun extra_bytes, GFP_ATOMIC);
194*4882a593Smuzhiyun if (!buf)
195*4882a593Smuzhiyun return NULL;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun recv_info = (struct octeon_recv_info *)buf;
198*4882a593Smuzhiyun recv_info->recv_pkt =
199*4882a593Smuzhiyun (struct octeon_recv_pkt *)(buf + OCT_RECV_INFO_SIZE);
200*4882a593Smuzhiyun recv_info->rsvd = NULL;
201*4882a593Smuzhiyun if (extra_bytes)
202*4882a593Smuzhiyun recv_info->rsvd = buf + OCT_RECV_INFO_SIZE + OCT_RECV_PKT_SIZE;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun return recv_info;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun /** Free a recv_info structure.
208*4882a593Smuzhiyun * @param recv_info - Pointer to receive_info to be freed
209*4882a593Smuzhiyun */
octeon_free_recv_info(struct octeon_recv_info * recv_info)210*4882a593Smuzhiyun static inline void octeon_free_recv_info(struct octeon_recv_info *recv_info)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun kfree(recv_info);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun typedef int (*octeon_dispatch_fn_t)(struct octeon_recv_info *, void *);
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /** Used by NIC module to register packet handler and to get device
218*4882a593Smuzhiyun * information for each octeon device.
219*4882a593Smuzhiyun */
220*4882a593Smuzhiyun struct octeon_droq_ops {
221*4882a593Smuzhiyun /** This registered function will be called by the driver with
222*4882a593Smuzhiyun * the octeon id, pointer to buffer from droq and length of
223*4882a593Smuzhiyun * data in the buffer. The receive header gives the port
224*4882a593Smuzhiyun * number to the caller. Function pointer is set by caller.
225*4882a593Smuzhiyun */
226*4882a593Smuzhiyun void (*fptr)(u32, void *, u32, union octeon_rh *, void *, void *);
227*4882a593Smuzhiyun void *farg;
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* This function will be called by the driver for all NAPI related
230*4882a593Smuzhiyun * events. The first param is the octeon id. The second param is the
231*4882a593Smuzhiyun * output queue number. The third is the NAPI event that occurred.
232*4882a593Smuzhiyun */
233*4882a593Smuzhiyun void (*napi_fn)(void *);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun u32 poll_mode;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /** Flag indicating if the DROQ handler should drop packets that
238*4882a593Smuzhiyun * it cannot handle in one iteration. Set by caller.
239*4882a593Smuzhiyun */
240*4882a593Smuzhiyun u32 drop_on_max;
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /** The Descriptor Ring Output Queue structure.
244*4882a593Smuzhiyun * This structure has all the information required to implement a
245*4882a593Smuzhiyun * Octeon DROQ.
246*4882a593Smuzhiyun */
247*4882a593Smuzhiyun struct octeon_droq {
248*4882a593Smuzhiyun u32 q_no;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun u32 pkt_count;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun struct octeon_droq_ops ops;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun struct octeon_device *oct_dev;
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /** The 8B aligned descriptor ring starts at this address. */
257*4882a593Smuzhiyun struct octeon_droq_desc *desc_ring;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /** Index in the ring where the driver should read the next packet */
260*4882a593Smuzhiyun u32 read_idx;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /** Index in the ring where Octeon will write the next packet */
263*4882a593Smuzhiyun u32 write_idx;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun /** Index in the ring where the driver will refill the descriptor's
266*4882a593Smuzhiyun * buffer
267*4882a593Smuzhiyun */
268*4882a593Smuzhiyun u32 refill_idx;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /** Packets pending to be processed */
271*4882a593Smuzhiyun atomic_t pkts_pending;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /** Number of descriptors in this ring. */
274*4882a593Smuzhiyun u32 max_count;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /** The number of descriptors pending refill. */
277*4882a593Smuzhiyun u32 refill_count;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun u32 pkts_per_intr;
280*4882a593Smuzhiyun u32 refill_threshold;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /** The max number of descriptors in DROQ without a buffer.
283*4882a593Smuzhiyun * This field is used to keep track of empty space threshold. If the
284*4882a593Smuzhiyun * refill_count reaches this value, the DROQ cannot accept a max-sized
285*4882a593Smuzhiyun * (64K) packet.
286*4882a593Smuzhiyun */
287*4882a593Smuzhiyun u32 max_empty_descs;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun /** The receive buffer list. This list has the virtual addresses of the
290*4882a593Smuzhiyun * buffers.
291*4882a593Smuzhiyun */
292*4882a593Smuzhiyun struct octeon_recv_buffer *recv_buf_list;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun /** The size of each buffer pointed by the buffer pointer. */
295*4882a593Smuzhiyun u32 buffer_size;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /** Pointer to the mapped packet credit register.
298*4882a593Smuzhiyun * Host writes number of info/buffer ptrs available to this register
299*4882a593Smuzhiyun */
300*4882a593Smuzhiyun void __iomem *pkts_credit_reg;
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun /** Pointer to the mapped packet sent register.
303*4882a593Smuzhiyun * Octeon writes the number of packets DMA'ed to host memory
304*4882a593Smuzhiyun * in this register.
305*4882a593Smuzhiyun */
306*4882a593Smuzhiyun void __iomem *pkts_sent_reg;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun struct list_head dispatch_list;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun /** Statistics for this DROQ. */
311*4882a593Smuzhiyun struct oct_droq_stats stats;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /** DMA mapped address of the DROQ descriptor ring. */
314*4882a593Smuzhiyun size_t desc_ring_dma;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun /** application context */
317*4882a593Smuzhiyun void *app_ctx;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun struct napi_struct napi;
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun u32 cpu_id;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun call_single_data_t csd;
324*4882a593Smuzhiyun };
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun #define OCT_DROQ_SIZE (sizeof(struct octeon_droq))
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /**
329*4882a593Smuzhiyun * Allocates space for the descriptor ring for the droq and sets the
330*4882a593Smuzhiyun * base addr, num desc etc in Octeon registers.
331*4882a593Smuzhiyun *
332*4882a593Smuzhiyun * @param oct_dev - pointer to the octeon device structure
333*4882a593Smuzhiyun * @param q_no - droq no. ranges from 0 - 3.
334*4882a593Smuzhiyun * @param app_ctx - pointer to application context
335*4882a593Smuzhiyun * @return Success: 0 Failure: 1
336*4882a593Smuzhiyun */
337*4882a593Smuzhiyun int octeon_init_droq(struct octeon_device *oct_dev,
338*4882a593Smuzhiyun u32 q_no,
339*4882a593Smuzhiyun u32 num_descs,
340*4882a593Smuzhiyun u32 desc_size,
341*4882a593Smuzhiyun void *app_ctx);
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /**
344*4882a593Smuzhiyun * Frees the space for descriptor ring for the droq.
345*4882a593Smuzhiyun *
346*4882a593Smuzhiyun * @param oct_dev - pointer to the octeon device structure
347*4882a593Smuzhiyun * @param q_no - droq no. ranges from 0 - 3.
348*4882a593Smuzhiyun * @return: Success: 0 Failure: 1
349*4882a593Smuzhiyun */
350*4882a593Smuzhiyun int octeon_delete_droq(struct octeon_device *oct_dev, u32 q_no);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun /** Register a change in droq operations. The ops field has a pointer to a
353*4882a593Smuzhiyun * function which will called by the DROQ handler for all packets arriving
354*4882a593Smuzhiyun * on output queues given by q_no irrespective of the type of packet.
355*4882a593Smuzhiyun * The ops field also has a flag which if set tells the DROQ handler to
356*4882a593Smuzhiyun * drop packets if it receives more than what it can process in one
357*4882a593Smuzhiyun * invocation of the handler.
358*4882a593Smuzhiyun * @param oct - octeon device
359*4882a593Smuzhiyun * @param q_no - octeon output queue number (0 <= q_no <= MAX_OCTEON_DROQ-1
360*4882a593Smuzhiyun * @param ops - the droq_ops settings for this queue
361*4882a593Smuzhiyun * @return - 0 on success, -ENODEV or -EINVAL on error.
362*4882a593Smuzhiyun */
363*4882a593Smuzhiyun int
364*4882a593Smuzhiyun octeon_register_droq_ops(struct octeon_device *oct,
365*4882a593Smuzhiyun u32 q_no,
366*4882a593Smuzhiyun struct octeon_droq_ops *ops);
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun /** Resets the function pointer and flag settings made by
369*4882a593Smuzhiyun * octeon_register_droq_ops(). After this routine is called, the DROQ handler
370*4882a593Smuzhiyun * will lookup dispatch function for each arriving packet on the output queue
371*4882a593Smuzhiyun * given by q_no.
372*4882a593Smuzhiyun * @param oct - octeon device
373*4882a593Smuzhiyun * @param q_no - octeon output queue number (0 <= q_no <= MAX_OCTEON_DROQ-1
374*4882a593Smuzhiyun * @return - 0 on success, -ENODEV or -EINVAL on error.
375*4882a593Smuzhiyun */
376*4882a593Smuzhiyun int octeon_unregister_droq_ops(struct octeon_device *oct, u32 q_no);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /** Register a dispatch function for a opcode/subcode. The driver will call
379*4882a593Smuzhiyun * this dispatch function when it receives a packet with the given
380*4882a593Smuzhiyun * opcode/subcode in its output queues along with the user specified
381*4882a593Smuzhiyun * argument.
382*4882a593Smuzhiyun * @param oct - the octeon device to register with.
383*4882a593Smuzhiyun * @param opcode - the opcode for which the dispatch will be registered.
384*4882a593Smuzhiyun * @param subcode - the subcode for which the dispatch will be registered
385*4882a593Smuzhiyun * @param fn - the dispatch function.
386*4882a593Smuzhiyun * @param fn_arg - user specified that will be passed along with the
387*4882a593Smuzhiyun * dispatch function by the driver.
388*4882a593Smuzhiyun * @return Success: 0; Failure: 1
389*4882a593Smuzhiyun */
390*4882a593Smuzhiyun int octeon_register_dispatch_fn(struct octeon_device *oct,
391*4882a593Smuzhiyun u16 opcode,
392*4882a593Smuzhiyun u16 subcode,
393*4882a593Smuzhiyun octeon_dispatch_fn_t fn, void *fn_arg);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun void *octeon_get_dispatch_arg(struct octeon_device *oct,
396*4882a593Smuzhiyun u16 opcode, u16 subcode);
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun void octeon_droq_print_stats(void);
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun u32 octeon_droq_check_hw_for_pkts(struct octeon_droq *droq);
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun int octeon_create_droq(struct octeon_device *oct, u32 q_no,
403*4882a593Smuzhiyun u32 num_descs, u32 desc_size, void *app_ctx);
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun int octeon_droq_process_packets(struct octeon_device *oct,
406*4882a593Smuzhiyun struct octeon_droq *droq,
407*4882a593Smuzhiyun u32 budget);
408*4882a593Smuzhiyun
409*4882a593Smuzhiyun int octeon_droq_process_poll_pkts(struct octeon_device *oct,
410*4882a593Smuzhiyun struct octeon_droq *droq, u32 budget);
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun int octeon_enable_irq(struct octeon_device *oct, u32 q_no);
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun int octeon_retry_droq_refill(struct octeon_droq *droq);
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun #endif /*__OCTEON_DROQ_H__ */
417