1*4882a593Smuzhiyun /********************************************************************** 2*4882a593Smuzhiyun * Author: Cavium, Inc. 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Contact: support@cavium.com 5*4882a593Smuzhiyun * Please include "LiquidIO" in the subject. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2003-2016 Cavium, Inc. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * This file is free software; you can redistribute it and/or modify 10*4882a593Smuzhiyun * it under the terms of the GNU General Public License, Version 2, as 11*4882a593Smuzhiyun * published by the Free Software Foundation. 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun * This file is distributed in the hope that it will be useful, but 14*4882a593Smuzhiyun * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty 15*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or 16*4882a593Smuzhiyun * NONINFRINGEMENT. See the GNU General Public License for more details. 17*4882a593Smuzhiyun ***********************************************************************/ 18*4882a593Smuzhiyun /*! \file cn68xx_regs.h 19*4882a593Smuzhiyun * \brief Host Driver: Register Address and Register Mask values for 20*4882a593Smuzhiyun * Octeon CN68XX devices. The register map for CN66XX is the same 21*4882a593Smuzhiyun * for most registers. This file has the other registers that are 22*4882a593Smuzhiyun * 68XX-specific. 23*4882a593Smuzhiyun */ 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #ifndef __CN68XX_REGS_H__ 26*4882a593Smuzhiyun #define __CN68XX_REGS_H__ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun /*###################### REQUEST QUEUE #########################*/ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define CN68XX_SLI_IQ_PORT0_PKIND 0x0800 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun #define CN68XX_SLI_IQ_PORT_PKIND(iq) \ 33*4882a593Smuzhiyun (CN68XX_SLI_IQ_PORT0_PKIND + ((iq) * CN6XXX_IQ_OFFSET)) 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /*############################ OUTPUT QUEUE #########################*/ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun /* Starting pipe number and number of pipes used by the SLI packet output. */ 38*4882a593Smuzhiyun #define CN68XX_SLI_TX_PIPE 0x1230 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun /*######################## INTERRUPTS #########################*/ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /*------------------ Interrupt Masks ----------------*/ 43*4882a593Smuzhiyun #define CN68XX_INTR_PIPE_ERR BIT_ULL(61) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #endif 46