xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/brocade/bna/bna.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Linux network driver for QLogic BR-series Converged Network Adapter.
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun /*
6*4882a593Smuzhiyun  * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7*4882a593Smuzhiyun  * Copyright (c) 2014-2015 QLogic Corporation
8*4882a593Smuzhiyun  * All rights reserved
9*4882a593Smuzhiyun  * www.qlogic.com
10*4882a593Smuzhiyun  */
11*4882a593Smuzhiyun #ifndef __BNA_H__
12*4882a593Smuzhiyun #define __BNA_H__
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include "bfa_defs.h"
15*4882a593Smuzhiyun #include "bfa_ioc.h"
16*4882a593Smuzhiyun #include "bfi_enet.h"
17*4882a593Smuzhiyun #include "bna_types.h"
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun extern const u32 bna_napi_dim_vector[][BNA_BIAS_T_MAX];
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*  Macros and constants  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define bna_is_small_rxq(_id) ((_id) & 0x1)
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun  * input : _addr-> os dma addr in host endian format,
27*4882a593Smuzhiyun  * output : _bna_dma_addr-> pointer to hw dma addr
28*4882a593Smuzhiyun  */
29*4882a593Smuzhiyun #define BNA_SET_DMA_ADDR(_addr, _bna_dma_addr)				\
30*4882a593Smuzhiyun do {									\
31*4882a593Smuzhiyun 	u64 tmp_addr =						\
32*4882a593Smuzhiyun 	cpu_to_be64((u64)(_addr));				\
33*4882a593Smuzhiyun 	(_bna_dma_addr)->msb = ((struct bna_dma_addr *)&tmp_addr)->msb; \
34*4882a593Smuzhiyun 	(_bna_dma_addr)->lsb = ((struct bna_dma_addr *)&tmp_addr)->lsb; \
35*4882a593Smuzhiyun } while (0)
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /*
38*4882a593Smuzhiyun  * input : _bna_dma_addr-> pointer to hw dma addr
39*4882a593Smuzhiyun  * output : _addr-> os dma addr in host endian format
40*4882a593Smuzhiyun  */
41*4882a593Smuzhiyun #define BNA_GET_DMA_ADDR(_bna_dma_addr, _addr)			\
42*4882a593Smuzhiyun do {								\
43*4882a593Smuzhiyun 	(_addr) = ((((u64)ntohl((_bna_dma_addr)->msb))) << 32)		\
44*4882a593Smuzhiyun 	| ((ntohl((_bna_dma_addr)->lsb) & 0xffffffff));	\
45*4882a593Smuzhiyun } while (0)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define BNA_TXQ_WI_NEEDED(_vectors)	(((_vectors) + 3) >> 2)
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #define BNA_QE_INDX_ADD(_qe_idx, _qe_num, _q_depth)			\
50*4882a593Smuzhiyun 	((_qe_idx) = ((_qe_idx) + (_qe_num)) & ((_q_depth) - 1))
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define BNA_QE_INDX_INC(_idx, _q_depth) BNA_QE_INDX_ADD(_idx, 1, _q_depth)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun #define BNA_Q_INDEX_CHANGE(_old_idx, _updated_idx, _q_depth)		\
55*4882a593Smuzhiyun 	(((_updated_idx) - (_old_idx)) & ((_q_depth) - 1))
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun #define BNA_QE_FREE_CNT(_q_ptr, _q_depth)				\
58*4882a593Smuzhiyun 	(((_q_ptr)->consumer_index - (_q_ptr)->producer_index - 1) &	\
59*4882a593Smuzhiyun 	 ((_q_depth) - 1))
60*4882a593Smuzhiyun #define BNA_QE_IN_USE_CNT(_q_ptr, _q_depth)				\
61*4882a593Smuzhiyun 	((((_q_ptr)->producer_index - (_q_ptr)->consumer_index)) &	\
62*4882a593Smuzhiyun 	 (_q_depth - 1))
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define BNA_LARGE_PKT_SIZE		1000
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define BNA_UPDATE_PKT_CNT(_pkt, _len)					\
67*4882a593Smuzhiyun do {									\
68*4882a593Smuzhiyun 	if ((_len) > BNA_LARGE_PKT_SIZE) {				\
69*4882a593Smuzhiyun 		(_pkt)->large_pkt_cnt++;				\
70*4882a593Smuzhiyun 	} else {							\
71*4882a593Smuzhiyun 		(_pkt)->small_pkt_cnt++;				\
72*4882a593Smuzhiyun 	}								\
73*4882a593Smuzhiyun } while (0)
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun #define	call_rxf_stop_cbfn(rxf)						\
76*4882a593Smuzhiyun do {									\
77*4882a593Smuzhiyun 	if ((rxf)->stop_cbfn) {						\
78*4882a593Smuzhiyun 		void (*cbfn)(struct bna_rx *);			\
79*4882a593Smuzhiyun 		struct bna_rx *cbarg;					\
80*4882a593Smuzhiyun 		cbfn = (rxf)->stop_cbfn;				\
81*4882a593Smuzhiyun 		cbarg = (rxf)->stop_cbarg;				\
82*4882a593Smuzhiyun 		(rxf)->stop_cbfn = NULL;				\
83*4882a593Smuzhiyun 		(rxf)->stop_cbarg = NULL;				\
84*4882a593Smuzhiyun 		cbfn(cbarg);						\
85*4882a593Smuzhiyun 	}								\
86*4882a593Smuzhiyun } while (0)
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define	call_rxf_start_cbfn(rxf)					\
89*4882a593Smuzhiyun do {									\
90*4882a593Smuzhiyun 	if ((rxf)->start_cbfn) {					\
91*4882a593Smuzhiyun 		void (*cbfn)(struct bna_rx *);			\
92*4882a593Smuzhiyun 		struct bna_rx *cbarg;					\
93*4882a593Smuzhiyun 		cbfn = (rxf)->start_cbfn;				\
94*4882a593Smuzhiyun 		cbarg = (rxf)->start_cbarg;				\
95*4882a593Smuzhiyun 		(rxf)->start_cbfn = NULL;				\
96*4882a593Smuzhiyun 		(rxf)->start_cbarg = NULL;				\
97*4882a593Smuzhiyun 		cbfn(cbarg);						\
98*4882a593Smuzhiyun 	}								\
99*4882a593Smuzhiyun } while (0)
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define	call_rxf_cam_fltr_cbfn(rxf)					\
102*4882a593Smuzhiyun do {									\
103*4882a593Smuzhiyun 	if ((rxf)->cam_fltr_cbfn) {					\
104*4882a593Smuzhiyun 		void (*cbfn)(struct bnad *, struct bna_rx *);	\
105*4882a593Smuzhiyun 		struct bnad *cbarg;					\
106*4882a593Smuzhiyun 		cbfn = (rxf)->cam_fltr_cbfn;				\
107*4882a593Smuzhiyun 		cbarg = (rxf)->cam_fltr_cbarg;				\
108*4882a593Smuzhiyun 		(rxf)->cam_fltr_cbfn = NULL;				\
109*4882a593Smuzhiyun 		(rxf)->cam_fltr_cbarg = NULL;				\
110*4882a593Smuzhiyun 		cbfn(cbarg, rxf->rx);					\
111*4882a593Smuzhiyun 	}								\
112*4882a593Smuzhiyun } while (0)
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun #define is_xxx_enable(mode, bitmask, xxx) ((bitmask & xxx) && (mode & xxx))
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun #define is_xxx_disable(mode, bitmask, xxx) ((bitmask & xxx) && !(mode & xxx))
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #define xxx_enable(mode, bitmask, xxx)					\
119*4882a593Smuzhiyun do {									\
120*4882a593Smuzhiyun 	bitmask |= xxx;							\
121*4882a593Smuzhiyun 	mode |= xxx;							\
122*4882a593Smuzhiyun } while (0)
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun #define xxx_disable(mode, bitmask, xxx)					\
125*4882a593Smuzhiyun do {									\
126*4882a593Smuzhiyun 	bitmask |= xxx;							\
127*4882a593Smuzhiyun 	mode &= ~xxx;							\
128*4882a593Smuzhiyun } while (0)
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun #define xxx_inactive(mode, bitmask, xxx)				\
131*4882a593Smuzhiyun do {									\
132*4882a593Smuzhiyun 	bitmask &= ~xxx;						\
133*4882a593Smuzhiyun 	mode &= ~xxx;							\
134*4882a593Smuzhiyun } while (0)
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun #define is_promisc_enable(mode, bitmask)				\
137*4882a593Smuzhiyun 	is_xxx_enable(mode, bitmask, BNA_RXMODE_PROMISC)
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun #define is_promisc_disable(mode, bitmask)				\
140*4882a593Smuzhiyun 	is_xxx_disable(mode, bitmask, BNA_RXMODE_PROMISC)
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #define promisc_enable(mode, bitmask)					\
143*4882a593Smuzhiyun 	xxx_enable(mode, bitmask, BNA_RXMODE_PROMISC)
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define promisc_disable(mode, bitmask)					\
146*4882a593Smuzhiyun 	xxx_disable(mode, bitmask, BNA_RXMODE_PROMISC)
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun #define promisc_inactive(mode, bitmask)					\
149*4882a593Smuzhiyun 	xxx_inactive(mode, bitmask, BNA_RXMODE_PROMISC)
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun #define is_default_enable(mode, bitmask)				\
152*4882a593Smuzhiyun 	is_xxx_enable(mode, bitmask, BNA_RXMODE_DEFAULT)
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun #define is_default_disable(mode, bitmask)				\
155*4882a593Smuzhiyun 	is_xxx_disable(mode, bitmask, BNA_RXMODE_DEFAULT)
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun #define default_enable(mode, bitmask)					\
158*4882a593Smuzhiyun 	xxx_enable(mode, bitmask, BNA_RXMODE_DEFAULT)
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun #define default_disable(mode, bitmask)					\
161*4882a593Smuzhiyun 	xxx_disable(mode, bitmask, BNA_RXMODE_DEFAULT)
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun #define default_inactive(mode, bitmask)					\
164*4882a593Smuzhiyun 	xxx_inactive(mode, bitmask, BNA_RXMODE_DEFAULT)
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun #define is_allmulti_enable(mode, bitmask)				\
167*4882a593Smuzhiyun 	is_xxx_enable(mode, bitmask, BNA_RXMODE_ALLMULTI)
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define is_allmulti_disable(mode, bitmask)				\
170*4882a593Smuzhiyun 	is_xxx_disable(mode, bitmask, BNA_RXMODE_ALLMULTI)
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun #define allmulti_enable(mode, bitmask)					\
173*4882a593Smuzhiyun 	xxx_enable(mode, bitmask, BNA_RXMODE_ALLMULTI)
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun #define allmulti_disable(mode, bitmask)					\
176*4882a593Smuzhiyun 	xxx_disable(mode, bitmask, BNA_RXMODE_ALLMULTI)
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #define allmulti_inactive(mode, bitmask)				\
179*4882a593Smuzhiyun 	xxx_inactive(mode, bitmask, BNA_RXMODE_ALLMULTI)
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun #define	GET_RXQS(rxp, q0, q1)	do {					\
182*4882a593Smuzhiyun 	switch ((rxp)->type) {						\
183*4882a593Smuzhiyun 	case BNA_RXP_SINGLE:						\
184*4882a593Smuzhiyun 		(q0) = rxp->rxq.single.only;				\
185*4882a593Smuzhiyun 		(q1) = NULL;						\
186*4882a593Smuzhiyun 		break;							\
187*4882a593Smuzhiyun 	case BNA_RXP_SLR:						\
188*4882a593Smuzhiyun 		(q0) = rxp->rxq.slr.large;				\
189*4882a593Smuzhiyun 		(q1) = rxp->rxq.slr.small;				\
190*4882a593Smuzhiyun 		break;							\
191*4882a593Smuzhiyun 	case BNA_RXP_HDS:						\
192*4882a593Smuzhiyun 		(q0) = rxp->rxq.hds.data;				\
193*4882a593Smuzhiyun 		(q1) = rxp->rxq.hds.hdr;				\
194*4882a593Smuzhiyun 		break;							\
195*4882a593Smuzhiyun 	}								\
196*4882a593Smuzhiyun } while (0)
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun #define bna_tx_rid_mask(_bna) ((_bna)->tx_mod.rid_mask)
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun #define bna_rx_rid_mask(_bna) ((_bna)->rx_mod.rid_mask)
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun #define bna_tx_from_rid(_bna, _rid, _tx)				\
203*4882a593Smuzhiyun do {									\
204*4882a593Smuzhiyun 	struct bna_tx_mod *__tx_mod = &(_bna)->tx_mod;			\
205*4882a593Smuzhiyun 	struct bna_tx *__tx;						\
206*4882a593Smuzhiyun 	_tx = NULL;							\
207*4882a593Smuzhiyun 	list_for_each_entry(__tx, &__tx_mod->tx_active_q, qe) {		\
208*4882a593Smuzhiyun 		if (__tx->rid == (_rid)) {				\
209*4882a593Smuzhiyun 			(_tx) = __tx;					\
210*4882a593Smuzhiyun 			break;						\
211*4882a593Smuzhiyun 		}							\
212*4882a593Smuzhiyun 	}								\
213*4882a593Smuzhiyun } while (0)
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun #define bna_rx_from_rid(_bna, _rid, _rx)				\
216*4882a593Smuzhiyun do {									\
217*4882a593Smuzhiyun 	struct bna_rx_mod *__rx_mod = &(_bna)->rx_mod;			\
218*4882a593Smuzhiyun 	struct bna_rx *__rx;						\
219*4882a593Smuzhiyun 	_rx = NULL;							\
220*4882a593Smuzhiyun 	list_for_each_entry(__rx, &__rx_mod->rx_active_q, qe) {		\
221*4882a593Smuzhiyun 		if (__rx->rid == (_rid)) {				\
222*4882a593Smuzhiyun 			(_rx) = __rx;					\
223*4882a593Smuzhiyun 			break;						\
224*4882a593Smuzhiyun 		}							\
225*4882a593Smuzhiyun 	}								\
226*4882a593Smuzhiyun } while (0)
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun #define bna_mcam_mod_free_q(_bna) (&(_bna)->mcam_mod.free_q)
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun #define bna_mcam_mod_del_q(_bna) (&(_bna)->mcam_mod.del_q)
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun #define bna_ucam_mod_free_q(_bna) (&(_bna)->ucam_mod.free_q)
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #define bna_ucam_mod_del_q(_bna) (&(_bna)->ucam_mod.del_q)
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun /*  Inline functions  */
237*4882a593Smuzhiyun 
bna_mac_find(struct list_head * q,const u8 * addr)238*4882a593Smuzhiyun static inline struct bna_mac *bna_mac_find(struct list_head *q, const u8 *addr)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun 	struct bna_mac *mac;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	list_for_each_entry(mac, q, qe)
243*4882a593Smuzhiyun 		if (ether_addr_equal(mac->addr, addr))
244*4882a593Smuzhiyun 			return mac;
245*4882a593Smuzhiyun 	return NULL;
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun #define bna_attr(_bna) (&(_bna)->ioceth.attr)
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun /* Function prototypes */
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun /* BNA */
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun /* FW response handlers */
255*4882a593Smuzhiyun void bna_bfi_stats_clr_rsp(struct bna *bna, struct bfi_msgq_mhdr *msghdr);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun /* APIs for BNAD */
258*4882a593Smuzhiyun void bna_res_req(struct bna_res_info *res_info);
259*4882a593Smuzhiyun void bna_mod_res_req(struct bna *bna, struct bna_res_info *res_info);
260*4882a593Smuzhiyun void bna_init(struct bna *bna, struct bnad *bnad,
261*4882a593Smuzhiyun 			struct bfa_pcidev *pcidev,
262*4882a593Smuzhiyun 			struct bna_res_info *res_info);
263*4882a593Smuzhiyun void bna_mod_init(struct bna *bna, struct bna_res_info *res_info);
264*4882a593Smuzhiyun void bna_uninit(struct bna *bna);
265*4882a593Smuzhiyun int bna_num_txq_set(struct bna *bna, int num_txq);
266*4882a593Smuzhiyun int bna_num_rxp_set(struct bna *bna, int num_rxp);
267*4882a593Smuzhiyun void bna_hw_stats_get(struct bna *bna);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun /* APIs for RxF */
270*4882a593Smuzhiyun struct bna_mac *bna_cam_mod_mac_get(struct list_head *head);
271*4882a593Smuzhiyun struct bna_mcam_handle *bna_mcam_mod_handle_get(struct bna_mcam_mod *mod);
272*4882a593Smuzhiyun void bna_mcam_mod_handle_put(struct bna_mcam_mod *mcam_mod,
273*4882a593Smuzhiyun 			  struct bna_mcam_handle *handle);
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /* MBOX */
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun /* API for BNAD */
278*4882a593Smuzhiyun void bna_mbox_handler(struct bna *bna, u32 intr_status);
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun /* ETHPORT */
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun /* Callbacks for RX */
283*4882a593Smuzhiyun void bna_ethport_cb_rx_started(struct bna_ethport *ethport);
284*4882a593Smuzhiyun void bna_ethport_cb_rx_stopped(struct bna_ethport *ethport);
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun /* TX MODULE AND TX */
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun /* FW response handelrs */
289*4882a593Smuzhiyun void bna_bfi_tx_enet_start_rsp(struct bna_tx *tx,
290*4882a593Smuzhiyun 			       struct bfi_msgq_mhdr *msghdr);
291*4882a593Smuzhiyun void bna_bfi_tx_enet_stop_rsp(struct bna_tx *tx,
292*4882a593Smuzhiyun 			      struct bfi_msgq_mhdr *msghdr);
293*4882a593Smuzhiyun void bna_bfi_bw_update_aen(struct bna_tx_mod *tx_mod);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun /* APIs for BNA */
296*4882a593Smuzhiyun void bna_tx_mod_init(struct bna_tx_mod *tx_mod, struct bna *bna,
297*4882a593Smuzhiyun 		     struct bna_res_info *res_info);
298*4882a593Smuzhiyun void bna_tx_mod_uninit(struct bna_tx_mod *tx_mod);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun /* APIs for ENET */
301*4882a593Smuzhiyun void bna_tx_mod_start(struct bna_tx_mod *tx_mod, enum bna_tx_type type);
302*4882a593Smuzhiyun void bna_tx_mod_stop(struct bna_tx_mod *tx_mod, enum bna_tx_type type);
303*4882a593Smuzhiyun void bna_tx_mod_fail(struct bna_tx_mod *tx_mod);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun /* APIs for BNAD */
306*4882a593Smuzhiyun void bna_tx_res_req(int num_txq, int txq_depth,
307*4882a593Smuzhiyun 		    struct bna_res_info *res_info);
308*4882a593Smuzhiyun struct bna_tx *bna_tx_create(struct bna *bna, struct bnad *bnad,
309*4882a593Smuzhiyun 			       struct bna_tx_config *tx_cfg,
310*4882a593Smuzhiyun 			       const struct bna_tx_event_cbfn *tx_cbfn,
311*4882a593Smuzhiyun 			       struct bna_res_info *res_info, void *priv);
312*4882a593Smuzhiyun void bna_tx_destroy(struct bna_tx *tx);
313*4882a593Smuzhiyun void bna_tx_enable(struct bna_tx *tx);
314*4882a593Smuzhiyun void bna_tx_disable(struct bna_tx *tx, enum bna_cleanup_type type,
315*4882a593Smuzhiyun 		    void (*cbfn)(void *, struct bna_tx *));
316*4882a593Smuzhiyun void bna_tx_cleanup_complete(struct bna_tx *tx);
317*4882a593Smuzhiyun void bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo);
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun /* RX MODULE, RX, RXF */
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun /* FW response handlers */
322*4882a593Smuzhiyun void bna_bfi_rx_enet_start_rsp(struct bna_rx *rx,
323*4882a593Smuzhiyun 			       struct bfi_msgq_mhdr *msghdr);
324*4882a593Smuzhiyun void bna_bfi_rx_enet_stop_rsp(struct bna_rx *rx,
325*4882a593Smuzhiyun 			      struct bfi_msgq_mhdr *msghdr);
326*4882a593Smuzhiyun void bna_bfi_rxf_cfg_rsp(struct bna_rxf *rxf, struct bfi_msgq_mhdr *msghdr);
327*4882a593Smuzhiyun void bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf,
328*4882a593Smuzhiyun 			       struct bfi_msgq_mhdr *msghdr);
329*4882a593Smuzhiyun void bna_bfi_rxf_ucast_set_rsp(struct bna_rxf *rxf,
330*4882a593Smuzhiyun 			       struct bfi_msgq_mhdr *msghdr);
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun /* APIs for BNA */
333*4882a593Smuzhiyun void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna,
334*4882a593Smuzhiyun 		     struct bna_res_info *res_info);
335*4882a593Smuzhiyun void bna_rx_mod_uninit(struct bna_rx_mod *rx_mod);
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun /* APIs for ENET */
338*4882a593Smuzhiyun void bna_rx_mod_start(struct bna_rx_mod *rx_mod, enum bna_rx_type type);
339*4882a593Smuzhiyun void bna_rx_mod_stop(struct bna_rx_mod *rx_mod, enum bna_rx_type type);
340*4882a593Smuzhiyun void bna_rx_mod_fail(struct bna_rx_mod *rx_mod);
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun /* APIs for BNAD */
343*4882a593Smuzhiyun void bna_rx_res_req(struct bna_rx_config *rx_config,
344*4882a593Smuzhiyun 		    struct bna_res_info *res_info);
345*4882a593Smuzhiyun struct bna_rx *bna_rx_create(struct bna *bna, struct bnad *bnad,
346*4882a593Smuzhiyun 			       struct bna_rx_config *rx_cfg,
347*4882a593Smuzhiyun 			       const struct bna_rx_event_cbfn *rx_cbfn,
348*4882a593Smuzhiyun 			       struct bna_res_info *res_info, void *priv);
349*4882a593Smuzhiyun void bna_rx_destroy(struct bna_rx *rx);
350*4882a593Smuzhiyun void bna_rx_enable(struct bna_rx *rx);
351*4882a593Smuzhiyun void bna_rx_disable(struct bna_rx *rx, enum bna_cleanup_type type,
352*4882a593Smuzhiyun 		    void (*cbfn)(void *, struct bna_rx *));
353*4882a593Smuzhiyun void bna_rx_cleanup_complete(struct bna_rx *rx);
354*4882a593Smuzhiyun void bna_rx_coalescing_timeo_set(struct bna_rx *rx, int coalescing_timeo);
355*4882a593Smuzhiyun void bna_rx_dim_reconfig(struct bna *bna, const u32 vector[][BNA_BIAS_T_MAX]);
356*4882a593Smuzhiyun void bna_rx_dim_update(struct bna_ccb *ccb);
357*4882a593Smuzhiyun enum bna_cb_status bna_rx_ucast_set(struct bna_rx *rx, const u8 *ucmac);
358*4882a593Smuzhiyun enum bna_cb_status bna_rx_ucast_listset(struct bna_rx *rx, int count,
359*4882a593Smuzhiyun 					const u8 *uclist);
360*4882a593Smuzhiyun enum bna_cb_status bna_rx_mcast_add(struct bna_rx *rx, const u8 *mcmac,
361*4882a593Smuzhiyun 				    void (*cbfn)(struct bnad *,
362*4882a593Smuzhiyun 						 struct bna_rx *));
363*4882a593Smuzhiyun enum bna_cb_status bna_rx_mcast_listset(struct bna_rx *rx, int count,
364*4882a593Smuzhiyun 					const u8 *mcmac);
365*4882a593Smuzhiyun void
366*4882a593Smuzhiyun bna_rx_mcast_delall(struct bna_rx *rx);
367*4882a593Smuzhiyun enum bna_cb_status
368*4882a593Smuzhiyun bna_rx_mode_set(struct bna_rx *rx, enum bna_rxmode rxmode,
369*4882a593Smuzhiyun 		enum bna_rxmode bitmask);
370*4882a593Smuzhiyun void bna_rx_vlan_add(struct bna_rx *rx, int vlan_id);
371*4882a593Smuzhiyun void bna_rx_vlan_del(struct bna_rx *rx, int vlan_id);
372*4882a593Smuzhiyun void bna_rx_vlanfilter_enable(struct bna_rx *rx);
373*4882a593Smuzhiyun void bna_rx_vlan_strip_enable(struct bna_rx *rx);
374*4882a593Smuzhiyun void bna_rx_vlan_strip_disable(struct bna_rx *rx);
375*4882a593Smuzhiyun /* ENET */
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun /* API for RX */
378*4882a593Smuzhiyun int bna_enet_mtu_get(struct bna_enet *enet);
379*4882a593Smuzhiyun 
380*4882a593Smuzhiyun /* Callbacks for TX, RX */
381*4882a593Smuzhiyun void bna_enet_cb_tx_stopped(struct bna_enet *enet);
382*4882a593Smuzhiyun void bna_enet_cb_rx_stopped(struct bna_enet *enet);
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun /* API for BNAD */
385*4882a593Smuzhiyun void bna_enet_enable(struct bna_enet *enet);
386*4882a593Smuzhiyun void bna_enet_disable(struct bna_enet *enet, enum bna_cleanup_type type,
387*4882a593Smuzhiyun 		      void (*cbfn)(void *));
388*4882a593Smuzhiyun void bna_enet_pause_config(struct bna_enet *enet,
389*4882a593Smuzhiyun 			   struct bna_pause_config *pause_config);
390*4882a593Smuzhiyun void bna_enet_mtu_set(struct bna_enet *enet, int mtu,
391*4882a593Smuzhiyun 		      void (*cbfn)(struct bnad *));
392*4882a593Smuzhiyun void bna_enet_perm_mac_get(struct bna_enet *enet, u8 *mac);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun /* IOCETH */
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun /* APIs for BNAD */
397*4882a593Smuzhiyun void bna_ioceth_enable(struct bna_ioceth *ioceth);
398*4882a593Smuzhiyun void bna_ioceth_disable(struct bna_ioceth *ioceth,
399*4882a593Smuzhiyun 			enum bna_cleanup_type type);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun /* BNAD */
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun /* Callbacks for ENET */
404*4882a593Smuzhiyun void bnad_cb_ethport_link_status(struct bnad *bnad,
405*4882a593Smuzhiyun 			      enum bna_link_status status);
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun /* Callbacks for IOCETH */
408*4882a593Smuzhiyun void bnad_cb_ioceth_ready(struct bnad *bnad);
409*4882a593Smuzhiyun void bnad_cb_ioceth_failed(struct bnad *bnad);
410*4882a593Smuzhiyun void bnad_cb_ioceth_disabled(struct bnad *bnad);
411*4882a593Smuzhiyun void bnad_cb_mbox_intr_enable(struct bnad *bnad);
412*4882a593Smuzhiyun void bnad_cb_mbox_intr_disable(struct bnad *bnad);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun /* Callbacks for BNA */
415*4882a593Smuzhiyun void bnad_cb_stats_get(struct bnad *bnad, enum bna_cb_status status,
416*4882a593Smuzhiyun 		       struct bna_stats *stats);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun #endif  /* __BNA_H__ */
419