1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2016 Broadcom
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
5*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License as
6*4882a593Smuzhiyun * published by the Free Software Foundation version 2.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9*4882a593Smuzhiyun * kind, whether express or implied; without even the implied warranty
10*4882a593Smuzhiyun * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11*4882a593Smuzhiyun * GNU General Public License for more details.
12*4882a593Smuzhiyun */
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <linux/bcma/bcma.h>
17*4882a593Smuzhiyun #include <linux/brcmphy.h>
18*4882a593Smuzhiyun #include <linux/etherdevice.h>
19*4882a593Smuzhiyun #include <linux/of_address.h>
20*4882a593Smuzhiyun #include <linux/of_mdio.h>
21*4882a593Smuzhiyun #include <linux/of_net.h>
22*4882a593Smuzhiyun #include "bgmac.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define NICPM_PADRING_CFG 0x00000004
25*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL 0x00000008
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define NICPM_PADRING_CFG_INIT_VAL 0x74000000
28*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL_INIT_VAL_AX 0x21880000
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL_INIT_VAL 0x3196e000
31*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL_SPD_SHIFT 10
32*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL_SPD_10M 0
33*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL_SPD_100M 1
34*4882a593Smuzhiyun #define NICPM_IOMUX_CTRL_SPD_1000M 2
35*4882a593Smuzhiyun
platform_bgmac_read(struct bgmac * bgmac,u16 offset)36*4882a593Smuzhiyun static u32 platform_bgmac_read(struct bgmac *bgmac, u16 offset)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun return readl(bgmac->plat.base + offset);
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
platform_bgmac_write(struct bgmac * bgmac,u16 offset,u32 value)41*4882a593Smuzhiyun static void platform_bgmac_write(struct bgmac *bgmac, u16 offset, u32 value)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun writel(value, bgmac->plat.base + offset);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
platform_bgmac_idm_read(struct bgmac * bgmac,u16 offset)46*4882a593Smuzhiyun static u32 platform_bgmac_idm_read(struct bgmac *bgmac, u16 offset)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun return readl(bgmac->plat.idm_base + offset);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
platform_bgmac_idm_write(struct bgmac * bgmac,u16 offset,u32 value)51*4882a593Smuzhiyun static void platform_bgmac_idm_write(struct bgmac *bgmac, u16 offset, u32 value)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun writel(value, bgmac->plat.idm_base + offset);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
platform_bgmac_clk_enabled(struct bgmac * bgmac)56*4882a593Smuzhiyun static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun if (!bgmac->plat.idm_base)
59*4882a593Smuzhiyun return true;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & BGMAC_CLK_EN) != BGMAC_CLK_EN)
62*4882a593Smuzhiyun return false;
63*4882a593Smuzhiyun if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
64*4882a593Smuzhiyun return false;
65*4882a593Smuzhiyun return true;
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun
platform_bgmac_clk_enable(struct bgmac * bgmac,u32 flags)68*4882a593Smuzhiyun static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun u32 val;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun if (!bgmac->plat.idm_base)
73*4882a593Smuzhiyun return;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun /* The Reset Control register only contains a single bit to show if the
76*4882a593Smuzhiyun * controller is currently in reset. Do a sanity check here, just in
77*4882a593Smuzhiyun * case the bootloader happened to leave the device in reset.
78*4882a593Smuzhiyun */
79*4882a593Smuzhiyun val = bgmac_idm_read(bgmac, BCMA_RESET_CTL);
80*4882a593Smuzhiyun if (val) {
81*4882a593Smuzhiyun bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
82*4882a593Smuzhiyun bgmac_idm_read(bgmac, BCMA_RESET_CTL);
83*4882a593Smuzhiyun udelay(1);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun val = bgmac_idm_read(bgmac, BCMA_IOCTL);
87*4882a593Smuzhiyun /* Some bits of BCMA_IOCTL set by HW/ATF and should not change */
88*4882a593Smuzhiyun val |= flags & ~(BGMAC_AWCACHE | BGMAC_ARCACHE | BGMAC_AWUSER |
89*4882a593Smuzhiyun BGMAC_ARUSER);
90*4882a593Smuzhiyun val |= BGMAC_CLK_EN;
91*4882a593Smuzhiyun bgmac_idm_write(bgmac, BCMA_IOCTL, val);
92*4882a593Smuzhiyun bgmac_idm_read(bgmac, BCMA_IOCTL);
93*4882a593Smuzhiyun udelay(1);
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
platform_bgmac_cco_ctl_maskset(struct bgmac * bgmac,u32 offset,u32 mask,u32 set)96*4882a593Smuzhiyun static void platform_bgmac_cco_ctl_maskset(struct bgmac *bgmac, u32 offset,
97*4882a593Smuzhiyun u32 mask, u32 set)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun /* This shouldn't be encountered */
100*4882a593Smuzhiyun WARN_ON(1);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
platform_bgmac_get_bus_clock(struct bgmac * bgmac)103*4882a593Smuzhiyun static u32 platform_bgmac_get_bus_clock(struct bgmac *bgmac)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun /* This shouldn't be encountered */
106*4882a593Smuzhiyun WARN_ON(1);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun return 0;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
platform_bgmac_cmn_maskset32(struct bgmac * bgmac,u16 offset,u32 mask,u32 set)111*4882a593Smuzhiyun static void platform_bgmac_cmn_maskset32(struct bgmac *bgmac, u16 offset,
112*4882a593Smuzhiyun u32 mask, u32 set)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun /* This shouldn't be encountered */
115*4882a593Smuzhiyun WARN_ON(1);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
bgmac_nicpm_speed_set(struct net_device * net_dev)118*4882a593Smuzhiyun static void bgmac_nicpm_speed_set(struct net_device *net_dev)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun struct bgmac *bgmac = netdev_priv(net_dev);
121*4882a593Smuzhiyun u32 val;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (!bgmac->plat.nicpm_base)
124*4882a593Smuzhiyun return;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun /* SET RGMII IO CONFIG */
127*4882a593Smuzhiyun writel(NICPM_PADRING_CFG_INIT_VAL,
128*4882a593Smuzhiyun bgmac->plat.nicpm_base + NICPM_PADRING_CFG);
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun val = NICPM_IOMUX_CTRL_INIT_VAL;
131*4882a593Smuzhiyun switch (bgmac->net_dev->phydev->speed) {
132*4882a593Smuzhiyun default:
133*4882a593Smuzhiyun netdev_err(net_dev, "Unsupported speed. Defaulting to 1000Mb\n");
134*4882a593Smuzhiyun fallthrough;
135*4882a593Smuzhiyun case SPEED_1000:
136*4882a593Smuzhiyun val |= NICPM_IOMUX_CTRL_SPD_1000M << NICPM_IOMUX_CTRL_SPD_SHIFT;
137*4882a593Smuzhiyun break;
138*4882a593Smuzhiyun case SPEED_100:
139*4882a593Smuzhiyun val |= NICPM_IOMUX_CTRL_SPD_100M << NICPM_IOMUX_CTRL_SPD_SHIFT;
140*4882a593Smuzhiyun break;
141*4882a593Smuzhiyun case SPEED_10:
142*4882a593Smuzhiyun val |= NICPM_IOMUX_CTRL_SPD_10M << NICPM_IOMUX_CTRL_SPD_SHIFT;
143*4882a593Smuzhiyun break;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun writel(val, bgmac->plat.nicpm_base + NICPM_IOMUX_CTRL);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun bgmac_adjust_link(bgmac->net_dev);
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun
platform_phy_connect(struct bgmac * bgmac)151*4882a593Smuzhiyun static int platform_phy_connect(struct bgmac *bgmac)
152*4882a593Smuzhiyun {
153*4882a593Smuzhiyun struct phy_device *phy_dev;
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (bgmac->plat.nicpm_base)
156*4882a593Smuzhiyun phy_dev = of_phy_get_and_connect(bgmac->net_dev,
157*4882a593Smuzhiyun bgmac->dev->of_node,
158*4882a593Smuzhiyun bgmac_nicpm_speed_set);
159*4882a593Smuzhiyun else
160*4882a593Smuzhiyun phy_dev = of_phy_get_and_connect(bgmac->net_dev,
161*4882a593Smuzhiyun bgmac->dev->of_node,
162*4882a593Smuzhiyun bgmac_adjust_link);
163*4882a593Smuzhiyun if (!phy_dev) {
164*4882a593Smuzhiyun dev_err(bgmac->dev, "PHY connection failed\n");
165*4882a593Smuzhiyun return -ENODEV;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return 0;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
bgmac_probe(struct platform_device * pdev)171*4882a593Smuzhiyun static int bgmac_probe(struct platform_device *pdev)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun struct device_node *np = pdev->dev.of_node;
174*4882a593Smuzhiyun struct bgmac *bgmac;
175*4882a593Smuzhiyun struct resource *regs;
176*4882a593Smuzhiyun const u8 *mac_addr;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun bgmac = bgmac_alloc(&pdev->dev);
179*4882a593Smuzhiyun if (!bgmac)
180*4882a593Smuzhiyun return -ENOMEM;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun platform_set_drvdata(pdev, bgmac);
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun /* Set the features of the 4707 family */
185*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_CLKCTLST;
186*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_NO_RESET;
187*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_CMDCFG_SR_REV4;
188*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_TX_MASK_SETUP;
189*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_RX_MASK_SETUP;
190*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_IDM_MASK;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun bgmac->dev = &pdev->dev;
193*4882a593Smuzhiyun bgmac->dma_dev = &pdev->dev;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun mac_addr = of_get_mac_address(np);
196*4882a593Smuzhiyun if (!IS_ERR(mac_addr))
197*4882a593Smuzhiyun ether_addr_copy(bgmac->net_dev->dev_addr, mac_addr);
198*4882a593Smuzhiyun else
199*4882a593Smuzhiyun dev_warn(&pdev->dev, "MAC address not present in device tree\n");
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun bgmac->irq = platform_get_irq(pdev, 0);
202*4882a593Smuzhiyun if (bgmac->irq < 0)
203*4882a593Smuzhiyun return bgmac->irq;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun bgmac->plat.base =
206*4882a593Smuzhiyun devm_platform_ioremap_resource_byname(pdev, "amac_base");
207*4882a593Smuzhiyun if (IS_ERR(bgmac->plat.base))
208*4882a593Smuzhiyun return PTR_ERR(bgmac->plat.base);
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "idm_base");
211*4882a593Smuzhiyun if (regs) {
212*4882a593Smuzhiyun bgmac->plat.idm_base = devm_ioremap_resource(&pdev->dev, regs);
213*4882a593Smuzhiyun if (IS_ERR(bgmac->plat.idm_base))
214*4882a593Smuzhiyun return PTR_ERR(bgmac->plat.idm_base);
215*4882a593Smuzhiyun bgmac->feature_flags &= ~BGMAC_FEAT_IDM_MASK;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun regs = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nicpm_base");
219*4882a593Smuzhiyun if (regs) {
220*4882a593Smuzhiyun bgmac->plat.nicpm_base = devm_ioremap_resource(&pdev->dev,
221*4882a593Smuzhiyun regs);
222*4882a593Smuzhiyun if (IS_ERR(bgmac->plat.nicpm_base))
223*4882a593Smuzhiyun return PTR_ERR(bgmac->plat.nicpm_base);
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun bgmac->read = platform_bgmac_read;
227*4882a593Smuzhiyun bgmac->write = platform_bgmac_write;
228*4882a593Smuzhiyun bgmac->idm_read = platform_bgmac_idm_read;
229*4882a593Smuzhiyun bgmac->idm_write = platform_bgmac_idm_write;
230*4882a593Smuzhiyun bgmac->clk_enabled = platform_bgmac_clk_enabled;
231*4882a593Smuzhiyun bgmac->clk_enable = platform_bgmac_clk_enable;
232*4882a593Smuzhiyun bgmac->cco_ctl_maskset = platform_bgmac_cco_ctl_maskset;
233*4882a593Smuzhiyun bgmac->get_bus_clock = platform_bgmac_get_bus_clock;
234*4882a593Smuzhiyun bgmac->cmn_maskset32 = platform_bgmac_cmn_maskset32;
235*4882a593Smuzhiyun if (of_parse_phandle(np, "phy-handle", 0)) {
236*4882a593Smuzhiyun bgmac->phy_connect = platform_phy_connect;
237*4882a593Smuzhiyun } else {
238*4882a593Smuzhiyun bgmac->phy_connect = bgmac_phy_connect_direct;
239*4882a593Smuzhiyun bgmac->feature_flags |= BGMAC_FEAT_FORCE_SPEED_2500;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun return bgmac_enet_probe(bgmac);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
bgmac_remove(struct platform_device * pdev)245*4882a593Smuzhiyun static int bgmac_remove(struct platform_device *pdev)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun struct bgmac *bgmac = platform_get_drvdata(pdev);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun bgmac_enet_remove(bgmac);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun return 0;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun #ifdef CONFIG_PM
bgmac_suspend(struct device * dev)255*4882a593Smuzhiyun static int bgmac_suspend(struct device *dev)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun struct bgmac *bgmac = dev_get_drvdata(dev);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun return bgmac_enet_suspend(bgmac);
260*4882a593Smuzhiyun }
261*4882a593Smuzhiyun
bgmac_resume(struct device * dev)262*4882a593Smuzhiyun static int bgmac_resume(struct device *dev)
263*4882a593Smuzhiyun {
264*4882a593Smuzhiyun struct bgmac *bgmac = dev_get_drvdata(dev);
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun return bgmac_enet_resume(bgmac);
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun static const struct dev_pm_ops bgmac_pm_ops = {
270*4882a593Smuzhiyun .suspend = bgmac_suspend,
271*4882a593Smuzhiyun .resume = bgmac_resume
272*4882a593Smuzhiyun };
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun #define BGMAC_PM_OPS (&bgmac_pm_ops)
275*4882a593Smuzhiyun #else
276*4882a593Smuzhiyun #define BGMAC_PM_OPS NULL
277*4882a593Smuzhiyun #endif /* CONFIG_PM */
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun static const struct of_device_id bgmac_of_enet_match[] = {
280*4882a593Smuzhiyun {.compatible = "brcm,amac",},
281*4882a593Smuzhiyun {.compatible = "brcm,nsp-amac",},
282*4882a593Smuzhiyun {.compatible = "brcm,ns2-amac",},
283*4882a593Smuzhiyun {},
284*4882a593Smuzhiyun };
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bgmac_of_enet_match);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun static struct platform_driver bgmac_enet_driver = {
289*4882a593Smuzhiyun .driver = {
290*4882a593Smuzhiyun .name = "bgmac-enet",
291*4882a593Smuzhiyun .of_match_table = bgmac_of_enet_match,
292*4882a593Smuzhiyun .pm = BGMAC_PM_OPS
293*4882a593Smuzhiyun },
294*4882a593Smuzhiyun .probe = bgmac_probe,
295*4882a593Smuzhiyun .remove = bgmac_remove,
296*4882a593Smuzhiyun };
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun module_platform_driver(bgmac_enet_driver);
299*4882a593Smuzhiyun MODULE_LICENSE("GPL");
300