1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Applied Micro X-Gene SoC Ethernet v2 Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2017, Applied Micro Circuits Corporation
6*4882a593Smuzhiyun * Author(s): Iyappan Subramanian <isubramanian@apm.com>
7*4882a593Smuzhiyun * Keyur Chudgar <kchudgar@apm.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #ifndef __XGENE_ENET_V2_RING_H__
11*4882a593Smuzhiyun #define __XGENE_ENET_V2_RING_H__
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define XGENE_ENET_DESC_SIZE 64
14*4882a593Smuzhiyun #define XGENE_ENET_NUM_DESC 256
15*4882a593Smuzhiyun #define NUM_BUFS 8
16*4882a593Smuzhiyun #define SLOT_EMPTY 0xfff
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #define DMATXCTRL 0xa180
19*4882a593Smuzhiyun #define DMATXDESCL 0xa184
20*4882a593Smuzhiyun #define DMATXDESCH 0xa1a0
21*4882a593Smuzhiyun #define DMATXSTATUS 0xa188
22*4882a593Smuzhiyun #define DMARXCTRL 0xa18c
23*4882a593Smuzhiyun #define DMARXDESCL 0xa190
24*4882a593Smuzhiyun #define DMARXDESCH 0xa1a4
25*4882a593Smuzhiyun #define DMARXSTATUS 0xa194
26*4882a593Smuzhiyun #define DMAINTRMASK 0xa198
27*4882a593Smuzhiyun #define DMAINTERRUPT 0xa19c
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define D_POS 62
30*4882a593Smuzhiyun #define D_LEN 2
31*4882a593Smuzhiyun #define E_POS 63
32*4882a593Smuzhiyun #define E_LEN 1
33*4882a593Smuzhiyun #define PKT_ADDRL_POS 0
34*4882a593Smuzhiyun #define PKT_ADDRL_LEN 32
35*4882a593Smuzhiyun #define PKT_ADDRH_POS 32
36*4882a593Smuzhiyun #define PKT_ADDRH_LEN 10
37*4882a593Smuzhiyun #define PKT_SIZE_POS 32
38*4882a593Smuzhiyun #define PKT_SIZE_LEN 12
39*4882a593Smuzhiyun #define NEXT_DESC_ADDRL_POS 0
40*4882a593Smuzhiyun #define NEXT_DESC_ADDRL_LEN 32
41*4882a593Smuzhiyun #define NEXT_DESC_ADDRH_POS 48
42*4882a593Smuzhiyun #define NEXT_DESC_ADDRH_LEN 10
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun #define TXPKTCOUNT_POS 16
45*4882a593Smuzhiyun #define TXPKTCOUNT_LEN 8
46*4882a593Smuzhiyun #define RXPKTCOUNT_POS 16
47*4882a593Smuzhiyun #define RXPKTCOUNT_LEN 8
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define TX_PKT_SENT BIT(0)
50*4882a593Smuzhiyun #define TX_BUS_ERROR BIT(3)
51*4882a593Smuzhiyun #define RX_PKT_RCVD BIT(4)
52*4882a593Smuzhiyun #define RX_BUS_ERROR BIT(7)
53*4882a593Smuzhiyun #define RXSTATUS_RXPKTRCVD BIT(0)
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun struct xge_raw_desc {
56*4882a593Smuzhiyun __le64 m0;
57*4882a593Smuzhiyun __le64 m1;
58*4882a593Smuzhiyun __le64 m2;
59*4882a593Smuzhiyun __le64 m3;
60*4882a593Smuzhiyun __le64 m4;
61*4882a593Smuzhiyun __le64 m5;
62*4882a593Smuzhiyun __le64 m6;
63*4882a593Smuzhiyun __le64 m7;
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun struct pkt_info {
67*4882a593Smuzhiyun struct sk_buff *skb;
68*4882a593Smuzhiyun dma_addr_t dma_addr;
69*4882a593Smuzhiyun void *pkt_buf;
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* software context of a descriptor ring */
73*4882a593Smuzhiyun struct xge_desc_ring {
74*4882a593Smuzhiyun struct net_device *ndev;
75*4882a593Smuzhiyun dma_addr_t dma_addr;
76*4882a593Smuzhiyun u8 head;
77*4882a593Smuzhiyun u8 tail;
78*4882a593Smuzhiyun union {
79*4882a593Smuzhiyun void *desc_addr;
80*4882a593Smuzhiyun struct xge_raw_desc *raw_desc;
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun struct pkt_info (*pkt_info);
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun
xge_set_desc_bits(int pos,int len,u64 val)85*4882a593Smuzhiyun static inline u64 xge_set_desc_bits(int pos, int len, u64 val)
86*4882a593Smuzhiyun {
87*4882a593Smuzhiyun return (val & ((1ULL << len) - 1)) << pos;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
xge_get_desc_bits(int pos,int len,u64 src)90*4882a593Smuzhiyun static inline u64 xge_get_desc_bits(int pos, int len, u64 src)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun return (src >> pos) & ((1ULL << len) - 1);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun #define SET_BITS(field, val) \
96*4882a593Smuzhiyun xge_set_desc_bits(field ## _POS, field ## _LEN, val)
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun #define GET_BITS(field, src) \
99*4882a593Smuzhiyun xge_get_desc_bits(field ## _POS, field ## _LEN, src)
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun void xge_setup_desc(struct xge_desc_ring *ring);
102*4882a593Smuzhiyun void xge_update_tx_desc_addr(struct xge_pdata *pdata);
103*4882a593Smuzhiyun void xge_update_rx_desc_addr(struct xge_pdata *pdata);
104*4882a593Smuzhiyun void xge_intr_enable(struct xge_pdata *pdata);
105*4882a593Smuzhiyun void xge_intr_disable(struct xge_pdata *pdata);
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun #endif /* __XGENE_ENET_V2_RING_H__ */
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