xref: /OK3568_Linux_fs/kernel/drivers/net/ethernet/amd/declance.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *    Lance ethernet driver for the MIPS processor based
4*4882a593Smuzhiyun  *      DECstation family
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *      adopted from sunlance.c by Richard van den Berg
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  *      Copyright (C) 2002, 2003, 2005, 2006  Maciej W. Rozycki
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  *      additional sources:
12*4882a593Smuzhiyun  *      - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
13*4882a593Smuzhiyun  *        Revision 1.2
14*4882a593Smuzhiyun  *
15*4882a593Smuzhiyun  *      History:
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  *      v0.001: The kernel accepts the code and it shows the hardware address.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  *      v0.002: Removed most sparc stuff, left only some module and dma stuff.
20*4882a593Smuzhiyun  *
21*4882a593Smuzhiyun  *      v0.003: Enhanced base address calculation from proposals by
22*4882a593Smuzhiyun  *              Harald Koerfgen and Thomas Riemer.
23*4882a593Smuzhiyun  *
24*4882a593Smuzhiyun  *      v0.004: lance-regs is pointing at the right addresses, added prom
25*4882a593Smuzhiyun  *              check. First start of address mapping and DMA.
26*4882a593Smuzhiyun  *
27*4882a593Smuzhiyun  *      v0.005: started to play around with LANCE-DMA. This driver will not
28*4882a593Smuzhiyun  *              work for non IOASIC lances. HK
29*4882a593Smuzhiyun  *
30*4882a593Smuzhiyun  *      v0.006: added pointer arrays to lance_private and setup routine for
31*4882a593Smuzhiyun  *              them in dec_lance_init. HK
32*4882a593Smuzhiyun  *
33*4882a593Smuzhiyun  *      v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
34*4882a593Smuzhiyun  *              access the init block. This looks like one (short) word at a
35*4882a593Smuzhiyun  *              time, but the smallest amount the IOASIC can transfer is a
36*4882a593Smuzhiyun  *              (long) word. So we have a 2-2 padding here. Changed
37*4882a593Smuzhiyun  *              lance_init_block accordingly. The 16-16 padding for the buffers
38*4882a593Smuzhiyun  *              seems to be correct. HK
39*4882a593Smuzhiyun  *
40*4882a593Smuzhiyun  *      v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
41*4882a593Smuzhiyun  *
42*4882a593Smuzhiyun  *      v0.009: Module support fixes, multiple interfaces support, various
43*4882a593Smuzhiyun  *              bits. macro
44*4882a593Smuzhiyun  *
45*4882a593Smuzhiyun  *      v0.010: Fixes for the PMAD mapping of the LANCE buffer and for the
46*4882a593Smuzhiyun  *              PMAX requirement to only use halfword accesses to the
47*4882a593Smuzhiyun  *              buffer. macro
48*4882a593Smuzhiyun  *
49*4882a593Smuzhiyun  *      v0.011: Converted the PMAD to the driver model. macro
50*4882a593Smuzhiyun  */
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #include <linux/crc32.h>
53*4882a593Smuzhiyun #include <linux/delay.h>
54*4882a593Smuzhiyun #include <linux/errno.h>
55*4882a593Smuzhiyun #include <linux/if_ether.h>
56*4882a593Smuzhiyun #include <linux/init.h>
57*4882a593Smuzhiyun #include <linux/kernel.h>
58*4882a593Smuzhiyun #include <linux/module.h>
59*4882a593Smuzhiyun #include <linux/netdevice.h>
60*4882a593Smuzhiyun #include <linux/etherdevice.h>
61*4882a593Smuzhiyun #include <linux/spinlock.h>
62*4882a593Smuzhiyun #include <linux/stddef.h>
63*4882a593Smuzhiyun #include <linux/string.h>
64*4882a593Smuzhiyun #include <linux/tc.h>
65*4882a593Smuzhiyun #include <linux/types.h>
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #include <asm/addrspace.h>
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #include <asm/dec/interrupts.h>
70*4882a593Smuzhiyun #include <asm/dec/ioasic.h>
71*4882a593Smuzhiyun #include <asm/dec/ioasic_addrs.h>
72*4882a593Smuzhiyun #include <asm/dec/kn01.h>
73*4882a593Smuzhiyun #include <asm/dec/machtype.h>
74*4882a593Smuzhiyun #include <asm/dec/system.h>
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun static const char version[] =
77*4882a593Smuzhiyun "declance.c: v0.011 by Linux MIPS DECstation task force\n";
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun MODULE_AUTHOR("Linux MIPS DECstation task force");
80*4882a593Smuzhiyun MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
81*4882a593Smuzhiyun MODULE_LICENSE("GPL");
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun #define __unused __attribute__ ((unused))
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun  * card types
87*4882a593Smuzhiyun  */
88*4882a593Smuzhiyun #define ASIC_LANCE 1
89*4882a593Smuzhiyun #define PMAD_LANCE 2
90*4882a593Smuzhiyun #define PMAX_LANCE 3
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define LE_CSR0 0
94*4882a593Smuzhiyun #define LE_CSR1 1
95*4882a593Smuzhiyun #define LE_CSR2 2
96*4882a593Smuzhiyun #define LE_CSR3 3
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #define LE_MO_PROM      0x8000	/* Enable promiscuous mode */
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun #define	LE_C0_ERR	0x8000	/* Error: set if BAB, SQE, MISS or ME is set */
101*4882a593Smuzhiyun #define	LE_C0_BABL	0x4000	/* BAB:  Babble: tx timeout. */
102*4882a593Smuzhiyun #define	LE_C0_CERR	0x2000	/* SQE:  Signal quality error */
103*4882a593Smuzhiyun #define	LE_C0_MISS	0x1000	/* MISS: Missed a packet */
104*4882a593Smuzhiyun #define	LE_C0_MERR	0x0800	/* ME:   Memory error */
105*4882a593Smuzhiyun #define	LE_C0_RINT	0x0400	/* Received interrupt */
106*4882a593Smuzhiyun #define	LE_C0_TINT	0x0200	/* Transmitter Interrupt */
107*4882a593Smuzhiyun #define	LE_C0_IDON	0x0100	/* IFIN: Init finished. */
108*4882a593Smuzhiyun #define	LE_C0_INTR	0x0080	/* Interrupt or error */
109*4882a593Smuzhiyun #define	LE_C0_INEA	0x0040	/* Interrupt enable */
110*4882a593Smuzhiyun #define	LE_C0_RXON	0x0020	/* Receiver on */
111*4882a593Smuzhiyun #define	LE_C0_TXON	0x0010	/* Transmitter on */
112*4882a593Smuzhiyun #define	LE_C0_TDMD	0x0008	/* Transmitter demand */
113*4882a593Smuzhiyun #define	LE_C0_STOP	0x0004	/* Stop the card */
114*4882a593Smuzhiyun #define	LE_C0_STRT	0x0002	/* Start the card */
115*4882a593Smuzhiyun #define	LE_C0_INIT	0x0001	/* Init the card */
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #define	LE_C3_BSWP	0x4	/* SWAP */
118*4882a593Smuzhiyun #define	LE_C3_ACON	0x2	/* ALE Control */
119*4882a593Smuzhiyun #define	LE_C3_BCON	0x1	/* Byte control */
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun /* Receive message descriptor 1 */
122*4882a593Smuzhiyun #define LE_R1_OWN	0x8000	/* Who owns the entry */
123*4882a593Smuzhiyun #define LE_R1_ERR	0x4000	/* Error: if FRA, OFL, CRC or BUF is set */
124*4882a593Smuzhiyun #define LE_R1_FRA	0x2000	/* FRA: Frame error */
125*4882a593Smuzhiyun #define LE_R1_OFL	0x1000	/* OFL: Frame overflow */
126*4882a593Smuzhiyun #define LE_R1_CRC	0x0800	/* CRC error */
127*4882a593Smuzhiyun #define LE_R1_BUF	0x0400	/* BUF: Buffer error */
128*4882a593Smuzhiyun #define LE_R1_SOP	0x0200	/* Start of packet */
129*4882a593Smuzhiyun #define LE_R1_EOP	0x0100	/* End of packet */
130*4882a593Smuzhiyun #define LE_R1_POK	0x0300	/* Packet is complete: SOP + EOP */
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun /* Transmit message descriptor 1 */
133*4882a593Smuzhiyun #define LE_T1_OWN	0x8000	/* Lance owns the packet */
134*4882a593Smuzhiyun #define LE_T1_ERR	0x4000	/* Error summary */
135*4882a593Smuzhiyun #define LE_T1_EMORE	0x1000	/* Error: more than one retry needed */
136*4882a593Smuzhiyun #define LE_T1_EONE	0x0800	/* Error: one retry needed */
137*4882a593Smuzhiyun #define LE_T1_EDEF	0x0400	/* Error: deferred */
138*4882a593Smuzhiyun #define LE_T1_SOP	0x0200	/* Start of packet */
139*4882a593Smuzhiyun #define LE_T1_EOP	0x0100	/* End of packet */
140*4882a593Smuzhiyun #define LE_T1_POK	0x0300	/* Packet is complete: SOP + EOP */
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #define LE_T3_BUF       0x8000	/* Buffer error */
143*4882a593Smuzhiyun #define LE_T3_UFL       0x4000	/* Error underflow */
144*4882a593Smuzhiyun #define LE_T3_LCOL      0x1000	/* Error late collision */
145*4882a593Smuzhiyun #define LE_T3_CLOS      0x0800	/* Error carrier loss */
146*4882a593Smuzhiyun #define LE_T3_RTY       0x0400	/* Error retry */
147*4882a593Smuzhiyun #define LE_T3_TDR       0x03ff	/* Time Domain Reflectometry counter */
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun #ifndef LANCE_LOG_TX_BUFFERS
152*4882a593Smuzhiyun #define LANCE_LOG_TX_BUFFERS 4
153*4882a593Smuzhiyun #define LANCE_LOG_RX_BUFFERS 4
154*4882a593Smuzhiyun #endif
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #define TX_RING_SIZE			(1 << (LANCE_LOG_TX_BUFFERS))
157*4882a593Smuzhiyun #define TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun #define RX_RING_SIZE			(1 << (LANCE_LOG_RX_BUFFERS))
160*4882a593Smuzhiyun #define RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun #define PKT_BUF_SZ		1536
163*4882a593Smuzhiyun #define RX_BUFF_SIZE            PKT_BUF_SZ
164*4882a593Smuzhiyun #define TX_BUFF_SIZE            PKT_BUF_SZ
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun #undef TEST_HITS
167*4882a593Smuzhiyun #define ZERO 0
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun /*
170*4882a593Smuzhiyun  * The DS2100/3100 have a linear 64 kB buffer which supports halfword
171*4882a593Smuzhiyun  * accesses only.  Each halfword of the buffer is word-aligned in the
172*4882a593Smuzhiyun  * CPU address space.
173*4882a593Smuzhiyun  *
174*4882a593Smuzhiyun  * The PMAD-AA has a 128 kB buffer on-board.
175*4882a593Smuzhiyun  *
176*4882a593Smuzhiyun  * The IOASIC LANCE devices use a shared memory region.  This region
177*4882a593Smuzhiyun  * as seen from the CPU is (max) 128 kB long and has to be on an 128 kB
178*4882a593Smuzhiyun  * boundary.  The LANCE sees this as a 64 kB long continuous memory
179*4882a593Smuzhiyun  * region.
180*4882a593Smuzhiyun  *
181*4882a593Smuzhiyun  * The LANCE's DMA address is used as an index in this buffer and DMA
182*4882a593Smuzhiyun  * takes place in bursts of eight 16-bit words which are packed into
183*4882a593Smuzhiyun  * four 32-bit words by the IOASIC.  This leads to a strange padding:
184*4882a593Smuzhiyun  * 16 bytes of valid data followed by a 16 byte gap :-(.
185*4882a593Smuzhiyun  */
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun struct lance_rx_desc {
188*4882a593Smuzhiyun 	unsigned short rmd0;		/* low address of packet */
189*4882a593Smuzhiyun 	unsigned short rmd1;		/* high address of packet
190*4882a593Smuzhiyun 					   and descriptor bits */
191*4882a593Smuzhiyun 	short length;			/* 2s complement (negative!)
192*4882a593Smuzhiyun 					   of buffer length */
193*4882a593Smuzhiyun 	unsigned short mblength;	/* actual number of bytes received */
194*4882a593Smuzhiyun };
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun struct lance_tx_desc {
197*4882a593Smuzhiyun 	unsigned short tmd0;		/* low address of packet */
198*4882a593Smuzhiyun 	unsigned short tmd1;		/* high address of packet
199*4882a593Smuzhiyun 					   and descriptor bits */
200*4882a593Smuzhiyun 	short length;			/* 2s complement (negative!)
201*4882a593Smuzhiyun 					   of buffer length */
202*4882a593Smuzhiyun 	unsigned short misc;
203*4882a593Smuzhiyun };
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun /* First part of the LANCE initialization block, described in databook. */
207*4882a593Smuzhiyun struct lance_init_block {
208*4882a593Smuzhiyun 	unsigned short mode;		/* pre-set mode (reg. 15) */
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	unsigned short phys_addr[3];	/* physical ethernet address */
211*4882a593Smuzhiyun 	unsigned short filter[4];	/* multicast filter */
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	/* Receive and transmit ring base, along with extra bits. */
214*4882a593Smuzhiyun 	unsigned short rx_ptr;		/* receive descriptor addr */
215*4882a593Smuzhiyun 	unsigned short rx_len;		/* receive len and high addr */
216*4882a593Smuzhiyun 	unsigned short tx_ptr;		/* transmit descriptor addr */
217*4882a593Smuzhiyun 	unsigned short tx_len;		/* transmit len and high addr */
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	short gap[4];
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	/* The buffer descriptors */
222*4882a593Smuzhiyun 	struct lance_rx_desc brx_ring[RX_RING_SIZE];
223*4882a593Smuzhiyun 	struct lance_tx_desc btx_ring[TX_RING_SIZE];
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun #define BUF_OFFSET_CPU sizeof(struct lance_init_block)
227*4882a593Smuzhiyun #define BUF_OFFSET_LNC sizeof(struct lance_init_block)
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun #define shift_off(off, type)						\
230*4882a593Smuzhiyun 	(type == ASIC_LANCE || type == PMAX_LANCE ? off << 1 : off)
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun #define lib_off(rt, type)						\
233*4882a593Smuzhiyun 	shift_off(offsetof(struct lance_init_block, rt), type)
234*4882a593Smuzhiyun 
235*4882a593Smuzhiyun #define lib_ptr(ib, rt, type) 						\
236*4882a593Smuzhiyun 	((volatile u16 *)((u8 *)(ib) + lib_off(rt, type)))
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun #define rds_off(rt, type)						\
239*4882a593Smuzhiyun 	shift_off(offsetof(struct lance_rx_desc, rt), type)
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun #define rds_ptr(rd, rt, type) 						\
242*4882a593Smuzhiyun 	((volatile u16 *)((u8 *)(rd) + rds_off(rt, type)))
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun #define tds_off(rt, type)						\
245*4882a593Smuzhiyun 	shift_off(offsetof(struct lance_tx_desc, rt), type)
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun #define tds_ptr(td, rt, type) 						\
248*4882a593Smuzhiyun 	((volatile u16 *)((u8 *)(td) + tds_off(rt, type)))
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun struct lance_private {
251*4882a593Smuzhiyun 	struct net_device *next;
252*4882a593Smuzhiyun 	int type;
253*4882a593Smuzhiyun 	int dma_irq;
254*4882a593Smuzhiyun 	volatile struct lance_regs *ll;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	spinlock_t	lock;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	int rx_new, tx_new;
259*4882a593Smuzhiyun 	int rx_old, tx_old;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	unsigned short busmaster_regval;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	struct timer_list       multicast_timer;
264*4882a593Smuzhiyun 	struct net_device	*dev;
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	/* Pointers to the ring buffers as seen from the CPU */
267*4882a593Smuzhiyun 	char *rx_buf_ptr_cpu[RX_RING_SIZE];
268*4882a593Smuzhiyun 	char *tx_buf_ptr_cpu[TX_RING_SIZE];
269*4882a593Smuzhiyun 
270*4882a593Smuzhiyun 	/* Pointers to the ring buffers as seen from the LANCE */
271*4882a593Smuzhiyun 	uint rx_buf_ptr_lnc[RX_RING_SIZE];
272*4882a593Smuzhiyun 	uint tx_buf_ptr_lnc[TX_RING_SIZE];
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
276*4882a593Smuzhiyun 			lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
277*4882a593Smuzhiyun 			lp->tx_old - lp->tx_new-1)
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun /* The lance control ports are at an absolute address, machine and tc-slot
280*4882a593Smuzhiyun  * dependent.
281*4882a593Smuzhiyun  * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
282*4882a593Smuzhiyun  * so we have to give the structure an extra member making rap pointing
283*4882a593Smuzhiyun  * at the right address
284*4882a593Smuzhiyun  */
285*4882a593Smuzhiyun struct lance_regs {
286*4882a593Smuzhiyun 	volatile unsigned short rdp;	/* register data port */
287*4882a593Smuzhiyun 	unsigned short pad;
288*4882a593Smuzhiyun 	volatile unsigned short rap;	/* register address port */
289*4882a593Smuzhiyun };
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun int dec_lance_debug = 2;
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun static struct tc_driver dec_lance_tc_driver;
294*4882a593Smuzhiyun static struct net_device *root_lance_dev;
295*4882a593Smuzhiyun 
writereg(volatile unsigned short * regptr,short value)296*4882a593Smuzhiyun static inline void writereg(volatile unsigned short *regptr, short value)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun 	*regptr = value;
299*4882a593Smuzhiyun 	iob();
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun /* Load the CSR registers */
load_csrs(struct lance_private * lp)303*4882a593Smuzhiyun static void load_csrs(struct lance_private *lp)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
306*4882a593Smuzhiyun 	uint leptr;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	/* The address space as seen from the LANCE
309*4882a593Smuzhiyun 	 * begins at address 0. HK
310*4882a593Smuzhiyun 	 */
311*4882a593Smuzhiyun 	leptr = 0;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR1);
314*4882a593Smuzhiyun 	writereg(&ll->rdp, (leptr & 0xFFFF));
315*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR2);
316*4882a593Smuzhiyun 	writereg(&ll->rdp, leptr >> 16);
317*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR3);
318*4882a593Smuzhiyun 	writereg(&ll->rdp, lp->busmaster_regval);
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	/* Point back to csr0 */
321*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun 
324*4882a593Smuzhiyun /*
325*4882a593Smuzhiyun  * Our specialized copy routines
326*4882a593Smuzhiyun  *
327*4882a593Smuzhiyun  */
cp_to_buf(const int type,void * to,const void * from,int len)328*4882a593Smuzhiyun static void cp_to_buf(const int type, void *to, const void *from, int len)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun 	unsigned short *tp;
331*4882a593Smuzhiyun 	const unsigned short *fp;
332*4882a593Smuzhiyun 	unsigned short clen;
333*4882a593Smuzhiyun 	unsigned char *rtp;
334*4882a593Smuzhiyun 	const unsigned char *rfp;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	if (type == PMAD_LANCE) {
337*4882a593Smuzhiyun 		memcpy(to, from, len);
338*4882a593Smuzhiyun 	} else if (type == PMAX_LANCE) {
339*4882a593Smuzhiyun 		clen = len >> 1;
340*4882a593Smuzhiyun 		tp = to;
341*4882a593Smuzhiyun 		fp = from;
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun 		while (clen--) {
344*4882a593Smuzhiyun 			*tp++ = *fp++;
345*4882a593Smuzhiyun 			tp++;
346*4882a593Smuzhiyun 		}
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 		clen = len & 1;
349*4882a593Smuzhiyun 		rtp = (unsigned char *)tp;
350*4882a593Smuzhiyun 		rfp = (const unsigned char *)fp;
351*4882a593Smuzhiyun 		while (clen--) {
352*4882a593Smuzhiyun 			*rtp++ = *rfp++;
353*4882a593Smuzhiyun 		}
354*4882a593Smuzhiyun 	} else {
355*4882a593Smuzhiyun 		/*
356*4882a593Smuzhiyun 		 * copy 16 Byte chunks
357*4882a593Smuzhiyun 		 */
358*4882a593Smuzhiyun 		clen = len >> 4;
359*4882a593Smuzhiyun 		tp = to;
360*4882a593Smuzhiyun 		fp = from;
361*4882a593Smuzhiyun 		while (clen--) {
362*4882a593Smuzhiyun 			*tp++ = *fp++;
363*4882a593Smuzhiyun 			*tp++ = *fp++;
364*4882a593Smuzhiyun 			*tp++ = *fp++;
365*4882a593Smuzhiyun 			*tp++ = *fp++;
366*4882a593Smuzhiyun 			*tp++ = *fp++;
367*4882a593Smuzhiyun 			*tp++ = *fp++;
368*4882a593Smuzhiyun 			*tp++ = *fp++;
369*4882a593Smuzhiyun 			*tp++ = *fp++;
370*4882a593Smuzhiyun 			tp += 8;
371*4882a593Smuzhiyun 		}
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun 		/*
374*4882a593Smuzhiyun 		 * do the rest, if any.
375*4882a593Smuzhiyun 		 */
376*4882a593Smuzhiyun 		clen = len & 15;
377*4882a593Smuzhiyun 		rtp = (unsigned char *)tp;
378*4882a593Smuzhiyun 		rfp = (const unsigned char *)fp;
379*4882a593Smuzhiyun 		while (clen--) {
380*4882a593Smuzhiyun 			*rtp++ = *rfp++;
381*4882a593Smuzhiyun 		}
382*4882a593Smuzhiyun 	}
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	iob();
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun 
cp_from_buf(const int type,void * to,const void * from,int len)387*4882a593Smuzhiyun static void cp_from_buf(const int type, void *to, const void *from, int len)
388*4882a593Smuzhiyun {
389*4882a593Smuzhiyun 	unsigned short *tp;
390*4882a593Smuzhiyun 	const unsigned short *fp;
391*4882a593Smuzhiyun 	unsigned short clen;
392*4882a593Smuzhiyun 	unsigned char *rtp;
393*4882a593Smuzhiyun 	const unsigned char *rfp;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	if (type == PMAD_LANCE) {
396*4882a593Smuzhiyun 		memcpy(to, from, len);
397*4882a593Smuzhiyun 	} else if (type == PMAX_LANCE) {
398*4882a593Smuzhiyun 		clen = len >> 1;
399*4882a593Smuzhiyun 		tp = to;
400*4882a593Smuzhiyun 		fp = from;
401*4882a593Smuzhiyun 		while (clen--) {
402*4882a593Smuzhiyun 			*tp++ = *fp++;
403*4882a593Smuzhiyun 			fp++;
404*4882a593Smuzhiyun 		}
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 		clen = len & 1;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 		rtp = (unsigned char *)tp;
409*4882a593Smuzhiyun 		rfp = (const unsigned char *)fp;
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 		while (clen--) {
412*4882a593Smuzhiyun 			*rtp++ = *rfp++;
413*4882a593Smuzhiyun 		}
414*4882a593Smuzhiyun 	} else {
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 		/*
417*4882a593Smuzhiyun 		 * copy 16 Byte chunks
418*4882a593Smuzhiyun 		 */
419*4882a593Smuzhiyun 		clen = len >> 4;
420*4882a593Smuzhiyun 		tp = to;
421*4882a593Smuzhiyun 		fp = from;
422*4882a593Smuzhiyun 		while (clen--) {
423*4882a593Smuzhiyun 			*tp++ = *fp++;
424*4882a593Smuzhiyun 			*tp++ = *fp++;
425*4882a593Smuzhiyun 			*tp++ = *fp++;
426*4882a593Smuzhiyun 			*tp++ = *fp++;
427*4882a593Smuzhiyun 			*tp++ = *fp++;
428*4882a593Smuzhiyun 			*tp++ = *fp++;
429*4882a593Smuzhiyun 			*tp++ = *fp++;
430*4882a593Smuzhiyun 			*tp++ = *fp++;
431*4882a593Smuzhiyun 			fp += 8;
432*4882a593Smuzhiyun 		}
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 		/*
435*4882a593Smuzhiyun 		 * do the rest, if any.
436*4882a593Smuzhiyun 		 */
437*4882a593Smuzhiyun 		clen = len & 15;
438*4882a593Smuzhiyun 		rtp = (unsigned char *)tp;
439*4882a593Smuzhiyun 		rfp = (const unsigned char *)fp;
440*4882a593Smuzhiyun 		while (clen--) {
441*4882a593Smuzhiyun 			*rtp++ = *rfp++;
442*4882a593Smuzhiyun 		}
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	}
446*4882a593Smuzhiyun 
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun /* Setup the Lance Rx and Tx rings */
lance_init_ring(struct net_device * dev)450*4882a593Smuzhiyun static void lance_init_ring(struct net_device *dev)
451*4882a593Smuzhiyun {
452*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
453*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
454*4882a593Smuzhiyun 	uint leptr;
455*4882a593Smuzhiyun 	int i;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	/* Lock out other processes while setting up hardware */
458*4882a593Smuzhiyun 	netif_stop_queue(dev);
459*4882a593Smuzhiyun 	lp->rx_new = lp->tx_new = 0;
460*4882a593Smuzhiyun 	lp->rx_old = lp->tx_old = 0;
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	/* Copy the ethernet address to the lance init block.
463*4882a593Smuzhiyun 	 * XXX bit 0 of the physical address registers has to be zero
464*4882a593Smuzhiyun 	 */
465*4882a593Smuzhiyun 	*lib_ptr(ib, phys_addr[0], lp->type) = (dev->dev_addr[1] << 8) |
466*4882a593Smuzhiyun 				     dev->dev_addr[0];
467*4882a593Smuzhiyun 	*lib_ptr(ib, phys_addr[1], lp->type) = (dev->dev_addr[3] << 8) |
468*4882a593Smuzhiyun 				     dev->dev_addr[2];
469*4882a593Smuzhiyun 	*lib_ptr(ib, phys_addr[2], lp->type) = (dev->dev_addr[5] << 8) |
470*4882a593Smuzhiyun 				     dev->dev_addr[4];
471*4882a593Smuzhiyun 	/* Setup the initialization block */
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 	/* Setup rx descriptor pointer */
474*4882a593Smuzhiyun 	leptr = offsetof(struct lance_init_block, brx_ring);
475*4882a593Smuzhiyun 	*lib_ptr(ib, rx_len, lp->type) = (LANCE_LOG_RX_BUFFERS << 13) |
476*4882a593Smuzhiyun 					 (leptr >> 16);
477*4882a593Smuzhiyun 	*lib_ptr(ib, rx_ptr, lp->type) = leptr;
478*4882a593Smuzhiyun 	if (ZERO)
479*4882a593Smuzhiyun 		printk("RX ptr: %8.8x(%8.8x)\n",
480*4882a593Smuzhiyun 		       leptr, (uint)lib_off(brx_ring, lp->type));
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	/* Setup tx descriptor pointer */
483*4882a593Smuzhiyun 	leptr = offsetof(struct lance_init_block, btx_ring);
484*4882a593Smuzhiyun 	*lib_ptr(ib, tx_len, lp->type) = (LANCE_LOG_TX_BUFFERS << 13) |
485*4882a593Smuzhiyun 					 (leptr >> 16);
486*4882a593Smuzhiyun 	*lib_ptr(ib, tx_ptr, lp->type) = leptr;
487*4882a593Smuzhiyun 	if (ZERO)
488*4882a593Smuzhiyun 		printk("TX ptr: %8.8x(%8.8x)\n",
489*4882a593Smuzhiyun 		       leptr, (uint)lib_off(btx_ring, lp->type));
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	if (ZERO)
492*4882a593Smuzhiyun 		printk("TX rings:\n");
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun 	/* Setup the Tx ring entries */
495*4882a593Smuzhiyun 	for (i = 0; i < TX_RING_SIZE; i++) {
496*4882a593Smuzhiyun 		leptr = lp->tx_buf_ptr_lnc[i];
497*4882a593Smuzhiyun 		*lib_ptr(ib, btx_ring[i].tmd0, lp->type) = leptr;
498*4882a593Smuzhiyun 		*lib_ptr(ib, btx_ring[i].tmd1, lp->type) = (leptr >> 16) &
499*4882a593Smuzhiyun 							   0xff;
500*4882a593Smuzhiyun 		*lib_ptr(ib, btx_ring[i].length, lp->type) = 0xf000;
501*4882a593Smuzhiyun 						/* The ones required by tmd2 */
502*4882a593Smuzhiyun 		*lib_ptr(ib, btx_ring[i].misc, lp->type) = 0;
503*4882a593Smuzhiyun 		if (i < 3 && ZERO)
504*4882a593Smuzhiyun 			printk("%d: %8.8x(%p)\n",
505*4882a593Smuzhiyun 			       i, leptr, lp->tx_buf_ptr_cpu[i]);
506*4882a593Smuzhiyun 	}
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	/* Setup the Rx ring entries */
509*4882a593Smuzhiyun 	if (ZERO)
510*4882a593Smuzhiyun 		printk("RX rings:\n");
511*4882a593Smuzhiyun 	for (i = 0; i < RX_RING_SIZE; i++) {
512*4882a593Smuzhiyun 		leptr = lp->rx_buf_ptr_lnc[i];
513*4882a593Smuzhiyun 		*lib_ptr(ib, brx_ring[i].rmd0, lp->type) = leptr;
514*4882a593Smuzhiyun 		*lib_ptr(ib, brx_ring[i].rmd1, lp->type) = ((leptr >> 16) &
515*4882a593Smuzhiyun 							    0xff) |
516*4882a593Smuzhiyun 							   LE_R1_OWN;
517*4882a593Smuzhiyun 		*lib_ptr(ib, brx_ring[i].length, lp->type) = -RX_BUFF_SIZE |
518*4882a593Smuzhiyun 							     0xf000;
519*4882a593Smuzhiyun 		*lib_ptr(ib, brx_ring[i].mblength, lp->type) = 0;
520*4882a593Smuzhiyun 		if (i < 3 && ZERO)
521*4882a593Smuzhiyun 			printk("%d: %8.8x(%p)\n",
522*4882a593Smuzhiyun 			       i, leptr, lp->rx_buf_ptr_cpu[i]);
523*4882a593Smuzhiyun 	}
524*4882a593Smuzhiyun 	iob();
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun 
init_restart_lance(struct lance_private * lp)527*4882a593Smuzhiyun static int init_restart_lance(struct lance_private *lp)
528*4882a593Smuzhiyun {
529*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
530*4882a593Smuzhiyun 	int i;
531*4882a593Smuzhiyun 
532*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
533*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_INIT);
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	/* Wait for the lance to complete initialization */
536*4882a593Smuzhiyun 	for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
537*4882a593Smuzhiyun 		udelay(10);
538*4882a593Smuzhiyun 	}
539*4882a593Smuzhiyun 	if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
540*4882a593Smuzhiyun 		printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
541*4882a593Smuzhiyun 		       i, ll->rdp);
542*4882a593Smuzhiyun 		return -1;
543*4882a593Smuzhiyun 	}
544*4882a593Smuzhiyun 	if ((ll->rdp & LE_C0_ERR)) {
545*4882a593Smuzhiyun 		printk("LANCE unopened after %d ticks, csr0=%4.4x.\n",
546*4882a593Smuzhiyun 		       i, ll->rdp);
547*4882a593Smuzhiyun 		return -1;
548*4882a593Smuzhiyun 	}
549*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_IDON);
550*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_STRT);
551*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_INEA);
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	return 0;
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun 
lance_rx(struct net_device * dev)556*4882a593Smuzhiyun static int lance_rx(struct net_device *dev)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
559*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
560*4882a593Smuzhiyun 	volatile u16 *rd;
561*4882a593Smuzhiyun 	unsigned short bits;
562*4882a593Smuzhiyun 	int entry, len;
563*4882a593Smuzhiyun 	struct sk_buff *skb;
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun #ifdef TEST_HITS
566*4882a593Smuzhiyun 	{
567*4882a593Smuzhiyun 		int i;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 		printk("[");
570*4882a593Smuzhiyun 		for (i = 0; i < RX_RING_SIZE; i++) {
571*4882a593Smuzhiyun 			if (i == lp->rx_new)
572*4882a593Smuzhiyun 				printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
573*4882a593Smuzhiyun 						      lp->type) &
574*4882a593Smuzhiyun 					     LE_R1_OWN ? "_" : "X");
575*4882a593Smuzhiyun 			else
576*4882a593Smuzhiyun 				printk("%s", *lib_ptr(ib, brx_ring[i].rmd1,
577*4882a593Smuzhiyun 						      lp->type) &
578*4882a593Smuzhiyun 					     LE_R1_OWN ? "." : "1");
579*4882a593Smuzhiyun 		}
580*4882a593Smuzhiyun 		printk("]");
581*4882a593Smuzhiyun 	}
582*4882a593Smuzhiyun #endif
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	for (rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type);
585*4882a593Smuzhiyun 	     !((bits = *rds_ptr(rd, rmd1, lp->type)) & LE_R1_OWN);
586*4882a593Smuzhiyun 	     rd = lib_ptr(ib, brx_ring[lp->rx_new], lp->type)) {
587*4882a593Smuzhiyun 		entry = lp->rx_new;
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 		/* We got an incomplete frame? */
590*4882a593Smuzhiyun 		if ((bits & LE_R1_POK) != LE_R1_POK) {
591*4882a593Smuzhiyun 			dev->stats.rx_over_errors++;
592*4882a593Smuzhiyun 			dev->stats.rx_errors++;
593*4882a593Smuzhiyun 		} else if (bits & LE_R1_ERR) {
594*4882a593Smuzhiyun 			/* Count only the end frame as a rx error,
595*4882a593Smuzhiyun 			 * not the beginning
596*4882a593Smuzhiyun 			 */
597*4882a593Smuzhiyun 			if (bits & LE_R1_BUF)
598*4882a593Smuzhiyun 				dev->stats.rx_fifo_errors++;
599*4882a593Smuzhiyun 			if (bits & LE_R1_CRC)
600*4882a593Smuzhiyun 				dev->stats.rx_crc_errors++;
601*4882a593Smuzhiyun 			if (bits & LE_R1_OFL)
602*4882a593Smuzhiyun 				dev->stats.rx_over_errors++;
603*4882a593Smuzhiyun 			if (bits & LE_R1_FRA)
604*4882a593Smuzhiyun 				dev->stats.rx_frame_errors++;
605*4882a593Smuzhiyun 			if (bits & LE_R1_EOP)
606*4882a593Smuzhiyun 				dev->stats.rx_errors++;
607*4882a593Smuzhiyun 		} else {
608*4882a593Smuzhiyun 			len = (*rds_ptr(rd, mblength, lp->type) & 0xfff) - 4;
609*4882a593Smuzhiyun 			skb = netdev_alloc_skb(dev, len + 2);
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 			if (!skb) {
612*4882a593Smuzhiyun 				dev->stats.rx_dropped++;
613*4882a593Smuzhiyun 				*rds_ptr(rd, mblength, lp->type) = 0;
614*4882a593Smuzhiyun 				*rds_ptr(rd, rmd1, lp->type) =
615*4882a593Smuzhiyun 					((lp->rx_buf_ptr_lnc[entry] >> 16) &
616*4882a593Smuzhiyun 					 0xff) | LE_R1_OWN;
617*4882a593Smuzhiyun 				lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
618*4882a593Smuzhiyun 				return 0;
619*4882a593Smuzhiyun 			}
620*4882a593Smuzhiyun 			dev->stats.rx_bytes += len;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 			skb_reserve(skb, 2);	/* 16 byte align */
623*4882a593Smuzhiyun 			skb_put(skb, len);	/* make room */
624*4882a593Smuzhiyun 
625*4882a593Smuzhiyun 			cp_from_buf(lp->type, skb->data,
626*4882a593Smuzhiyun 				    lp->rx_buf_ptr_cpu[entry], len);
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 			skb->protocol = eth_type_trans(skb, dev);
629*4882a593Smuzhiyun 			netif_rx(skb);
630*4882a593Smuzhiyun 			dev->stats.rx_packets++;
631*4882a593Smuzhiyun 		}
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 		/* Return the packet to the pool */
634*4882a593Smuzhiyun 		*rds_ptr(rd, mblength, lp->type) = 0;
635*4882a593Smuzhiyun 		*rds_ptr(rd, length, lp->type) = -RX_BUFF_SIZE | 0xf000;
636*4882a593Smuzhiyun 		*rds_ptr(rd, rmd1, lp->type) =
637*4882a593Smuzhiyun 			((lp->rx_buf_ptr_lnc[entry] >> 16) & 0xff) | LE_R1_OWN;
638*4882a593Smuzhiyun 		lp->rx_new = (entry + 1) & RX_RING_MOD_MASK;
639*4882a593Smuzhiyun 	}
640*4882a593Smuzhiyun 	return 0;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun 
lance_tx(struct net_device * dev)643*4882a593Smuzhiyun static void lance_tx(struct net_device *dev)
644*4882a593Smuzhiyun {
645*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
646*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
647*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
648*4882a593Smuzhiyun 	volatile u16 *td;
649*4882a593Smuzhiyun 	int i, j;
650*4882a593Smuzhiyun 	int status;
651*4882a593Smuzhiyun 
652*4882a593Smuzhiyun 	j = lp->tx_old;
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	spin_lock(&lp->lock);
655*4882a593Smuzhiyun 
656*4882a593Smuzhiyun 	for (i = j; i != lp->tx_new; i = j) {
657*4882a593Smuzhiyun 		td = lib_ptr(ib, btx_ring[i], lp->type);
658*4882a593Smuzhiyun 		/* If we hit a packet not owned by us, stop */
659*4882a593Smuzhiyun 		if (*tds_ptr(td, tmd1, lp->type) & LE_T1_OWN)
660*4882a593Smuzhiyun 			break;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 		if (*tds_ptr(td, tmd1, lp->type) & LE_T1_ERR) {
663*4882a593Smuzhiyun 			status = *tds_ptr(td, misc, lp->type);
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 			dev->stats.tx_errors++;
666*4882a593Smuzhiyun 			if (status & LE_T3_RTY)
667*4882a593Smuzhiyun 				dev->stats.tx_aborted_errors++;
668*4882a593Smuzhiyun 			if (status & LE_T3_LCOL)
669*4882a593Smuzhiyun 				dev->stats.tx_window_errors++;
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 			if (status & LE_T3_CLOS) {
672*4882a593Smuzhiyun 				dev->stats.tx_carrier_errors++;
673*4882a593Smuzhiyun 				printk("%s: Carrier Lost\n", dev->name);
674*4882a593Smuzhiyun 				/* Stop the lance */
675*4882a593Smuzhiyun 				writereg(&ll->rap, LE_CSR0);
676*4882a593Smuzhiyun 				writereg(&ll->rdp, LE_C0_STOP);
677*4882a593Smuzhiyun 				lance_init_ring(dev);
678*4882a593Smuzhiyun 				load_csrs(lp);
679*4882a593Smuzhiyun 				init_restart_lance(lp);
680*4882a593Smuzhiyun 				goto out;
681*4882a593Smuzhiyun 			}
682*4882a593Smuzhiyun 			/* Buffer errors and underflows turn off the
683*4882a593Smuzhiyun 			 * transmitter, restart the adapter.
684*4882a593Smuzhiyun 			 */
685*4882a593Smuzhiyun 			if (status & (LE_T3_BUF | LE_T3_UFL)) {
686*4882a593Smuzhiyun 				dev->stats.tx_fifo_errors++;
687*4882a593Smuzhiyun 
688*4882a593Smuzhiyun 				printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
689*4882a593Smuzhiyun 				       dev->name);
690*4882a593Smuzhiyun 				/* Stop the lance */
691*4882a593Smuzhiyun 				writereg(&ll->rap, LE_CSR0);
692*4882a593Smuzhiyun 				writereg(&ll->rdp, LE_C0_STOP);
693*4882a593Smuzhiyun 				lance_init_ring(dev);
694*4882a593Smuzhiyun 				load_csrs(lp);
695*4882a593Smuzhiyun 				init_restart_lance(lp);
696*4882a593Smuzhiyun 				goto out;
697*4882a593Smuzhiyun 			}
698*4882a593Smuzhiyun 		} else if ((*tds_ptr(td, tmd1, lp->type) & LE_T1_POK) ==
699*4882a593Smuzhiyun 			   LE_T1_POK) {
700*4882a593Smuzhiyun 			/*
701*4882a593Smuzhiyun 			 * So we don't count the packet more than once.
702*4882a593Smuzhiyun 			 */
703*4882a593Smuzhiyun 			*tds_ptr(td, tmd1, lp->type) &= ~(LE_T1_POK);
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 			/* One collision before packet was sent. */
706*4882a593Smuzhiyun 			if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EONE)
707*4882a593Smuzhiyun 				dev->stats.collisions++;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 			/* More than one collision, be optimistic. */
710*4882a593Smuzhiyun 			if (*tds_ptr(td, tmd1, lp->type) & LE_T1_EMORE)
711*4882a593Smuzhiyun 				dev->stats.collisions += 2;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 			dev->stats.tx_packets++;
714*4882a593Smuzhiyun 		}
715*4882a593Smuzhiyun 		j = (j + 1) & TX_RING_MOD_MASK;
716*4882a593Smuzhiyun 	}
717*4882a593Smuzhiyun 	lp->tx_old = j;
718*4882a593Smuzhiyun out:
719*4882a593Smuzhiyun 	if (netif_queue_stopped(dev) &&
720*4882a593Smuzhiyun 	    TX_BUFFS_AVAIL > 0)
721*4882a593Smuzhiyun 		netif_wake_queue(dev);
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	spin_unlock(&lp->lock);
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun 
lance_dma_merr_int(int irq,void * dev_id)726*4882a593Smuzhiyun static irqreturn_t lance_dma_merr_int(int irq, void *dev_id)
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun 	struct net_device *dev = dev_id;
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	printk(KERN_ERR "%s: DMA error\n", dev->name);
731*4882a593Smuzhiyun 	return IRQ_HANDLED;
732*4882a593Smuzhiyun }
733*4882a593Smuzhiyun 
lance_interrupt(int irq,void * dev_id)734*4882a593Smuzhiyun static irqreturn_t lance_interrupt(int irq, void *dev_id)
735*4882a593Smuzhiyun {
736*4882a593Smuzhiyun 	struct net_device *dev = dev_id;
737*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
738*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
739*4882a593Smuzhiyun 	int csr0;
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
742*4882a593Smuzhiyun 	csr0 = ll->rdp;
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	/* Acknowledge all the interrupt sources ASAP */
745*4882a593Smuzhiyun 	writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	if ((csr0 & LE_C0_ERR)) {
748*4882a593Smuzhiyun 		/* Clear the error condition */
749*4882a593Smuzhiyun 		writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
750*4882a593Smuzhiyun 			 LE_C0_CERR | LE_C0_MERR);
751*4882a593Smuzhiyun 	}
752*4882a593Smuzhiyun 	if (csr0 & LE_C0_RINT)
753*4882a593Smuzhiyun 		lance_rx(dev);
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	if (csr0 & LE_C0_TINT)
756*4882a593Smuzhiyun 		lance_tx(dev);
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	if (csr0 & LE_C0_BABL)
759*4882a593Smuzhiyun 		dev->stats.tx_errors++;
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 	if (csr0 & LE_C0_MISS)
762*4882a593Smuzhiyun 		dev->stats.rx_errors++;
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun 	if (csr0 & LE_C0_MERR) {
765*4882a593Smuzhiyun 		printk("%s: Memory error, status %04x\n", dev->name, csr0);
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun 		writereg(&ll->rdp, LE_C0_STOP);
768*4882a593Smuzhiyun 
769*4882a593Smuzhiyun 		lance_init_ring(dev);
770*4882a593Smuzhiyun 		load_csrs(lp);
771*4882a593Smuzhiyun 		init_restart_lance(lp);
772*4882a593Smuzhiyun 		netif_wake_queue(dev);
773*4882a593Smuzhiyun 	}
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_INEA);
776*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_INEA);
777*4882a593Smuzhiyun 	return IRQ_HANDLED;
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun 
lance_open(struct net_device * dev)780*4882a593Smuzhiyun static int lance_open(struct net_device *dev)
781*4882a593Smuzhiyun {
782*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
783*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
784*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
785*4882a593Smuzhiyun 	int status = 0;
786*4882a593Smuzhiyun 
787*4882a593Smuzhiyun 	/* Stop the Lance */
788*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
789*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_STOP);
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	/* Set mode and clear multicast filter only at device open,
792*4882a593Smuzhiyun 	 * so that lance_init_ring() called at any error will not
793*4882a593Smuzhiyun 	 * forget multicast filters.
794*4882a593Smuzhiyun 	 *
795*4882a593Smuzhiyun 	 * BTW it is common bug in all lance drivers! --ANK
796*4882a593Smuzhiyun 	 */
797*4882a593Smuzhiyun 	*lib_ptr(ib, mode, lp->type) = 0;
798*4882a593Smuzhiyun 	*lib_ptr(ib, filter[0], lp->type) = 0;
799*4882a593Smuzhiyun 	*lib_ptr(ib, filter[1], lp->type) = 0;
800*4882a593Smuzhiyun 	*lib_ptr(ib, filter[2], lp->type) = 0;
801*4882a593Smuzhiyun 	*lib_ptr(ib, filter[3], lp->type) = 0;
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	lance_init_ring(dev);
804*4882a593Smuzhiyun 	load_csrs(lp);
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	netif_start_queue(dev);
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	/* Associate IRQ with lance_interrupt */
809*4882a593Smuzhiyun 	if (request_irq(dev->irq, lance_interrupt, 0, "lance", dev)) {
810*4882a593Smuzhiyun 		printk("%s: Can't get IRQ %d\n", dev->name, dev->irq);
811*4882a593Smuzhiyun 		return -EAGAIN;
812*4882a593Smuzhiyun 	}
813*4882a593Smuzhiyun 	if (lp->dma_irq >= 0) {
814*4882a593Smuzhiyun 		unsigned long flags;
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 		if (request_irq(lp->dma_irq, lance_dma_merr_int, IRQF_ONESHOT,
817*4882a593Smuzhiyun 				"lance error", dev)) {
818*4882a593Smuzhiyun 			free_irq(dev->irq, dev);
819*4882a593Smuzhiyun 			printk("%s: Can't get DMA IRQ %d\n", dev->name,
820*4882a593Smuzhiyun 				lp->dma_irq);
821*4882a593Smuzhiyun 			return -EAGAIN;
822*4882a593Smuzhiyun 		}
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 		spin_lock_irqsave(&ioasic_ssr_lock, flags);
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 		fast_mb();
827*4882a593Smuzhiyun 		/* Enable I/O ASIC LANCE DMA.  */
828*4882a593Smuzhiyun 		ioasic_write(IO_REG_SSR,
829*4882a593Smuzhiyun 			     ioasic_read(IO_REG_SSR) | IO_SSR_LANCE_DMA_EN);
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun 		fast_mb();
832*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
833*4882a593Smuzhiyun 	}
834*4882a593Smuzhiyun 
835*4882a593Smuzhiyun 	status = init_restart_lance(lp);
836*4882a593Smuzhiyun 	return status;
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun 
lance_close(struct net_device * dev)839*4882a593Smuzhiyun static int lance_close(struct net_device *dev)
840*4882a593Smuzhiyun {
841*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
842*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 	netif_stop_queue(dev);
845*4882a593Smuzhiyun 	del_timer_sync(&lp->multicast_timer);
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	/* Stop the card */
848*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
849*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_STOP);
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	if (lp->dma_irq >= 0) {
852*4882a593Smuzhiyun 		unsigned long flags;
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 		spin_lock_irqsave(&ioasic_ssr_lock, flags);
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun 		fast_mb();
857*4882a593Smuzhiyun 		/* Disable I/O ASIC LANCE DMA.  */
858*4882a593Smuzhiyun 		ioasic_write(IO_REG_SSR,
859*4882a593Smuzhiyun 			     ioasic_read(IO_REG_SSR) & ~IO_SSR_LANCE_DMA_EN);
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 		fast_iob();
862*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 		free_irq(lp->dma_irq, dev);
865*4882a593Smuzhiyun 	}
866*4882a593Smuzhiyun 	free_irq(dev->irq, dev);
867*4882a593Smuzhiyun 	return 0;
868*4882a593Smuzhiyun }
869*4882a593Smuzhiyun 
lance_reset(struct net_device * dev)870*4882a593Smuzhiyun static inline int lance_reset(struct net_device *dev)
871*4882a593Smuzhiyun {
872*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
873*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
874*4882a593Smuzhiyun 	int status;
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun 	/* Stop the lance */
877*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
878*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_STOP);
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	lance_init_ring(dev);
881*4882a593Smuzhiyun 	load_csrs(lp);
882*4882a593Smuzhiyun 	netif_trans_update(dev); /* prevent tx timeout */
883*4882a593Smuzhiyun 	status = init_restart_lance(lp);
884*4882a593Smuzhiyun 	return status;
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun 
lance_tx_timeout(struct net_device * dev,unsigned int txqueue)887*4882a593Smuzhiyun static void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)
888*4882a593Smuzhiyun {
889*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
890*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
891*4882a593Smuzhiyun 
892*4882a593Smuzhiyun 	printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
893*4882a593Smuzhiyun 		dev->name, ll->rdp);
894*4882a593Smuzhiyun 	lance_reset(dev);
895*4882a593Smuzhiyun 	netif_wake_queue(dev);
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun 
lance_start_xmit(struct sk_buff * skb,struct net_device * dev)898*4882a593Smuzhiyun static netdev_tx_t lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
901*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
902*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
903*4882a593Smuzhiyun 	unsigned long flags;
904*4882a593Smuzhiyun 	int entry, len;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	len = skb->len;
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun 	if (len < ETH_ZLEN) {
909*4882a593Smuzhiyun 		if (skb_padto(skb, ETH_ZLEN))
910*4882a593Smuzhiyun 			return NETDEV_TX_OK;
911*4882a593Smuzhiyun 		len = ETH_ZLEN;
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	dev->stats.tx_bytes += len;
915*4882a593Smuzhiyun 
916*4882a593Smuzhiyun 	spin_lock_irqsave(&lp->lock, flags);
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	entry = lp->tx_new;
919*4882a593Smuzhiyun 	*lib_ptr(ib, btx_ring[entry].length, lp->type) = (-len);
920*4882a593Smuzhiyun 	*lib_ptr(ib, btx_ring[entry].misc, lp->type) = 0;
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	cp_to_buf(lp->type, lp->tx_buf_ptr_cpu[entry], skb->data, len);
923*4882a593Smuzhiyun 
924*4882a593Smuzhiyun 	/* Now, give the packet to the lance */
925*4882a593Smuzhiyun 	*lib_ptr(ib, btx_ring[entry].tmd1, lp->type) =
926*4882a593Smuzhiyun 		((lp->tx_buf_ptr_lnc[entry] >> 16) & 0xff) |
927*4882a593Smuzhiyun 		(LE_T1_POK | LE_T1_OWN);
928*4882a593Smuzhiyun 	lp->tx_new = (entry + 1) & TX_RING_MOD_MASK;
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	if (TX_BUFFS_AVAIL <= 0)
931*4882a593Smuzhiyun 		netif_stop_queue(dev);
932*4882a593Smuzhiyun 
933*4882a593Smuzhiyun 	/* Kick the lance: transmit now */
934*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun 	spin_unlock_irqrestore(&lp->lock, flags);
937*4882a593Smuzhiyun 
938*4882a593Smuzhiyun 	dev_kfree_skb(skb);
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun  	return NETDEV_TX_OK;
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun 
lance_load_multicast(struct net_device * dev)943*4882a593Smuzhiyun static void lance_load_multicast(struct net_device *dev)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
946*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
947*4882a593Smuzhiyun 	struct netdev_hw_addr *ha;
948*4882a593Smuzhiyun 	u32 crc;
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	/* set all multicast bits */
951*4882a593Smuzhiyun 	if (dev->flags & IFF_ALLMULTI) {
952*4882a593Smuzhiyun 		*lib_ptr(ib, filter[0], lp->type) = 0xffff;
953*4882a593Smuzhiyun 		*lib_ptr(ib, filter[1], lp->type) = 0xffff;
954*4882a593Smuzhiyun 		*lib_ptr(ib, filter[2], lp->type) = 0xffff;
955*4882a593Smuzhiyun 		*lib_ptr(ib, filter[3], lp->type) = 0xffff;
956*4882a593Smuzhiyun 		return;
957*4882a593Smuzhiyun 	}
958*4882a593Smuzhiyun 	/* clear the multicast filter */
959*4882a593Smuzhiyun 	*lib_ptr(ib, filter[0], lp->type) = 0;
960*4882a593Smuzhiyun 	*lib_ptr(ib, filter[1], lp->type) = 0;
961*4882a593Smuzhiyun 	*lib_ptr(ib, filter[2], lp->type) = 0;
962*4882a593Smuzhiyun 	*lib_ptr(ib, filter[3], lp->type) = 0;
963*4882a593Smuzhiyun 
964*4882a593Smuzhiyun 	/* Add addresses */
965*4882a593Smuzhiyun 	netdev_for_each_mc_addr(ha, dev) {
966*4882a593Smuzhiyun 		crc = ether_crc_le(ETH_ALEN, ha->addr);
967*4882a593Smuzhiyun 		crc = crc >> 26;
968*4882a593Smuzhiyun 		*lib_ptr(ib, filter[crc >> 4], lp->type) |= 1 << (crc & 0xf);
969*4882a593Smuzhiyun 	}
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun 
lance_set_multicast(struct net_device * dev)972*4882a593Smuzhiyun static void lance_set_multicast(struct net_device *dev)
973*4882a593Smuzhiyun {
974*4882a593Smuzhiyun 	struct lance_private *lp = netdev_priv(dev);
975*4882a593Smuzhiyun 	volatile u16 *ib = (volatile u16 *)dev->mem_start;
976*4882a593Smuzhiyun 	volatile struct lance_regs *ll = lp->ll;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	if (!netif_running(dev))
979*4882a593Smuzhiyun 		return;
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun 	if (lp->tx_old != lp->tx_new) {
982*4882a593Smuzhiyun 		mod_timer(&lp->multicast_timer, jiffies + 4 * HZ/100);
983*4882a593Smuzhiyun 		netif_wake_queue(dev);
984*4882a593Smuzhiyun 		return;
985*4882a593Smuzhiyun 	}
986*4882a593Smuzhiyun 
987*4882a593Smuzhiyun 	netif_stop_queue(dev);
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun 	writereg(&ll->rap, LE_CSR0);
990*4882a593Smuzhiyun 	writereg(&ll->rdp, LE_C0_STOP);
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	lance_init_ring(dev);
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	if (dev->flags & IFF_PROMISC) {
995*4882a593Smuzhiyun 		*lib_ptr(ib, mode, lp->type) |= LE_MO_PROM;
996*4882a593Smuzhiyun 	} else {
997*4882a593Smuzhiyun 		*lib_ptr(ib, mode, lp->type) &= ~LE_MO_PROM;
998*4882a593Smuzhiyun 		lance_load_multicast(dev);
999*4882a593Smuzhiyun 	}
1000*4882a593Smuzhiyun 	load_csrs(lp);
1001*4882a593Smuzhiyun 	init_restart_lance(lp);
1002*4882a593Smuzhiyun 	netif_wake_queue(dev);
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun 
lance_set_multicast_retry(struct timer_list * t)1005*4882a593Smuzhiyun static void lance_set_multicast_retry(struct timer_list *t)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun 	struct lance_private *lp = from_timer(lp, t, multicast_timer);
1008*4882a593Smuzhiyun 	struct net_device *dev = lp->dev;
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	lance_set_multicast(dev);
1011*4882a593Smuzhiyun }
1012*4882a593Smuzhiyun 
1013*4882a593Smuzhiyun static const struct net_device_ops lance_netdev_ops = {
1014*4882a593Smuzhiyun 	.ndo_open		= lance_open,
1015*4882a593Smuzhiyun 	.ndo_stop		= lance_close,
1016*4882a593Smuzhiyun 	.ndo_start_xmit		= lance_start_xmit,
1017*4882a593Smuzhiyun 	.ndo_tx_timeout		= lance_tx_timeout,
1018*4882a593Smuzhiyun 	.ndo_set_rx_mode	= lance_set_multicast,
1019*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
1020*4882a593Smuzhiyun 	.ndo_set_mac_address	= eth_mac_addr,
1021*4882a593Smuzhiyun };
1022*4882a593Smuzhiyun 
dec_lance_probe(struct device * bdev,const int type)1023*4882a593Smuzhiyun static int dec_lance_probe(struct device *bdev, const int type)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	static unsigned version_printed;
1026*4882a593Smuzhiyun 	static const char fmt[] = "declance%d";
1027*4882a593Smuzhiyun 	char name[10];
1028*4882a593Smuzhiyun 	struct net_device *dev;
1029*4882a593Smuzhiyun 	struct lance_private *lp;
1030*4882a593Smuzhiyun 	volatile struct lance_regs *ll;
1031*4882a593Smuzhiyun 	resource_size_t start = 0, len = 0;
1032*4882a593Smuzhiyun 	int i, ret;
1033*4882a593Smuzhiyun 	unsigned long esar_base;
1034*4882a593Smuzhiyun 	unsigned char *esar;
1035*4882a593Smuzhiyun 	const char *desc;
1036*4882a593Smuzhiyun 
1037*4882a593Smuzhiyun 	if (dec_lance_debug && version_printed++ == 0)
1038*4882a593Smuzhiyun 		printk(version);
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun 	if (bdev)
1041*4882a593Smuzhiyun 		snprintf(name, sizeof(name), "%s", dev_name(bdev));
1042*4882a593Smuzhiyun 	else {
1043*4882a593Smuzhiyun 		i = 0;
1044*4882a593Smuzhiyun 		dev = root_lance_dev;
1045*4882a593Smuzhiyun 		while (dev) {
1046*4882a593Smuzhiyun 			i++;
1047*4882a593Smuzhiyun 			lp = netdev_priv(dev);
1048*4882a593Smuzhiyun 			dev = lp->next;
1049*4882a593Smuzhiyun 		}
1050*4882a593Smuzhiyun 		snprintf(name, sizeof(name), fmt, i);
1051*4882a593Smuzhiyun 	}
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun 	dev = alloc_etherdev(sizeof(struct lance_private));
1054*4882a593Smuzhiyun 	if (!dev) {
1055*4882a593Smuzhiyun 		ret = -ENOMEM;
1056*4882a593Smuzhiyun 		goto err_out;
1057*4882a593Smuzhiyun 	}
1058*4882a593Smuzhiyun 
1059*4882a593Smuzhiyun 	/*
1060*4882a593Smuzhiyun 	 * alloc_etherdev ensures the data structures used by the LANCE
1061*4882a593Smuzhiyun 	 * are aligned.
1062*4882a593Smuzhiyun 	 */
1063*4882a593Smuzhiyun 	lp = netdev_priv(dev);
1064*4882a593Smuzhiyun 	spin_lock_init(&lp->lock);
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	lp->type = type;
1067*4882a593Smuzhiyun 	switch (type) {
1068*4882a593Smuzhiyun 	case ASIC_LANCE:
1069*4882a593Smuzhiyun 		dev->base_addr = CKSEG1ADDR(dec_kn_slot_base + IOASIC_LANCE);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 		/* buffer space for the on-board LANCE shared memory */
1072*4882a593Smuzhiyun 		/*
1073*4882a593Smuzhiyun 		 * FIXME: ugly hack!
1074*4882a593Smuzhiyun 		 */
1075*4882a593Smuzhiyun 		dev->mem_start = CKSEG1ADDR(0x00020000);
1076*4882a593Smuzhiyun 		dev->mem_end = dev->mem_start + 0x00020000;
1077*4882a593Smuzhiyun 		dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1078*4882a593Smuzhiyun 		esar_base = CKSEG1ADDR(dec_kn_slot_base + IOASIC_ESAR);
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 		/* Workaround crash with booting KN04 2.1k from Disk */
1081*4882a593Smuzhiyun 		memset((void *)dev->mem_start, 0,
1082*4882a593Smuzhiyun 		       dev->mem_end - dev->mem_start);
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 		/*
1085*4882a593Smuzhiyun 		 * setup the pointer arrays, this sucks [tm] :-(
1086*4882a593Smuzhiyun 		 */
1087*4882a593Smuzhiyun 		for (i = 0; i < RX_RING_SIZE; i++) {
1088*4882a593Smuzhiyun 			lp->rx_buf_ptr_cpu[i] =
1089*4882a593Smuzhiyun 				(char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1090*4882a593Smuzhiyun 					 2 * i * RX_BUFF_SIZE);
1091*4882a593Smuzhiyun 			lp->rx_buf_ptr_lnc[i] =
1092*4882a593Smuzhiyun 				(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1093*4882a593Smuzhiyun 		}
1094*4882a593Smuzhiyun 		for (i = 0; i < TX_RING_SIZE; i++) {
1095*4882a593Smuzhiyun 			lp->tx_buf_ptr_cpu[i] =
1096*4882a593Smuzhiyun 				(char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1097*4882a593Smuzhiyun 					 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1098*4882a593Smuzhiyun 					 2 * i * TX_BUFF_SIZE);
1099*4882a593Smuzhiyun 			lp->tx_buf_ptr_lnc[i] =
1100*4882a593Smuzhiyun 				(BUF_OFFSET_LNC +
1101*4882a593Smuzhiyun 				 RX_RING_SIZE * RX_BUFF_SIZE +
1102*4882a593Smuzhiyun 				 i * TX_BUFF_SIZE);
1103*4882a593Smuzhiyun 		}
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 		/* Setup I/O ASIC LANCE DMA.  */
1106*4882a593Smuzhiyun 		lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1107*4882a593Smuzhiyun 		ioasic_write(IO_REG_LANCE_DMA_P,
1108*4882a593Smuzhiyun 			     CPHYSADDR(dev->mem_start) << 3);
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 		break;
1111*4882a593Smuzhiyun #ifdef CONFIG_TC
1112*4882a593Smuzhiyun 	case PMAD_LANCE:
1113*4882a593Smuzhiyun 		dev_set_drvdata(bdev, dev);
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 		start = to_tc_dev(bdev)->resource.start;
1116*4882a593Smuzhiyun 		len = to_tc_dev(bdev)->resource.end - start + 1;
1117*4882a593Smuzhiyun 		if (!request_mem_region(start, len, dev_name(bdev))) {
1118*4882a593Smuzhiyun 			printk(KERN_ERR
1119*4882a593Smuzhiyun 			       "%s: Unable to reserve MMIO resource\n",
1120*4882a593Smuzhiyun 			       dev_name(bdev));
1121*4882a593Smuzhiyun 			ret = -EBUSY;
1122*4882a593Smuzhiyun 			goto err_out_dev;
1123*4882a593Smuzhiyun 		}
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 		dev->mem_start = CKSEG1ADDR(start);
1126*4882a593Smuzhiyun 		dev->mem_end = dev->mem_start + 0x100000;
1127*4882a593Smuzhiyun 		dev->base_addr = dev->mem_start + 0x100000;
1128*4882a593Smuzhiyun 		dev->irq = to_tc_dev(bdev)->interrupt;
1129*4882a593Smuzhiyun 		esar_base = dev->mem_start + 0x1c0002;
1130*4882a593Smuzhiyun 		lp->dma_irq = -1;
1131*4882a593Smuzhiyun 
1132*4882a593Smuzhiyun 		for (i = 0; i < RX_RING_SIZE; i++) {
1133*4882a593Smuzhiyun 			lp->rx_buf_ptr_cpu[i] =
1134*4882a593Smuzhiyun 				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1135*4882a593Smuzhiyun 					 i * RX_BUFF_SIZE);
1136*4882a593Smuzhiyun 			lp->rx_buf_ptr_lnc[i] =
1137*4882a593Smuzhiyun 				(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1138*4882a593Smuzhiyun 		}
1139*4882a593Smuzhiyun 		for (i = 0; i < TX_RING_SIZE; i++) {
1140*4882a593Smuzhiyun 			lp->tx_buf_ptr_cpu[i] =
1141*4882a593Smuzhiyun 				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1142*4882a593Smuzhiyun 					 RX_RING_SIZE * RX_BUFF_SIZE +
1143*4882a593Smuzhiyun 					 i * TX_BUFF_SIZE);
1144*4882a593Smuzhiyun 			lp->tx_buf_ptr_lnc[i] =
1145*4882a593Smuzhiyun 				(BUF_OFFSET_LNC +
1146*4882a593Smuzhiyun 				 RX_RING_SIZE * RX_BUFF_SIZE +
1147*4882a593Smuzhiyun 				 i * TX_BUFF_SIZE);
1148*4882a593Smuzhiyun 		}
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun 		break;
1151*4882a593Smuzhiyun #endif
1152*4882a593Smuzhiyun 	case PMAX_LANCE:
1153*4882a593Smuzhiyun 		dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1154*4882a593Smuzhiyun 		dev->base_addr = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE);
1155*4882a593Smuzhiyun 		dev->mem_start = CKSEG1ADDR(KN01_SLOT_BASE + KN01_LANCE_MEM);
1156*4882a593Smuzhiyun 		dev->mem_end = dev->mem_start + KN01_SLOT_SIZE;
1157*4882a593Smuzhiyun 		esar_base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_ESAR + 1);
1158*4882a593Smuzhiyun 		lp->dma_irq = -1;
1159*4882a593Smuzhiyun 
1160*4882a593Smuzhiyun 		/*
1161*4882a593Smuzhiyun 		 * setup the pointer arrays, this sucks [tm] :-(
1162*4882a593Smuzhiyun 		 */
1163*4882a593Smuzhiyun 		for (i = 0; i < RX_RING_SIZE; i++) {
1164*4882a593Smuzhiyun 			lp->rx_buf_ptr_cpu[i] =
1165*4882a593Smuzhiyun 				(char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1166*4882a593Smuzhiyun 					 2 * i * RX_BUFF_SIZE);
1167*4882a593Smuzhiyun 			lp->rx_buf_ptr_lnc[i] =
1168*4882a593Smuzhiyun 				(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1169*4882a593Smuzhiyun 		}
1170*4882a593Smuzhiyun 		for (i = 0; i < TX_RING_SIZE; i++) {
1171*4882a593Smuzhiyun 			lp->tx_buf_ptr_cpu[i] =
1172*4882a593Smuzhiyun 				(char *)(dev->mem_start + 2 * BUF_OFFSET_CPU +
1173*4882a593Smuzhiyun 					 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1174*4882a593Smuzhiyun 					 2 * i * TX_BUFF_SIZE);
1175*4882a593Smuzhiyun 			lp->tx_buf_ptr_lnc[i] =
1176*4882a593Smuzhiyun 				(BUF_OFFSET_LNC +
1177*4882a593Smuzhiyun 				 RX_RING_SIZE * RX_BUFF_SIZE +
1178*4882a593Smuzhiyun 				 i * TX_BUFF_SIZE);
1179*4882a593Smuzhiyun 		}
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 		break;
1182*4882a593Smuzhiyun 
1183*4882a593Smuzhiyun 	default:
1184*4882a593Smuzhiyun 		printk(KERN_ERR "%s: declance_init called with unknown type\n",
1185*4882a593Smuzhiyun 			name);
1186*4882a593Smuzhiyun 		ret = -ENODEV;
1187*4882a593Smuzhiyun 		goto err_out_dev;
1188*4882a593Smuzhiyun 	}
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun 	ll = (struct lance_regs *) dev->base_addr;
1191*4882a593Smuzhiyun 	esar = (unsigned char *) esar_base;
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 	/* prom checks */
1194*4882a593Smuzhiyun 	/* First, check for test pattern */
1195*4882a593Smuzhiyun 	if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1196*4882a593Smuzhiyun 	    esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1197*4882a593Smuzhiyun 		printk(KERN_ERR
1198*4882a593Smuzhiyun 			"%s: Ethernet station address prom not found!\n",
1199*4882a593Smuzhiyun 			name);
1200*4882a593Smuzhiyun 		ret = -ENODEV;
1201*4882a593Smuzhiyun 		goto err_out_resource;
1202*4882a593Smuzhiyun 	}
1203*4882a593Smuzhiyun 	/* Check the prom contents */
1204*4882a593Smuzhiyun 	for (i = 0; i < 8; i++) {
1205*4882a593Smuzhiyun 		if (esar[i * 4] != esar[0x3c - i * 4] &&
1206*4882a593Smuzhiyun 		    esar[i * 4] != esar[0x40 + i * 4] &&
1207*4882a593Smuzhiyun 		    esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1208*4882a593Smuzhiyun 			printk(KERN_ERR "%s: Something is wrong with the "
1209*4882a593Smuzhiyun 				"ethernet station address prom!\n", name);
1210*4882a593Smuzhiyun 			ret = -ENODEV;
1211*4882a593Smuzhiyun 			goto err_out_resource;
1212*4882a593Smuzhiyun 		}
1213*4882a593Smuzhiyun 	}
1214*4882a593Smuzhiyun 
1215*4882a593Smuzhiyun 	/* Copy the ethernet address to the device structure, later to the
1216*4882a593Smuzhiyun 	 * lance initialization block so the lance gets it every time it's
1217*4882a593Smuzhiyun 	 * (re)initialized.
1218*4882a593Smuzhiyun 	 */
1219*4882a593Smuzhiyun 	switch (type) {
1220*4882a593Smuzhiyun 	case ASIC_LANCE:
1221*4882a593Smuzhiyun 		desc = "IOASIC onboard LANCE";
1222*4882a593Smuzhiyun 		break;
1223*4882a593Smuzhiyun 	case PMAD_LANCE:
1224*4882a593Smuzhiyun 		desc = "PMAD-AA";
1225*4882a593Smuzhiyun 		break;
1226*4882a593Smuzhiyun 	case PMAX_LANCE:
1227*4882a593Smuzhiyun 		desc = "PMAX onboard LANCE";
1228*4882a593Smuzhiyun 		break;
1229*4882a593Smuzhiyun 	}
1230*4882a593Smuzhiyun 	for (i = 0; i < 6; i++)
1231*4882a593Smuzhiyun 		dev->dev_addr[i] = esar[i * 4];
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun 	printk("%s: %s, addr = %pM, irq = %d\n",
1234*4882a593Smuzhiyun 	       name, desc, dev->dev_addr, dev->irq);
1235*4882a593Smuzhiyun 
1236*4882a593Smuzhiyun 	dev->netdev_ops = &lance_netdev_ops;
1237*4882a593Smuzhiyun 	dev->watchdog_timeo = 5*HZ;
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun 	/* lp->ll is the location of the registers for lance card */
1240*4882a593Smuzhiyun 	lp->ll = ll;
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 	/* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1243*4882a593Smuzhiyun 	 * specification.
1244*4882a593Smuzhiyun 	 */
1245*4882a593Smuzhiyun 	lp->busmaster_regval = 0;
1246*4882a593Smuzhiyun 
1247*4882a593Smuzhiyun 	dev->dma = 0;
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 	/* We cannot sleep if the chip is busy during a
1250*4882a593Smuzhiyun 	 * multicast list update event, because such events
1251*4882a593Smuzhiyun 	 * can occur from interrupts (ex. IPv6).  So we
1252*4882a593Smuzhiyun 	 * use a timer to try again later when necessary. -DaveM
1253*4882a593Smuzhiyun 	 */
1254*4882a593Smuzhiyun 	lp->dev = dev;
1255*4882a593Smuzhiyun 	timer_setup(&lp->multicast_timer, lance_set_multicast_retry, 0);
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 
1258*4882a593Smuzhiyun 	ret = register_netdev(dev);
1259*4882a593Smuzhiyun 	if (ret) {
1260*4882a593Smuzhiyun 		printk(KERN_ERR
1261*4882a593Smuzhiyun 			"%s: Unable to register netdev, aborting.\n", name);
1262*4882a593Smuzhiyun 		goto err_out_resource;
1263*4882a593Smuzhiyun 	}
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	if (!bdev) {
1266*4882a593Smuzhiyun 		lp->next = root_lance_dev;
1267*4882a593Smuzhiyun 		root_lance_dev = dev;
1268*4882a593Smuzhiyun 	}
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 	printk("%s: registered as %s.\n", name, dev->name);
1271*4882a593Smuzhiyun 	return 0;
1272*4882a593Smuzhiyun 
1273*4882a593Smuzhiyun err_out_resource:
1274*4882a593Smuzhiyun 	if (bdev)
1275*4882a593Smuzhiyun 		release_mem_region(start, len);
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun err_out_dev:
1278*4882a593Smuzhiyun 	free_netdev(dev);
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun err_out:
1281*4882a593Smuzhiyun 	return ret;
1282*4882a593Smuzhiyun }
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun /* Find all the lance cards on the system and initialize them */
dec_lance_platform_probe(void)1285*4882a593Smuzhiyun static int __init dec_lance_platform_probe(void)
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun 	int count = 0;
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun 	if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1290*4882a593Smuzhiyun 		if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1291*4882a593Smuzhiyun 			if (dec_lance_probe(NULL, ASIC_LANCE) >= 0)
1292*4882a593Smuzhiyun 				count++;
1293*4882a593Smuzhiyun 		} else if (!TURBOCHANNEL) {
1294*4882a593Smuzhiyun 			if (dec_lance_probe(NULL, PMAX_LANCE) >= 0)
1295*4882a593Smuzhiyun 				count++;
1296*4882a593Smuzhiyun 		}
1297*4882a593Smuzhiyun 	}
1298*4882a593Smuzhiyun 
1299*4882a593Smuzhiyun 	return (count > 0) ? 0 : -ENODEV;
1300*4882a593Smuzhiyun }
1301*4882a593Smuzhiyun 
dec_lance_platform_remove(void)1302*4882a593Smuzhiyun static void __exit dec_lance_platform_remove(void)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun 	while (root_lance_dev) {
1305*4882a593Smuzhiyun 		struct net_device *dev = root_lance_dev;
1306*4882a593Smuzhiyun 		struct lance_private *lp = netdev_priv(dev);
1307*4882a593Smuzhiyun 
1308*4882a593Smuzhiyun 		unregister_netdev(dev);
1309*4882a593Smuzhiyun 		root_lance_dev = lp->next;
1310*4882a593Smuzhiyun 		free_netdev(dev);
1311*4882a593Smuzhiyun 	}
1312*4882a593Smuzhiyun }
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun #ifdef CONFIG_TC
1315*4882a593Smuzhiyun static int dec_lance_tc_probe(struct device *dev);
1316*4882a593Smuzhiyun static int dec_lance_tc_remove(struct device *dev);
1317*4882a593Smuzhiyun 
1318*4882a593Smuzhiyun static const struct tc_device_id dec_lance_tc_table[] = {
1319*4882a593Smuzhiyun 	{ "DEC     ", "PMAD-AA " },
1320*4882a593Smuzhiyun 	{ }
1321*4882a593Smuzhiyun };
1322*4882a593Smuzhiyun MODULE_DEVICE_TABLE(tc, dec_lance_tc_table);
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun static struct tc_driver dec_lance_tc_driver = {
1325*4882a593Smuzhiyun 	.id_table	= dec_lance_tc_table,
1326*4882a593Smuzhiyun 	.driver		= {
1327*4882a593Smuzhiyun 		.name	= "declance",
1328*4882a593Smuzhiyun 		.bus	= &tc_bus_type,
1329*4882a593Smuzhiyun 		.probe	= dec_lance_tc_probe,
1330*4882a593Smuzhiyun 		.remove	= dec_lance_tc_remove,
1331*4882a593Smuzhiyun 	},
1332*4882a593Smuzhiyun };
1333*4882a593Smuzhiyun 
dec_lance_tc_probe(struct device * dev)1334*4882a593Smuzhiyun static int dec_lance_tc_probe(struct device *dev)
1335*4882a593Smuzhiyun {
1336*4882a593Smuzhiyun         int status = dec_lance_probe(dev, PMAD_LANCE);
1337*4882a593Smuzhiyun         if (!status)
1338*4882a593Smuzhiyun                 get_device(dev);
1339*4882a593Smuzhiyun         return status;
1340*4882a593Smuzhiyun }
1341*4882a593Smuzhiyun 
dec_lance_remove(struct device * bdev)1342*4882a593Smuzhiyun static void dec_lance_remove(struct device *bdev)
1343*4882a593Smuzhiyun {
1344*4882a593Smuzhiyun 	struct net_device *dev = dev_get_drvdata(bdev);
1345*4882a593Smuzhiyun 	resource_size_t start, len;
1346*4882a593Smuzhiyun 
1347*4882a593Smuzhiyun 	unregister_netdev(dev);
1348*4882a593Smuzhiyun 	start = to_tc_dev(bdev)->resource.start;
1349*4882a593Smuzhiyun 	len = to_tc_dev(bdev)->resource.end - start + 1;
1350*4882a593Smuzhiyun 	release_mem_region(start, len);
1351*4882a593Smuzhiyun 	free_netdev(dev);
1352*4882a593Smuzhiyun }
1353*4882a593Smuzhiyun 
dec_lance_tc_remove(struct device * dev)1354*4882a593Smuzhiyun static int dec_lance_tc_remove(struct device *dev)
1355*4882a593Smuzhiyun {
1356*4882a593Smuzhiyun         put_device(dev);
1357*4882a593Smuzhiyun         dec_lance_remove(dev);
1358*4882a593Smuzhiyun         return 0;
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun #endif
1361*4882a593Smuzhiyun 
dec_lance_init(void)1362*4882a593Smuzhiyun static int __init dec_lance_init(void)
1363*4882a593Smuzhiyun {
1364*4882a593Smuzhiyun 	int status;
1365*4882a593Smuzhiyun 
1366*4882a593Smuzhiyun 	status = tc_register_driver(&dec_lance_tc_driver);
1367*4882a593Smuzhiyun 	if (!status)
1368*4882a593Smuzhiyun 		dec_lance_platform_probe();
1369*4882a593Smuzhiyun 	return status;
1370*4882a593Smuzhiyun }
1371*4882a593Smuzhiyun 
dec_lance_exit(void)1372*4882a593Smuzhiyun static void __exit dec_lance_exit(void)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun 	dec_lance_platform_remove();
1375*4882a593Smuzhiyun 	tc_unregister_driver(&dec_lance_tc_driver);
1376*4882a593Smuzhiyun }
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun module_init(dec_lance_init);
1380*4882a593Smuzhiyun module_exit(dec_lance_exit);
1381