1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /* Altera TSE SGDMA and MSGDMA Linux driver
3*4882a593Smuzhiyun * Copyright (C) 2014 Altera Corporation. All rights reserved
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include "altera_tse.h"
7*4882a593Smuzhiyun #include "altera_utils.h"
8*4882a593Smuzhiyun
tse_set_bit(void __iomem * ioaddr,size_t offs,u32 bit_mask)9*4882a593Smuzhiyun void tse_set_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask)
10*4882a593Smuzhiyun {
11*4882a593Smuzhiyun u32 value = csrrd32(ioaddr, offs);
12*4882a593Smuzhiyun value |= bit_mask;
13*4882a593Smuzhiyun csrwr32(value, ioaddr, offs);
14*4882a593Smuzhiyun }
15*4882a593Smuzhiyun
tse_clear_bit(void __iomem * ioaddr,size_t offs,u32 bit_mask)16*4882a593Smuzhiyun void tse_clear_bit(void __iomem *ioaddr, size_t offs, u32 bit_mask)
17*4882a593Smuzhiyun {
18*4882a593Smuzhiyun u32 value = csrrd32(ioaddr, offs);
19*4882a593Smuzhiyun value &= ~bit_mask;
20*4882a593Smuzhiyun csrwr32(value, ioaddr, offs);
21*4882a593Smuzhiyun }
22*4882a593Smuzhiyun
tse_bit_is_set(void __iomem * ioaddr,size_t offs,u32 bit_mask)23*4882a593Smuzhiyun int tse_bit_is_set(void __iomem *ioaddr, size_t offs, u32 bit_mask)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun u32 value = csrrd32(ioaddr, offs);
26*4882a593Smuzhiyun return (value & bit_mask) ? 1 : 0;
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
tse_bit_is_clear(void __iomem * ioaddr,size_t offs,u32 bit_mask)29*4882a593Smuzhiyun int tse_bit_is_clear(void __iomem *ioaddr, size_t offs, u32 bit_mask)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun u32 value = csrrd32(ioaddr, offs);
32*4882a593Smuzhiyun return (value & bit_mask) ? 0 : 1;
33*4882a593Smuzhiyun }
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