1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright 2019 NXP Semiconductors 3*4882a593Smuzhiyun */ 4*4882a593Smuzhiyun #ifndef _MSCC_FELIX_H 5*4882a593Smuzhiyun #define _MSCC_FELIX_H 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define ocelot_to_felix(o) container_of((o), struct felix, ocelot) 8*4882a593Smuzhiyun #define FELIX_NUM_TC 8 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun /* Platform-specific information */ 11*4882a593Smuzhiyun struct felix_info { 12*4882a593Smuzhiyun const struct resource *target_io_res; 13*4882a593Smuzhiyun const struct resource *port_io_res; 14*4882a593Smuzhiyun const struct resource *imdio_res; 15*4882a593Smuzhiyun const struct reg_field *regfields; 16*4882a593Smuzhiyun const u32 *const *map; 17*4882a593Smuzhiyun const struct ocelot_ops *ops; 18*4882a593Smuzhiyun int shared_queue_sz; 19*4882a593Smuzhiyun int num_mact_rows; 20*4882a593Smuzhiyun const struct ocelot_stat_layout *stats_layout; 21*4882a593Smuzhiyun unsigned int num_stats; 22*4882a593Smuzhiyun int num_ports; 23*4882a593Smuzhiyun int num_tx_queues; 24*4882a593Smuzhiyun struct vcap_props *vcap; 25*4882a593Smuzhiyun int switch_pci_bar; 26*4882a593Smuzhiyun int imdio_pci_bar; 27*4882a593Smuzhiyun const struct ptp_clock_info *ptp_caps; 28*4882a593Smuzhiyun int (*mdio_bus_alloc)(struct ocelot *ocelot); 29*4882a593Smuzhiyun void (*mdio_bus_free)(struct ocelot *ocelot); 30*4882a593Smuzhiyun void (*phylink_validate)(struct ocelot *ocelot, int port, 31*4882a593Smuzhiyun unsigned long *supported, 32*4882a593Smuzhiyun struct phylink_link_state *state); 33*4882a593Smuzhiyun int (*prevalidate_phy_mode)(struct ocelot *ocelot, int port, 34*4882a593Smuzhiyun phy_interface_t phy_mode); 35*4882a593Smuzhiyun int (*port_setup_tc)(struct dsa_switch *ds, int port, 36*4882a593Smuzhiyun enum tc_setup_type type, void *type_data); 37*4882a593Smuzhiyun void (*port_sched_speed_set)(struct ocelot *ocelot, int port, 38*4882a593Smuzhiyun u32 speed); 39*4882a593Smuzhiyun void (*xmit_template_populate)(struct ocelot *ocelot, int port); 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun extern const struct dsa_switch_ops felix_switch_ops; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* DSA glue / front-end for struct ocelot */ 45*4882a593Smuzhiyun struct felix { 46*4882a593Smuzhiyun struct dsa_switch *ds; 47*4882a593Smuzhiyun const struct felix_info *info; 48*4882a593Smuzhiyun struct ocelot ocelot; 49*4882a593Smuzhiyun struct mii_bus *imdio; 50*4882a593Smuzhiyun struct lynx_pcs **pcs; 51*4882a593Smuzhiyun resource_size_t switch_base; 52*4882a593Smuzhiyun resource_size_t imdio_base; 53*4882a593Smuzhiyun }; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun struct net_device *felix_port_to_netdev(struct ocelot *ocelot, int port); 56*4882a593Smuzhiyun int felix_netdev_to_port(struct net_device *dev); 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #endif 59