1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Marvell 88E6xxx PHY access 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2008 Marvell Semiconductor 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Copyright (c) 2017 Andrew Lunn <andrew@lunn.ch> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef _MV88E6XXX_PHY_H 11*4882a593Smuzhiyun #define _MV88E6XXX_PHY_H 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define MV88E6XXX_PHY_PAGE 0x16 14*4882a593Smuzhiyun #define MV88E6XXX_PHY_PAGE_COPPER 0x00 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* PHY Registers accesses implementations */ 17*4882a593Smuzhiyun int mv88e6165_phy_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, 18*4882a593Smuzhiyun int addr, int reg, u16 *val); 19*4882a593Smuzhiyun int mv88e6165_phy_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, 20*4882a593Smuzhiyun int addr, int reg, u16 val); 21*4882a593Smuzhiyun int mv88e6185_phy_ppu_read(struct mv88e6xxx_chip *chip, struct mii_bus *bus, 22*4882a593Smuzhiyun int addr, int reg, u16 *val); 23*4882a593Smuzhiyun int mv88e6185_phy_ppu_write(struct mv88e6xxx_chip *chip, struct mii_bus *bus, 24*4882a593Smuzhiyun int addr, int reg, u16 val); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* Generic PHY operations */ 27*4882a593Smuzhiyun int mv88e6xxx_phy_read(struct mv88e6xxx_chip *chip, int phy, 28*4882a593Smuzhiyun int reg, u16 *val); 29*4882a593Smuzhiyun int mv88e6xxx_phy_write(struct mv88e6xxx_chip *chip, int phy, 30*4882a593Smuzhiyun int reg, u16 val); 31*4882a593Smuzhiyun int mv88e6xxx_phy_page_read(struct mv88e6xxx_chip *chip, int phy, 32*4882a593Smuzhiyun u8 page, int reg, u16 *val); 33*4882a593Smuzhiyun int mv88e6xxx_phy_page_write(struct mv88e6xxx_chip *chip, int phy, 34*4882a593Smuzhiyun u8 page, int reg, u16 val); 35*4882a593Smuzhiyun void mv88e6xxx_phy_init(struct mv88e6xxx_chip *chip); 36*4882a593Smuzhiyun void mv88e6xxx_phy_destroy(struct mv88e6xxx_chip *chip); 37*4882a593Smuzhiyun int mv88e6xxx_phy_setup(struct mv88e6xxx_chip *chip); 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #endif /*_MV88E6XXX_PHY_H */ 40