1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2017 Pengutronix, Juergen Borleis <kernel@pengutronix.de>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Partially based on a patch from
6*4882a593Smuzhiyun * Copyright (c) 2014 Stefan Roese <sr@denx.de>
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/mdio.h>
11*4882a593Smuzhiyun #include <linux/phy.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include "lan9303.h"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /* Generate phy-addr and -reg from the input address */
17*4882a593Smuzhiyun #define PHY_ADDR(x) ((((x) >> 6) + 0x10) & 0x1f)
18*4882a593Smuzhiyun #define PHY_REG(x) (((x) >> 1) & 0x1f)
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct lan9303_mdio {
21*4882a593Smuzhiyun struct mdio_device *device;
22*4882a593Smuzhiyun struct lan9303 chip;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
lan9303_mdio_real_write(struct mdio_device * mdio,int reg,u16 val)25*4882a593Smuzhiyun static void lan9303_mdio_real_write(struct mdio_device *mdio, int reg, u16 val)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun mdio->bus->write(mdio->bus, PHY_ADDR(reg), PHY_REG(reg), val);
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun
lan9303_mdio_write(void * ctx,uint32_t reg,uint32_t val)30*4882a593Smuzhiyun static int lan9303_mdio_write(void *ctx, uint32_t reg, uint32_t val)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun struct lan9303_mdio *sw_dev = (struct lan9303_mdio *)ctx;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun reg <<= 2; /* reg num to offset */
35*4882a593Smuzhiyun mutex_lock(&sw_dev->device->bus->mdio_lock);
36*4882a593Smuzhiyun lan9303_mdio_real_write(sw_dev->device, reg, val & 0xffff);
37*4882a593Smuzhiyun lan9303_mdio_real_write(sw_dev->device, reg + 2, (val >> 16) & 0xffff);
38*4882a593Smuzhiyun mutex_unlock(&sw_dev->device->bus->mdio_lock);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun return 0;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
lan9303_mdio_real_read(struct mdio_device * mdio,int reg)43*4882a593Smuzhiyun static u16 lan9303_mdio_real_read(struct mdio_device *mdio, int reg)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun return mdio->bus->read(mdio->bus, PHY_ADDR(reg), PHY_REG(reg));
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
lan9303_mdio_read(void * ctx,uint32_t reg,uint32_t * val)48*4882a593Smuzhiyun static int lan9303_mdio_read(void *ctx, uint32_t reg, uint32_t *val)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun struct lan9303_mdio *sw_dev = (struct lan9303_mdio *)ctx;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun reg <<= 2; /* reg num to offset */
53*4882a593Smuzhiyun mutex_lock(&sw_dev->device->bus->mdio_lock);
54*4882a593Smuzhiyun *val = lan9303_mdio_real_read(sw_dev->device, reg);
55*4882a593Smuzhiyun *val |= (lan9303_mdio_real_read(sw_dev->device, reg + 2) << 16);
56*4882a593Smuzhiyun mutex_unlock(&sw_dev->device->bus->mdio_lock);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun return 0;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
lan9303_mdio_phy_write(struct lan9303 * chip,int phy,int reg,u16 val)61*4882a593Smuzhiyun static int lan9303_mdio_phy_write(struct lan9303 *chip, int phy, int reg,
62*4882a593Smuzhiyun u16 val)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun struct lan9303_mdio *sw_dev = dev_get_drvdata(chip->dev);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun return mdiobus_write_nested(sw_dev->device->bus, phy, reg, val);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
lan9303_mdio_phy_read(struct lan9303 * chip,int phy,int reg)69*4882a593Smuzhiyun static int lan9303_mdio_phy_read(struct lan9303 *chip, int phy, int reg)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct lan9303_mdio *sw_dev = dev_get_drvdata(chip->dev);
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun return mdiobus_read_nested(sw_dev->device->bus, phy, reg);
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun static const struct lan9303_phy_ops lan9303_mdio_phy_ops = {
77*4882a593Smuzhiyun .phy_read = lan9303_mdio_phy_read,
78*4882a593Smuzhiyun .phy_write = lan9303_mdio_phy_write,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static const struct regmap_config lan9303_mdio_regmap_config = {
82*4882a593Smuzhiyun .reg_bits = 8,
83*4882a593Smuzhiyun .val_bits = 32,
84*4882a593Smuzhiyun .reg_stride = 1,
85*4882a593Smuzhiyun .can_multi_write = true,
86*4882a593Smuzhiyun .max_register = 0x0ff, /* address bits 0..1 are not used */
87*4882a593Smuzhiyun .reg_format_endian = REGMAP_ENDIAN_LITTLE,
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun .volatile_table = &lan9303_register_set,
90*4882a593Smuzhiyun .wr_table = &lan9303_register_set,
91*4882a593Smuzhiyun .rd_table = &lan9303_register_set,
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun .reg_read = lan9303_mdio_read,
94*4882a593Smuzhiyun .reg_write = lan9303_mdio_write,
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun .cache_type = REGCACHE_NONE,
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
lan9303_mdio_probe(struct mdio_device * mdiodev)99*4882a593Smuzhiyun static int lan9303_mdio_probe(struct mdio_device *mdiodev)
100*4882a593Smuzhiyun {
101*4882a593Smuzhiyun struct lan9303_mdio *sw_dev;
102*4882a593Smuzhiyun int ret;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun sw_dev = devm_kzalloc(&mdiodev->dev, sizeof(struct lan9303_mdio),
105*4882a593Smuzhiyun GFP_KERNEL);
106*4882a593Smuzhiyun if (!sw_dev)
107*4882a593Smuzhiyun return -ENOMEM;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun sw_dev->chip.regmap = devm_regmap_init(&mdiodev->dev, NULL, sw_dev,
110*4882a593Smuzhiyun &lan9303_mdio_regmap_config);
111*4882a593Smuzhiyun if (IS_ERR(sw_dev->chip.regmap)) {
112*4882a593Smuzhiyun ret = PTR_ERR(sw_dev->chip.regmap);
113*4882a593Smuzhiyun dev_err(&mdiodev->dev, "regmap init failed: %d\n", ret);
114*4882a593Smuzhiyun return ret;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* link forward and backward */
118*4882a593Smuzhiyun sw_dev->device = mdiodev;
119*4882a593Smuzhiyun dev_set_drvdata(&mdiodev->dev, sw_dev);
120*4882a593Smuzhiyun sw_dev->chip.dev = &mdiodev->dev;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun sw_dev->chip.ops = &lan9303_mdio_phy_ops;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun ret = lan9303_probe(&sw_dev->chip, mdiodev->dev.of_node);
125*4882a593Smuzhiyun if (ret != 0)
126*4882a593Smuzhiyun return ret;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun dev_info(&mdiodev->dev, "LAN9303 MDIO driver loaded successfully\n");
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
lan9303_mdio_remove(struct mdio_device * mdiodev)133*4882a593Smuzhiyun static void lan9303_mdio_remove(struct mdio_device *mdiodev)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct lan9303_mdio *sw_dev = dev_get_drvdata(&mdiodev->dev);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun if (!sw_dev)
138*4882a593Smuzhiyun return;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun lan9303_remove(&sw_dev->chip);
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /*-------------------------------------------------------------------------*/
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun static const struct of_device_id lan9303_mdio_of_match[] = {
146*4882a593Smuzhiyun { .compatible = "smsc,lan9303-mdio" },
147*4882a593Smuzhiyun { /* sentinel */ },
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, lan9303_mdio_of_match);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun static struct mdio_driver lan9303_mdio_driver = {
152*4882a593Smuzhiyun .mdiodrv.driver = {
153*4882a593Smuzhiyun .name = "LAN9303_MDIO",
154*4882a593Smuzhiyun .of_match_table = of_match_ptr(lan9303_mdio_of_match),
155*4882a593Smuzhiyun },
156*4882a593Smuzhiyun .probe = lan9303_mdio_probe,
157*4882a593Smuzhiyun .remove = lan9303_mdio_remove,
158*4882a593Smuzhiyun };
159*4882a593Smuzhiyun mdio_module_driver(lan9303_mdio_driver);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun MODULE_AUTHOR("Stefan Roese <sr@denx.de>, Juergen Borleis <kernel@pengutronix.de>");
162*4882a593Smuzhiyun MODULE_DESCRIPTION("Driver for SMSC/Microchip LAN9303 three port ethernet switch in MDIO managed mode");
163*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
164