1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2005 Sascha Hauer, Pengutronix
4*4882a593Smuzhiyun * Copyright (C) 2007 Wolfgang Grandegger <wg@grandegger.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/interrupt.h>
10*4882a593Smuzhiyun #include <linux/netdevice.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/pci.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/irq.h>
15*4882a593Smuzhiyun #include <linux/can/dev.h>
16*4882a593Smuzhiyun #include <linux/can/platform/sja1000.h>
17*4882a593Smuzhiyun #include <linux/io.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/of_device.h>
20*4882a593Smuzhiyun #include <linux/of_irq.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "sja1000.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define DRV_NAME "sja1000_platform"
25*4882a593Smuzhiyun #define SP_CAN_CLOCK (16000000 / 2)
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
28*4882a593Smuzhiyun MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>");
29*4882a593Smuzhiyun MODULE_DESCRIPTION("Socket-CAN driver for SJA1000 on the platform bus");
30*4882a593Smuzhiyun MODULE_ALIAS("platform:" DRV_NAME);
31*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct sja1000_of_data {
34*4882a593Smuzhiyun size_t priv_sz;
35*4882a593Smuzhiyun int (*init)(struct sja1000_priv *priv, struct device_node *of);
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct technologic_priv {
39*4882a593Smuzhiyun spinlock_t io_lock;
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
sp_read_reg8(const struct sja1000_priv * priv,int reg)42*4882a593Smuzhiyun static u8 sp_read_reg8(const struct sja1000_priv *priv, int reg)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun return ioread8(priv->reg_base + reg);
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
sp_write_reg8(const struct sja1000_priv * priv,int reg,u8 val)47*4882a593Smuzhiyun static void sp_write_reg8(const struct sja1000_priv *priv, int reg, u8 val)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun iowrite8(val, priv->reg_base + reg);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
sp_read_reg16(const struct sja1000_priv * priv,int reg)52*4882a593Smuzhiyun static u8 sp_read_reg16(const struct sja1000_priv *priv, int reg)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun return ioread8(priv->reg_base + reg * 2);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
sp_write_reg16(const struct sja1000_priv * priv,int reg,u8 val)57*4882a593Smuzhiyun static void sp_write_reg16(const struct sja1000_priv *priv, int reg, u8 val)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun iowrite8(val, priv->reg_base + reg * 2);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
sp_read_reg32(const struct sja1000_priv * priv,int reg)62*4882a593Smuzhiyun static u8 sp_read_reg32(const struct sja1000_priv *priv, int reg)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun return ioread8(priv->reg_base + reg * 4);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
sp_write_reg32(const struct sja1000_priv * priv,int reg,u8 val)67*4882a593Smuzhiyun static void sp_write_reg32(const struct sja1000_priv *priv, int reg, u8 val)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun iowrite8(val, priv->reg_base + reg * 4);
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
sp_technologic_read_reg16(const struct sja1000_priv * priv,int reg)72*4882a593Smuzhiyun static u8 sp_technologic_read_reg16(const struct sja1000_priv *priv, int reg)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun struct technologic_priv *tp = priv->priv;
75*4882a593Smuzhiyun unsigned long flags;
76*4882a593Smuzhiyun u8 val;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun spin_lock_irqsave(&tp->io_lock, flags);
79*4882a593Smuzhiyun iowrite16(reg, priv->reg_base + 0);
80*4882a593Smuzhiyun val = ioread16(priv->reg_base + 2);
81*4882a593Smuzhiyun spin_unlock_irqrestore(&tp->io_lock, flags);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun return val;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun
sp_technologic_write_reg16(const struct sja1000_priv * priv,int reg,u8 val)86*4882a593Smuzhiyun static void sp_technologic_write_reg16(const struct sja1000_priv *priv,
87*4882a593Smuzhiyun int reg, u8 val)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun struct technologic_priv *tp = priv->priv;
90*4882a593Smuzhiyun unsigned long flags;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun spin_lock_irqsave(&tp->io_lock, flags);
93*4882a593Smuzhiyun iowrite16(reg, priv->reg_base + 0);
94*4882a593Smuzhiyun iowrite16(val, priv->reg_base + 2);
95*4882a593Smuzhiyun spin_unlock_irqrestore(&tp->io_lock, flags);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
sp_technologic_init(struct sja1000_priv * priv,struct device_node * of)98*4882a593Smuzhiyun static int sp_technologic_init(struct sja1000_priv *priv, struct device_node *of)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun struct technologic_priv *tp = priv->priv;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun priv->read_reg = sp_technologic_read_reg16;
103*4882a593Smuzhiyun priv->write_reg = sp_technologic_write_reg16;
104*4882a593Smuzhiyun spin_lock_init(&tp->io_lock);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
sp_populate(struct sja1000_priv * priv,struct sja1000_platform_data * pdata,unsigned long resource_mem_flags)109*4882a593Smuzhiyun static void sp_populate(struct sja1000_priv *priv,
110*4882a593Smuzhiyun struct sja1000_platform_data *pdata,
111*4882a593Smuzhiyun unsigned long resource_mem_flags)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun /* The CAN clock frequency is half the oscillator clock frequency */
114*4882a593Smuzhiyun priv->can.clock.freq = pdata->osc_freq / 2;
115*4882a593Smuzhiyun priv->ocr = pdata->ocr;
116*4882a593Smuzhiyun priv->cdr = pdata->cdr;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun switch (resource_mem_flags & IORESOURCE_MEM_TYPE_MASK) {
119*4882a593Smuzhiyun case IORESOURCE_MEM_32BIT:
120*4882a593Smuzhiyun priv->read_reg = sp_read_reg32;
121*4882a593Smuzhiyun priv->write_reg = sp_write_reg32;
122*4882a593Smuzhiyun break;
123*4882a593Smuzhiyun case IORESOURCE_MEM_16BIT:
124*4882a593Smuzhiyun priv->read_reg = sp_read_reg16;
125*4882a593Smuzhiyun priv->write_reg = sp_write_reg16;
126*4882a593Smuzhiyun break;
127*4882a593Smuzhiyun case IORESOURCE_MEM_8BIT:
128*4882a593Smuzhiyun default:
129*4882a593Smuzhiyun priv->read_reg = sp_read_reg8;
130*4882a593Smuzhiyun priv->write_reg = sp_write_reg8;
131*4882a593Smuzhiyun break;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun
sp_populate_of(struct sja1000_priv * priv,struct device_node * of)135*4882a593Smuzhiyun static void sp_populate_of(struct sja1000_priv *priv, struct device_node *of)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun int err;
138*4882a593Smuzhiyun u32 prop;
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun err = of_property_read_u32(of, "reg-io-width", &prop);
141*4882a593Smuzhiyun if (err)
142*4882a593Smuzhiyun prop = 1; /* 8 bit is default */
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun switch (prop) {
145*4882a593Smuzhiyun case 4:
146*4882a593Smuzhiyun priv->read_reg = sp_read_reg32;
147*4882a593Smuzhiyun priv->write_reg = sp_write_reg32;
148*4882a593Smuzhiyun break;
149*4882a593Smuzhiyun case 2:
150*4882a593Smuzhiyun priv->read_reg = sp_read_reg16;
151*4882a593Smuzhiyun priv->write_reg = sp_write_reg16;
152*4882a593Smuzhiyun break;
153*4882a593Smuzhiyun case 1:
154*4882a593Smuzhiyun default:
155*4882a593Smuzhiyun priv->read_reg = sp_read_reg8;
156*4882a593Smuzhiyun priv->write_reg = sp_write_reg8;
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun err = of_property_read_u32(of, "nxp,external-clock-frequency", &prop);
160*4882a593Smuzhiyun if (!err)
161*4882a593Smuzhiyun priv->can.clock.freq = prop / 2;
162*4882a593Smuzhiyun else
163*4882a593Smuzhiyun priv->can.clock.freq = SP_CAN_CLOCK; /* default */
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun err = of_property_read_u32(of, "nxp,tx-output-mode", &prop);
166*4882a593Smuzhiyun if (!err)
167*4882a593Smuzhiyun priv->ocr |= prop & OCR_MODE_MASK;
168*4882a593Smuzhiyun else
169*4882a593Smuzhiyun priv->ocr |= OCR_MODE_NORMAL; /* default */
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun err = of_property_read_u32(of, "nxp,tx-output-config", &prop);
172*4882a593Smuzhiyun if (!err)
173*4882a593Smuzhiyun priv->ocr |= (prop << OCR_TX_SHIFT) & OCR_TX_MASK;
174*4882a593Smuzhiyun else
175*4882a593Smuzhiyun priv->ocr |= OCR_TX0_PULLDOWN; /* default */
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun err = of_property_read_u32(of, "nxp,clock-out-frequency", &prop);
178*4882a593Smuzhiyun if (!err && prop) {
179*4882a593Smuzhiyun u32 divider = priv->can.clock.freq * 2 / prop;
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun if (divider > 1)
182*4882a593Smuzhiyun priv->cdr |= divider / 2 - 1;
183*4882a593Smuzhiyun else
184*4882a593Smuzhiyun priv->cdr |= CDR_CLKOUT_MASK;
185*4882a593Smuzhiyun } else {
186*4882a593Smuzhiyun priv->cdr |= CDR_CLK_OFF; /* default */
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun if (!of_property_read_bool(of, "nxp,no-comparator-bypass"))
190*4882a593Smuzhiyun priv->cdr |= CDR_CBP; /* default */
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun static struct sja1000_of_data technologic_data = {
194*4882a593Smuzhiyun .priv_sz = sizeof(struct technologic_priv),
195*4882a593Smuzhiyun .init = sp_technologic_init,
196*4882a593Smuzhiyun };
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun static const struct of_device_id sp_of_table[] = {
199*4882a593Smuzhiyun { .compatible = "nxp,sja1000", .data = NULL, },
200*4882a593Smuzhiyun { .compatible = "technologic,sja1000", .data = &technologic_data, },
201*4882a593Smuzhiyun { /* sentinel */ },
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, sp_of_table);
204*4882a593Smuzhiyun
sp_probe(struct platform_device * pdev)205*4882a593Smuzhiyun static int sp_probe(struct platform_device *pdev)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun int err, irq = 0;
208*4882a593Smuzhiyun void __iomem *addr;
209*4882a593Smuzhiyun struct net_device *dev;
210*4882a593Smuzhiyun struct sja1000_priv *priv;
211*4882a593Smuzhiyun struct resource *res_mem, *res_irq = NULL;
212*4882a593Smuzhiyun struct sja1000_platform_data *pdata;
213*4882a593Smuzhiyun struct device_node *of = pdev->dev.of_node;
214*4882a593Smuzhiyun const struct of_device_id *of_id;
215*4882a593Smuzhiyun const struct sja1000_of_data *of_data = NULL;
216*4882a593Smuzhiyun size_t priv_sz = 0;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun pdata = dev_get_platdata(&pdev->dev);
219*4882a593Smuzhiyun if (!pdata && !of) {
220*4882a593Smuzhiyun dev_err(&pdev->dev, "No platform data provided!\n");
221*4882a593Smuzhiyun return -ENODEV;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
225*4882a593Smuzhiyun if (!res_mem)
226*4882a593Smuzhiyun return -ENODEV;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun if (!devm_request_mem_region(&pdev->dev, res_mem->start,
229*4882a593Smuzhiyun resource_size(res_mem), DRV_NAME))
230*4882a593Smuzhiyun return -EBUSY;
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun addr = devm_ioremap(&pdev->dev, res_mem->start,
233*4882a593Smuzhiyun resource_size(res_mem));
234*4882a593Smuzhiyun if (!addr)
235*4882a593Smuzhiyun return -ENOMEM;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun if (of)
238*4882a593Smuzhiyun irq = irq_of_parse_and_map(of, 0);
239*4882a593Smuzhiyun else
240*4882a593Smuzhiyun res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun if (!irq && !res_irq)
243*4882a593Smuzhiyun return -ENODEV;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun of_id = of_match_device(sp_of_table, &pdev->dev);
246*4882a593Smuzhiyun if (of_id && of_id->data) {
247*4882a593Smuzhiyun of_data = of_id->data;
248*4882a593Smuzhiyun priv_sz = of_data->priv_sz;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun dev = alloc_sja1000dev(priv_sz);
252*4882a593Smuzhiyun if (!dev)
253*4882a593Smuzhiyun return -ENOMEM;
254*4882a593Smuzhiyun priv = netdev_priv(dev);
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (res_irq) {
257*4882a593Smuzhiyun irq = res_irq->start;
258*4882a593Smuzhiyun priv->irq_flags = res_irq->flags & IRQF_TRIGGER_MASK;
259*4882a593Smuzhiyun if (res_irq->flags & IORESOURCE_IRQ_SHAREABLE)
260*4882a593Smuzhiyun priv->irq_flags |= IRQF_SHARED;
261*4882a593Smuzhiyun } else {
262*4882a593Smuzhiyun priv->irq_flags = IRQF_SHARED;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun dev->irq = irq;
266*4882a593Smuzhiyun priv->reg_base = addr;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun if (of) {
269*4882a593Smuzhiyun sp_populate_of(priv, of);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun if (of_data && of_data->init) {
272*4882a593Smuzhiyun err = of_data->init(priv, of);
273*4882a593Smuzhiyun if (err)
274*4882a593Smuzhiyun goto exit_free;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun } else {
277*4882a593Smuzhiyun sp_populate(priv, pdata, res_mem->flags);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun platform_set_drvdata(pdev, dev);
281*4882a593Smuzhiyun SET_NETDEV_DEV(dev, &pdev->dev);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun err = register_sja1000dev(dev);
284*4882a593Smuzhiyun if (err) {
285*4882a593Smuzhiyun dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
286*4882a593Smuzhiyun DRV_NAME, err);
287*4882a593Smuzhiyun goto exit_free;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun dev_info(&pdev->dev, "%s device registered (reg_base=%p, irq=%d)\n",
291*4882a593Smuzhiyun DRV_NAME, priv->reg_base, dev->irq);
292*4882a593Smuzhiyun return 0;
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun exit_free:
295*4882a593Smuzhiyun free_sja1000dev(dev);
296*4882a593Smuzhiyun return err;
297*4882a593Smuzhiyun }
298*4882a593Smuzhiyun
sp_remove(struct platform_device * pdev)299*4882a593Smuzhiyun static int sp_remove(struct platform_device *pdev)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun struct net_device *dev = platform_get_drvdata(pdev);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun unregister_sja1000dev(dev);
304*4882a593Smuzhiyun free_sja1000dev(dev);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun return 0;
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun static struct platform_driver sp_driver = {
310*4882a593Smuzhiyun .probe = sp_probe,
311*4882a593Smuzhiyun .remove = sp_remove,
312*4882a593Smuzhiyun .driver = {
313*4882a593Smuzhiyun .name = DRV_NAME,
314*4882a593Smuzhiyun .of_match_table = sp_of_table,
315*4882a593Smuzhiyun },
316*4882a593Smuzhiyun };
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun module_platform_driver(sp_driver);
319