1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2010-2012 Stephane Grosjean <s.grosjean@peak-system.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * CAN driver for PEAK-System PCAN-PC Card
6*4882a593Smuzhiyun * Derived from the PCAN project file driver/src/pcan_pccard.c
7*4882a593Smuzhiyun * Copyright (C) 2006-2010 PEAK System-Technik GmbH
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/interrupt.h>
12*4882a593Smuzhiyun #include <linux/netdevice.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/timer.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <pcmcia/cistpl.h>
17*4882a593Smuzhiyun #include <pcmcia/ds.h>
18*4882a593Smuzhiyun #include <linux/can.h>
19*4882a593Smuzhiyun #include <linux/can/dev.h>
20*4882a593Smuzhiyun #include "sja1000.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun MODULE_AUTHOR("Stephane Grosjean <s.grosjean@peak-system.com>");
23*4882a593Smuzhiyun MODULE_DESCRIPTION("CAN driver for PEAK-System PCAN-PC Cards");
24*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
25*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("PEAK PCAN-PC Card");
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* PEAK-System PCMCIA driver name */
28*4882a593Smuzhiyun #define PCC_NAME "peak_pcmcia"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define PCC_CHAN_MAX 2
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define PCC_CAN_CLOCK (16000000 / 2)
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define PCC_MANF_ID 0x0377
35*4882a593Smuzhiyun #define PCC_CARD_ID 0x0001
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun #define PCC_CHAN_SIZE 0x20
38*4882a593Smuzhiyun #define PCC_CHAN_OFF(c) ((c) * PCC_CHAN_SIZE)
39*4882a593Smuzhiyun #define PCC_COMN_OFF (PCC_CHAN_OFF(PCC_CHAN_MAX))
40*4882a593Smuzhiyun #define PCC_COMN_SIZE 0x40
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun /* common area registers */
43*4882a593Smuzhiyun #define PCC_CCR 0x00
44*4882a593Smuzhiyun #define PCC_CSR 0x02
45*4882a593Smuzhiyun #define PCC_CPR 0x04
46*4882a593Smuzhiyun #define PCC_SPI_DIR 0x06
47*4882a593Smuzhiyun #define PCC_SPI_DOR 0x08
48*4882a593Smuzhiyun #define PCC_SPI_ADR 0x0a
49*4882a593Smuzhiyun #define PCC_SPI_IR 0x0c
50*4882a593Smuzhiyun #define PCC_FW_MAJOR 0x10
51*4882a593Smuzhiyun #define PCC_FW_MINOR 0x12
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /* CCR bits */
54*4882a593Smuzhiyun #define PCC_CCR_CLK_16 0x00
55*4882a593Smuzhiyun #define PCC_CCR_CLK_10 0x01
56*4882a593Smuzhiyun #define PCC_CCR_CLK_21 0x02
57*4882a593Smuzhiyun #define PCC_CCR_CLK_8 0x03
58*4882a593Smuzhiyun #define PCC_CCR_CLK_MASK PCC_CCR_CLK_8
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun #define PCC_CCR_RST_CHAN(c) (0x01 << ((c) + 2))
61*4882a593Smuzhiyun #define PCC_CCR_RST_ALL (PCC_CCR_RST_CHAN(0) | PCC_CCR_RST_CHAN(1))
62*4882a593Smuzhiyun #define PCC_CCR_RST_MASK PCC_CCR_RST_ALL
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* led selection bits */
65*4882a593Smuzhiyun #define PCC_LED(c) (1 << (c))
66*4882a593Smuzhiyun #define PCC_LED_ALL (PCC_LED(0) | PCC_LED(1))
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* led state value */
69*4882a593Smuzhiyun #define PCC_LED_ON 0x00
70*4882a593Smuzhiyun #define PCC_LED_FAST 0x01
71*4882a593Smuzhiyun #define PCC_LED_SLOW 0x02
72*4882a593Smuzhiyun #define PCC_LED_OFF 0x03
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #define PCC_CCR_LED_CHAN(s, c) ((s) << (((c) + 2) << 1))
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #define PCC_CCR_LED_ON_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_ON, c)
77*4882a593Smuzhiyun #define PCC_CCR_LED_FAST_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_FAST, c)
78*4882a593Smuzhiyun #define PCC_CCR_LED_SLOW_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_SLOW, c)
79*4882a593Smuzhiyun #define PCC_CCR_LED_OFF_CHAN(c) PCC_CCR_LED_CHAN(PCC_LED_OFF, c)
80*4882a593Smuzhiyun #define PCC_CCR_LED_MASK_CHAN(c) PCC_CCR_LED_OFF_CHAN(c)
81*4882a593Smuzhiyun #define PCC_CCR_LED_OFF_ALL (PCC_CCR_LED_OFF_CHAN(0) | \
82*4882a593Smuzhiyun PCC_CCR_LED_OFF_CHAN(1))
83*4882a593Smuzhiyun #define PCC_CCR_LED_MASK PCC_CCR_LED_OFF_ALL
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun #define PCC_CCR_INIT (PCC_CCR_CLK_16 | PCC_CCR_RST_ALL | PCC_CCR_LED_OFF_ALL)
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* CSR bits */
88*4882a593Smuzhiyun #define PCC_CSR_SPI_BUSY 0x04
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* time waiting for SPI busy (prevent from infinite loop) */
91*4882a593Smuzhiyun #define PCC_SPI_MAX_BUSY_WAIT_MS 3
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun /* max count of reading the SPI status register waiting for a change */
94*4882a593Smuzhiyun /* (prevent from infinite loop) */
95*4882a593Smuzhiyun #define PCC_WRITE_MAX_LOOP 1000
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun /* max nb of int handled by that isr in one shot (prevent from infinite loop) */
98*4882a593Smuzhiyun #define PCC_ISR_MAX_LOOP 10
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /* EEPROM chip instruction set */
101*4882a593Smuzhiyun /* note: EEPROM Read/Write instructions include A8 bit */
102*4882a593Smuzhiyun #define PCC_EEP_WRITE(a) (0x02 | (((a) & 0x100) >> 5))
103*4882a593Smuzhiyun #define PCC_EEP_READ(a) (0x03 | (((a) & 0x100) >> 5))
104*4882a593Smuzhiyun #define PCC_EEP_WRDI 0x04 /* EEPROM Write Disable */
105*4882a593Smuzhiyun #define PCC_EEP_RDSR 0x05 /* EEPROM Read Status Register */
106*4882a593Smuzhiyun #define PCC_EEP_WREN 0x06 /* EEPROM Write Enable */
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* EEPROM Status Register bits */
109*4882a593Smuzhiyun #define PCC_EEP_SR_WEN 0x02 /* EEPROM SR Write Enable bit */
110*4882a593Smuzhiyun #define PCC_EEP_SR_WIP 0x01 /* EEPROM SR Write In Progress bit */
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /*
113*4882a593Smuzhiyun * The board configuration is probably following:
114*4882a593Smuzhiyun * RX1 is connected to ground.
115*4882a593Smuzhiyun * TX1 is not connected.
116*4882a593Smuzhiyun * CLKO is not connected.
117*4882a593Smuzhiyun * Setting the OCR register to 0xDA is a good idea.
118*4882a593Smuzhiyun * This means normal output mode, push-pull and the correct polarity.
119*4882a593Smuzhiyun */
120*4882a593Smuzhiyun #define PCC_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL)
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /*
123*4882a593Smuzhiyun * In the CDR register, you should set CBP to 1.
124*4882a593Smuzhiyun * You will probably also want to set the clock divider value to 7
125*4882a593Smuzhiyun * (meaning direct oscillator output) because the second SJA1000 chip
126*4882a593Smuzhiyun * is driven by the first one CLKOUT output.
127*4882a593Smuzhiyun */
128*4882a593Smuzhiyun #define PCC_CDR (CDR_CBP | CDR_CLKOUT_MASK)
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun struct pcan_channel {
131*4882a593Smuzhiyun struct net_device *netdev;
132*4882a593Smuzhiyun unsigned long prev_rx_bytes;
133*4882a593Smuzhiyun unsigned long prev_tx_bytes;
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* PCAN-PC Card private structure */
137*4882a593Smuzhiyun struct pcan_pccard {
138*4882a593Smuzhiyun struct pcmcia_device *pdev;
139*4882a593Smuzhiyun int chan_count;
140*4882a593Smuzhiyun struct pcan_channel channel[PCC_CHAN_MAX];
141*4882a593Smuzhiyun u8 ccr;
142*4882a593Smuzhiyun u8 fw_major;
143*4882a593Smuzhiyun u8 fw_minor;
144*4882a593Smuzhiyun void __iomem *ioport_addr;
145*4882a593Smuzhiyun struct timer_list led_timer;
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun static struct pcmcia_device_id pcan_table[] = {
149*4882a593Smuzhiyun PCMCIA_DEVICE_MANF_CARD(PCC_MANF_ID, PCC_CARD_ID),
150*4882a593Smuzhiyun PCMCIA_DEVICE_NULL,
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pcmcia, pcan_table);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun static void pcan_set_leds(struct pcan_pccard *card, u8 mask, u8 state);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /*
158*4882a593Smuzhiyun * start timer which controls leds state
159*4882a593Smuzhiyun */
pcan_start_led_timer(struct pcan_pccard * card)160*4882a593Smuzhiyun static void pcan_start_led_timer(struct pcan_pccard *card)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun if (!timer_pending(&card->led_timer))
163*4882a593Smuzhiyun mod_timer(&card->led_timer, jiffies + HZ);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /*
167*4882a593Smuzhiyun * stop the timer which controls leds state
168*4882a593Smuzhiyun */
pcan_stop_led_timer(struct pcan_pccard * card)169*4882a593Smuzhiyun static void pcan_stop_led_timer(struct pcan_pccard *card)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun del_timer_sync(&card->led_timer);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun /*
175*4882a593Smuzhiyun * read a sja1000 register
176*4882a593Smuzhiyun */
pcan_read_canreg(const struct sja1000_priv * priv,int port)177*4882a593Smuzhiyun static u8 pcan_read_canreg(const struct sja1000_priv *priv, int port)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun return ioread8(priv->reg_base + port);
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /*
183*4882a593Smuzhiyun * write a sja1000 register
184*4882a593Smuzhiyun */
pcan_write_canreg(const struct sja1000_priv * priv,int port,u8 v)185*4882a593Smuzhiyun static void pcan_write_canreg(const struct sja1000_priv *priv, int port, u8 v)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun struct pcan_pccard *card = priv->priv;
188*4882a593Smuzhiyun int c = (priv->reg_base - card->ioport_addr) / PCC_CHAN_SIZE;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun /* sja1000 register changes control the leds state */
191*4882a593Smuzhiyun if (port == SJA1000_MOD)
192*4882a593Smuzhiyun switch (v) {
193*4882a593Smuzhiyun case MOD_RM:
194*4882a593Smuzhiyun /* Reset Mode: set led on */
195*4882a593Smuzhiyun pcan_set_leds(card, PCC_LED(c), PCC_LED_ON);
196*4882a593Smuzhiyun break;
197*4882a593Smuzhiyun case 0x00:
198*4882a593Smuzhiyun /* Normal Mode: led slow blinking and start led timer */
199*4882a593Smuzhiyun pcan_set_leds(card, PCC_LED(c), PCC_LED_SLOW);
200*4882a593Smuzhiyun pcan_start_led_timer(card);
201*4882a593Smuzhiyun break;
202*4882a593Smuzhiyun default:
203*4882a593Smuzhiyun break;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun iowrite8(v, priv->reg_base + port);
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /*
210*4882a593Smuzhiyun * read a register from the common area
211*4882a593Smuzhiyun */
pcan_read_reg(struct pcan_pccard * card,int port)212*4882a593Smuzhiyun static u8 pcan_read_reg(struct pcan_pccard *card, int port)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun return ioread8(card->ioport_addr + PCC_COMN_OFF + port);
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun /*
218*4882a593Smuzhiyun * write a register into the common area
219*4882a593Smuzhiyun */
pcan_write_reg(struct pcan_pccard * card,int port,u8 v)220*4882a593Smuzhiyun static void pcan_write_reg(struct pcan_pccard *card, int port, u8 v)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun /* cache ccr value */
223*4882a593Smuzhiyun if (port == PCC_CCR) {
224*4882a593Smuzhiyun if (card->ccr == v)
225*4882a593Smuzhiyun return;
226*4882a593Smuzhiyun card->ccr = v;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun iowrite8(v, card->ioport_addr + PCC_COMN_OFF + port);
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun /*
233*4882a593Smuzhiyun * check whether the card is present by checking its fw version numbers
234*4882a593Smuzhiyun * against values read at probing time.
235*4882a593Smuzhiyun */
pcan_pccard_present(struct pcan_pccard * card)236*4882a593Smuzhiyun static inline int pcan_pccard_present(struct pcan_pccard *card)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun return ((pcan_read_reg(card, PCC_FW_MAJOR) == card->fw_major) &&
239*4882a593Smuzhiyun (pcan_read_reg(card, PCC_FW_MINOR) == card->fw_minor));
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /*
243*4882a593Smuzhiyun * wait for SPI engine while it is busy
244*4882a593Smuzhiyun */
pcan_wait_spi_busy(struct pcan_pccard * card)245*4882a593Smuzhiyun static int pcan_wait_spi_busy(struct pcan_pccard *card)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun unsigned long timeout = jiffies +
248*4882a593Smuzhiyun msecs_to_jiffies(PCC_SPI_MAX_BUSY_WAIT_MS) + 1;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun /* be sure to read status at least once after sleeping */
251*4882a593Smuzhiyun while (pcan_read_reg(card, PCC_CSR) & PCC_CSR_SPI_BUSY) {
252*4882a593Smuzhiyun if (time_after(jiffies, timeout))
253*4882a593Smuzhiyun return -EBUSY;
254*4882a593Smuzhiyun schedule();
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /*
261*4882a593Smuzhiyun * write data in device eeprom
262*4882a593Smuzhiyun */
pcan_write_eeprom(struct pcan_pccard * card,u16 addr,u8 v)263*4882a593Smuzhiyun static int pcan_write_eeprom(struct pcan_pccard *card, u16 addr, u8 v)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun u8 status;
266*4882a593Smuzhiyun int err, i;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun /* write instruction enabling write */
269*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_WREN);
270*4882a593Smuzhiyun err = pcan_wait_spi_busy(card);
271*4882a593Smuzhiyun if (err)
272*4882a593Smuzhiyun goto we_spi_err;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /* wait until write enabled */
275*4882a593Smuzhiyun for (i = 0; i < PCC_WRITE_MAX_LOOP; i++) {
276*4882a593Smuzhiyun /* write instruction reading the status register */
277*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_RDSR);
278*4882a593Smuzhiyun err = pcan_wait_spi_busy(card);
279*4882a593Smuzhiyun if (err)
280*4882a593Smuzhiyun goto we_spi_err;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* get status register value and check write enable bit */
283*4882a593Smuzhiyun status = pcan_read_reg(card, PCC_SPI_DIR);
284*4882a593Smuzhiyun if (status & PCC_EEP_SR_WEN)
285*4882a593Smuzhiyun break;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if (i >= PCC_WRITE_MAX_LOOP) {
289*4882a593Smuzhiyun dev_err(&card->pdev->dev,
290*4882a593Smuzhiyun "stop waiting to be allowed to write in eeprom\n");
291*4882a593Smuzhiyun return -EIO;
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun /* set address and data */
295*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_ADR, addr & 0xff);
296*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_DOR, v);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun /*
299*4882a593Smuzhiyun * write instruction with bit[3] set according to address value:
300*4882a593Smuzhiyun * if addr refers to upper half of the memory array: bit[3] = 1
301*4882a593Smuzhiyun */
302*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_WRITE(addr));
303*4882a593Smuzhiyun err = pcan_wait_spi_busy(card);
304*4882a593Smuzhiyun if (err)
305*4882a593Smuzhiyun goto we_spi_err;
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* wait while write in progress */
308*4882a593Smuzhiyun for (i = 0; i < PCC_WRITE_MAX_LOOP; i++) {
309*4882a593Smuzhiyun /* write instruction reading the status register */
310*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_RDSR);
311*4882a593Smuzhiyun err = pcan_wait_spi_busy(card);
312*4882a593Smuzhiyun if (err)
313*4882a593Smuzhiyun goto we_spi_err;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun /* get status register value and check write in progress bit */
316*4882a593Smuzhiyun status = pcan_read_reg(card, PCC_SPI_DIR);
317*4882a593Smuzhiyun if (!(status & PCC_EEP_SR_WIP))
318*4882a593Smuzhiyun break;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun
321*4882a593Smuzhiyun if (i >= PCC_WRITE_MAX_LOOP) {
322*4882a593Smuzhiyun dev_err(&card->pdev->dev,
323*4882a593Smuzhiyun "stop waiting for write in eeprom to complete\n");
324*4882a593Smuzhiyun return -EIO;
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun /* write instruction disabling write */
328*4882a593Smuzhiyun pcan_write_reg(card, PCC_SPI_IR, PCC_EEP_WRDI);
329*4882a593Smuzhiyun err = pcan_wait_spi_busy(card);
330*4882a593Smuzhiyun if (err)
331*4882a593Smuzhiyun goto we_spi_err;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun return 0;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun we_spi_err:
336*4882a593Smuzhiyun dev_err(&card->pdev->dev,
337*4882a593Smuzhiyun "stop waiting (spi engine always busy) err %d\n", err);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun return err;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
pcan_set_leds(struct pcan_pccard * card,u8 led_mask,u8 state)342*4882a593Smuzhiyun static void pcan_set_leds(struct pcan_pccard *card, u8 led_mask, u8 state)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun u8 ccr = card->ccr;
345*4882a593Smuzhiyun int i;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun for (i = 0; i < card->chan_count; i++)
348*4882a593Smuzhiyun if (led_mask & PCC_LED(i)) {
349*4882a593Smuzhiyun /* clear corresponding led bits in ccr */
350*4882a593Smuzhiyun ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
351*4882a593Smuzhiyun /* then set new bits */
352*4882a593Smuzhiyun ccr |= PCC_CCR_LED_CHAN(state, i);
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun /* real write only if something has changed in ccr */
356*4882a593Smuzhiyun pcan_write_reg(card, PCC_CCR, ccr);
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun /*
360*4882a593Smuzhiyun * enable/disable CAN connectors power
361*4882a593Smuzhiyun */
pcan_set_can_power(struct pcan_pccard * card,int onoff)362*4882a593Smuzhiyun static inline void pcan_set_can_power(struct pcan_pccard *card, int onoff)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun int err;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun err = pcan_write_eeprom(card, 0, !!onoff);
367*4882a593Smuzhiyun if (err)
368*4882a593Smuzhiyun dev_err(&card->pdev->dev,
369*4882a593Smuzhiyun "failed setting power %s to can connectors (err %d)\n",
370*4882a593Smuzhiyun (onoff) ? "on" : "off", err);
371*4882a593Smuzhiyun }
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun /*
374*4882a593Smuzhiyun * set leds state according to channel activity
375*4882a593Smuzhiyun */
pcan_led_timer(struct timer_list * t)376*4882a593Smuzhiyun static void pcan_led_timer(struct timer_list *t)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun struct pcan_pccard *card = from_timer(card, t, led_timer);
379*4882a593Smuzhiyun struct net_device *netdev;
380*4882a593Smuzhiyun int i, up_count = 0;
381*4882a593Smuzhiyun u8 ccr;
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun ccr = card->ccr;
384*4882a593Smuzhiyun for (i = 0; i < card->chan_count; i++) {
385*4882a593Smuzhiyun /* default is: not configured */
386*4882a593Smuzhiyun ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
387*4882a593Smuzhiyun ccr |= PCC_CCR_LED_ON_CHAN(i);
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun netdev = card->channel[i].netdev;
390*4882a593Smuzhiyun if (!netdev || !(netdev->flags & IFF_UP))
391*4882a593Smuzhiyun continue;
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun up_count++;
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun /* no activity (but configured) */
396*4882a593Smuzhiyun ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
397*4882a593Smuzhiyun ccr |= PCC_CCR_LED_SLOW_CHAN(i);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /* if bytes counters changed, set fast blinking led */
400*4882a593Smuzhiyun if (netdev->stats.rx_bytes != card->channel[i].prev_rx_bytes) {
401*4882a593Smuzhiyun card->channel[i].prev_rx_bytes = netdev->stats.rx_bytes;
402*4882a593Smuzhiyun ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
403*4882a593Smuzhiyun ccr |= PCC_CCR_LED_FAST_CHAN(i);
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun if (netdev->stats.tx_bytes != card->channel[i].prev_tx_bytes) {
406*4882a593Smuzhiyun card->channel[i].prev_tx_bytes = netdev->stats.tx_bytes;
407*4882a593Smuzhiyun ccr &= ~PCC_CCR_LED_MASK_CHAN(i);
408*4882a593Smuzhiyun ccr |= PCC_CCR_LED_FAST_CHAN(i);
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /* write the new leds state */
413*4882a593Smuzhiyun pcan_write_reg(card, PCC_CCR, ccr);
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun /* restart timer (except if no more configured channels) */
416*4882a593Smuzhiyun if (up_count)
417*4882a593Smuzhiyun mod_timer(&card->led_timer, jiffies + HZ);
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun /*
421*4882a593Smuzhiyun * interrupt service routine
422*4882a593Smuzhiyun */
pcan_isr(int irq,void * dev_id)423*4882a593Smuzhiyun static irqreturn_t pcan_isr(int irq, void *dev_id)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun struct pcan_pccard *card = dev_id;
426*4882a593Smuzhiyun int irq_handled;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* prevent from infinite loop */
429*4882a593Smuzhiyun for (irq_handled = 0; irq_handled < PCC_ISR_MAX_LOOP; irq_handled++) {
430*4882a593Smuzhiyun /* handle shared interrupt and next loop */
431*4882a593Smuzhiyun int nothing_to_handle = 1;
432*4882a593Smuzhiyun int i;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun /* check interrupt for each channel */
435*4882a593Smuzhiyun for (i = 0; i < card->chan_count; i++) {
436*4882a593Smuzhiyun struct net_device *netdev;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun /*
439*4882a593Smuzhiyun * check whether the card is present before calling
440*4882a593Smuzhiyun * sja1000_interrupt() to speed up hotplug detection
441*4882a593Smuzhiyun */
442*4882a593Smuzhiyun if (!pcan_pccard_present(card)) {
443*4882a593Smuzhiyun /* card unplugged during isr */
444*4882a593Smuzhiyun return IRQ_NONE;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun /*
448*4882a593Smuzhiyun * should check whether all or SJA1000_MAX_IRQ
449*4882a593Smuzhiyun * interrupts have been handled: loop again to be sure.
450*4882a593Smuzhiyun */
451*4882a593Smuzhiyun netdev = card->channel[i].netdev;
452*4882a593Smuzhiyun if (netdev &&
453*4882a593Smuzhiyun sja1000_interrupt(irq, netdev) == IRQ_HANDLED)
454*4882a593Smuzhiyun nothing_to_handle = 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun if (nothing_to_handle)
458*4882a593Smuzhiyun break;
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun return (irq_handled) ? IRQ_HANDLED : IRQ_NONE;
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun /*
465*4882a593Smuzhiyun * free all resources used by the channels and switch off leds and can power
466*4882a593Smuzhiyun */
pcan_free_channels(struct pcan_pccard * card)467*4882a593Smuzhiyun static void pcan_free_channels(struct pcan_pccard *card)
468*4882a593Smuzhiyun {
469*4882a593Smuzhiyun int i;
470*4882a593Smuzhiyun u8 led_mask = 0;
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun for (i = 0; i < card->chan_count; i++) {
473*4882a593Smuzhiyun struct net_device *netdev;
474*4882a593Smuzhiyun char name[IFNAMSIZ];
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun led_mask |= PCC_LED(i);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun netdev = card->channel[i].netdev;
479*4882a593Smuzhiyun if (!netdev)
480*4882a593Smuzhiyun continue;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun strlcpy(name, netdev->name, IFNAMSIZ);
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun unregister_sja1000dev(netdev);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun free_sja1000dev(netdev);
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun dev_info(&card->pdev->dev, "%s removed\n", name);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /* do it only if device not removed */
492*4882a593Smuzhiyun if (pcan_pccard_present(card)) {
493*4882a593Smuzhiyun pcan_set_leds(card, led_mask, PCC_LED_OFF);
494*4882a593Smuzhiyun pcan_set_can_power(card, 0);
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun /*
499*4882a593Smuzhiyun * check if a CAN controller is present at the specified location
500*4882a593Smuzhiyun */
pcan_channel_present(struct sja1000_priv * priv)501*4882a593Smuzhiyun static inline int pcan_channel_present(struct sja1000_priv *priv)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun /* make sure SJA1000 is in reset mode */
504*4882a593Smuzhiyun pcan_write_canreg(priv, SJA1000_MOD, 1);
505*4882a593Smuzhiyun pcan_write_canreg(priv, SJA1000_CDR, CDR_PELICAN);
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun /* read reset-values */
508*4882a593Smuzhiyun if (pcan_read_canreg(priv, SJA1000_CDR) == CDR_PELICAN)
509*4882a593Smuzhiyun return 1;
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun return 0;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun
pcan_add_channels(struct pcan_pccard * card)514*4882a593Smuzhiyun static int pcan_add_channels(struct pcan_pccard *card)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun struct pcmcia_device *pdev = card->pdev;
517*4882a593Smuzhiyun int i, err = 0;
518*4882a593Smuzhiyun u8 ccr = PCC_CCR_INIT;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun /* init common registers (reset channels and leds off) */
521*4882a593Smuzhiyun card->ccr = ~ccr;
522*4882a593Smuzhiyun pcan_write_reg(card, PCC_CCR, ccr);
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun /* wait 2ms before unresetting channels */
525*4882a593Smuzhiyun usleep_range(2000, 3000);
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun ccr &= ~PCC_CCR_RST_ALL;
528*4882a593Smuzhiyun pcan_write_reg(card, PCC_CCR, ccr);
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun /* create one network device per channel detected */
531*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(card->channel); i++) {
532*4882a593Smuzhiyun struct net_device *netdev;
533*4882a593Smuzhiyun struct sja1000_priv *priv;
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun netdev = alloc_sja1000dev(0);
536*4882a593Smuzhiyun if (!netdev) {
537*4882a593Smuzhiyun err = -ENOMEM;
538*4882a593Smuzhiyun break;
539*4882a593Smuzhiyun }
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun /* update linkages */
542*4882a593Smuzhiyun priv = netdev_priv(netdev);
543*4882a593Smuzhiyun priv->priv = card;
544*4882a593Smuzhiyun SET_NETDEV_DEV(netdev, &pdev->dev);
545*4882a593Smuzhiyun netdev->dev_id = i;
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun priv->irq_flags = IRQF_SHARED;
548*4882a593Smuzhiyun netdev->irq = pdev->irq;
549*4882a593Smuzhiyun priv->reg_base = card->ioport_addr + PCC_CHAN_OFF(i);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun /* check if channel is present */
552*4882a593Smuzhiyun if (!pcan_channel_present(priv)) {
553*4882a593Smuzhiyun dev_err(&pdev->dev, "channel %d not present\n", i);
554*4882a593Smuzhiyun free_sja1000dev(netdev);
555*4882a593Smuzhiyun continue;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun priv->read_reg = pcan_read_canreg;
559*4882a593Smuzhiyun priv->write_reg = pcan_write_canreg;
560*4882a593Smuzhiyun priv->can.clock.freq = PCC_CAN_CLOCK;
561*4882a593Smuzhiyun priv->ocr = PCC_OCR;
562*4882a593Smuzhiyun priv->cdr = PCC_CDR;
563*4882a593Smuzhiyun
564*4882a593Smuzhiyun /* Neither a slave device distributes the clock */
565*4882a593Smuzhiyun if (i > 0)
566*4882a593Smuzhiyun priv->cdr |= CDR_CLK_OFF;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun priv->flags |= SJA1000_CUSTOM_IRQ_HANDLER;
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun /* register SJA1000 device */
571*4882a593Smuzhiyun err = register_sja1000dev(netdev);
572*4882a593Smuzhiyun if (err) {
573*4882a593Smuzhiyun free_sja1000dev(netdev);
574*4882a593Smuzhiyun continue;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun card->channel[i].netdev = netdev;
578*4882a593Smuzhiyun card->chan_count++;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /* set corresponding led on in the new ccr */
581*4882a593Smuzhiyun ccr &= ~PCC_CCR_LED_OFF_CHAN(i);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun dev_info(&pdev->dev,
584*4882a593Smuzhiyun "%s on channel %d at 0x%p irq %d\n",
585*4882a593Smuzhiyun netdev->name, i, priv->reg_base, pdev->irq);
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun /* write new ccr (change leds state) */
589*4882a593Smuzhiyun pcan_write_reg(card, PCC_CCR, ccr);
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun return err;
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun
pcan_conf_check(struct pcmcia_device * pdev,void * priv_data)594*4882a593Smuzhiyun static int pcan_conf_check(struct pcmcia_device *pdev, void *priv_data)
595*4882a593Smuzhiyun {
596*4882a593Smuzhiyun pdev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
597*4882a593Smuzhiyun pdev->resource[0]->flags |= IO_DATA_PATH_WIDTH_8; /* only */
598*4882a593Smuzhiyun pdev->io_lines = 10;
599*4882a593Smuzhiyun
600*4882a593Smuzhiyun /* This reserves IO space but doesn't actually enable it */
601*4882a593Smuzhiyun return pcmcia_request_io(pdev);
602*4882a593Smuzhiyun }
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun /*
605*4882a593Smuzhiyun * free all resources used by the device
606*4882a593Smuzhiyun */
pcan_free(struct pcmcia_device * pdev)607*4882a593Smuzhiyun static void pcan_free(struct pcmcia_device *pdev)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun struct pcan_pccard *card = pdev->priv;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun if (!card)
612*4882a593Smuzhiyun return;
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun free_irq(pdev->irq, card);
615*4882a593Smuzhiyun pcan_stop_led_timer(card);
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun pcan_free_channels(card);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun ioport_unmap(card->ioport_addr);
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun kfree(card);
622*4882a593Smuzhiyun pdev->priv = NULL;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun /*
626*4882a593Smuzhiyun * setup PCMCIA socket and probe for PEAK-System PC-CARD
627*4882a593Smuzhiyun */
pcan_probe(struct pcmcia_device * pdev)628*4882a593Smuzhiyun static int pcan_probe(struct pcmcia_device *pdev)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun struct pcan_pccard *card;
631*4882a593Smuzhiyun int err;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun pdev->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun err = pcmcia_loop_config(pdev, pcan_conf_check, NULL);
636*4882a593Smuzhiyun if (err) {
637*4882a593Smuzhiyun dev_err(&pdev->dev, "pcmcia_loop_config() error %d\n", err);
638*4882a593Smuzhiyun goto probe_err_1;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun if (!pdev->irq) {
642*4882a593Smuzhiyun dev_err(&pdev->dev, "no irq assigned\n");
643*4882a593Smuzhiyun err = -ENODEV;
644*4882a593Smuzhiyun goto probe_err_1;
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun err = pcmcia_enable_device(pdev);
648*4882a593Smuzhiyun if (err) {
649*4882a593Smuzhiyun dev_err(&pdev->dev, "pcmcia_enable_device failed err=%d\n",
650*4882a593Smuzhiyun err);
651*4882a593Smuzhiyun goto probe_err_1;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun card = kzalloc(sizeof(struct pcan_pccard), GFP_KERNEL);
655*4882a593Smuzhiyun if (!card) {
656*4882a593Smuzhiyun err = -ENOMEM;
657*4882a593Smuzhiyun goto probe_err_2;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun card->pdev = pdev;
661*4882a593Smuzhiyun pdev->priv = card;
662*4882a593Smuzhiyun
663*4882a593Smuzhiyun /* sja1000 api uses iomem */
664*4882a593Smuzhiyun card->ioport_addr = ioport_map(pdev->resource[0]->start,
665*4882a593Smuzhiyun resource_size(pdev->resource[0]));
666*4882a593Smuzhiyun if (!card->ioport_addr) {
667*4882a593Smuzhiyun dev_err(&pdev->dev, "couldn't map io port into io memory\n");
668*4882a593Smuzhiyun err = -ENOMEM;
669*4882a593Smuzhiyun goto probe_err_3;
670*4882a593Smuzhiyun }
671*4882a593Smuzhiyun card->fw_major = pcan_read_reg(card, PCC_FW_MAJOR);
672*4882a593Smuzhiyun card->fw_minor = pcan_read_reg(card, PCC_FW_MINOR);
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun /* display board name and firmware version */
675*4882a593Smuzhiyun dev_info(&pdev->dev, "PEAK-System pcmcia card %s fw %d.%d\n",
676*4882a593Smuzhiyun pdev->prod_id[1] ? pdev->prod_id[1] : "PCAN-PC Card",
677*4882a593Smuzhiyun card->fw_major, card->fw_minor);
678*4882a593Smuzhiyun
679*4882a593Smuzhiyun /* detect available channels */
680*4882a593Smuzhiyun pcan_add_channels(card);
681*4882a593Smuzhiyun if (!card->chan_count) {
682*4882a593Smuzhiyun err = -ENOMEM;
683*4882a593Smuzhiyun goto probe_err_4;
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun /* init the timer which controls the leds */
687*4882a593Smuzhiyun timer_setup(&card->led_timer, pcan_led_timer, 0);
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun /* request the given irq */
690*4882a593Smuzhiyun err = request_irq(pdev->irq, &pcan_isr, IRQF_SHARED, PCC_NAME, card);
691*4882a593Smuzhiyun if (err) {
692*4882a593Smuzhiyun dev_err(&pdev->dev, "couldn't request irq%d\n", pdev->irq);
693*4882a593Smuzhiyun goto probe_err_5;
694*4882a593Smuzhiyun }
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /* power on the connectors */
697*4882a593Smuzhiyun pcan_set_can_power(card, 1);
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun return 0;
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun probe_err_5:
702*4882a593Smuzhiyun /* unregister can devices from network */
703*4882a593Smuzhiyun pcan_free_channels(card);
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun probe_err_4:
706*4882a593Smuzhiyun ioport_unmap(card->ioport_addr);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun probe_err_3:
709*4882a593Smuzhiyun kfree(card);
710*4882a593Smuzhiyun pdev->priv = NULL;
711*4882a593Smuzhiyun
712*4882a593Smuzhiyun probe_err_2:
713*4882a593Smuzhiyun pcmcia_disable_device(pdev);
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun probe_err_1:
716*4882a593Smuzhiyun return err;
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun /*
720*4882a593Smuzhiyun * release claimed resources
721*4882a593Smuzhiyun */
pcan_remove(struct pcmcia_device * pdev)722*4882a593Smuzhiyun static void pcan_remove(struct pcmcia_device *pdev)
723*4882a593Smuzhiyun {
724*4882a593Smuzhiyun pcan_free(pdev);
725*4882a593Smuzhiyun pcmcia_disable_device(pdev);
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun static struct pcmcia_driver pcan_driver = {
729*4882a593Smuzhiyun .name = PCC_NAME,
730*4882a593Smuzhiyun .probe = pcan_probe,
731*4882a593Smuzhiyun .remove = pcan_remove,
732*4882a593Smuzhiyun .id_table = pcan_table,
733*4882a593Smuzhiyun };
734*4882a593Smuzhiyun module_pcmcia_driver(pcan_driver);
735