1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/interrupt.h>
11*4882a593Smuzhiyun #include <linux/delay.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #include <linux/netdevice.h>
15*4882a593Smuzhiyun #include <linux/can.h>
16*4882a593Smuzhiyun #include <linux/can/dev.h>
17*4882a593Smuzhiyun #include <linux/can/skb.h>
18*4882a593Smuzhiyun #include <linux/can/error.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include <linux/mfd/janz.h>
21*4882a593Smuzhiyun #include <asm/io.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /* the DPM has 64k of memory, organized into 256x 256 byte pages */
24*4882a593Smuzhiyun #define DPM_NUM_PAGES 256
25*4882a593Smuzhiyun #define DPM_PAGE_SIZE 256
26*4882a593Smuzhiyun #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* JANZ ICAN3 "old-style" host interface queue page numbers */
29*4882a593Smuzhiyun #define QUEUE_OLD_CONTROL 0
30*4882a593Smuzhiyun #define QUEUE_OLD_RB0 1
31*4882a593Smuzhiyun #define QUEUE_OLD_RB1 2
32*4882a593Smuzhiyun #define QUEUE_OLD_WB0 3
33*4882a593Smuzhiyun #define QUEUE_OLD_WB1 4
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun /* Janz ICAN3 "old-style" host interface control registers */
36*4882a593Smuzhiyun #define MSYNC_PEER 0x00 /* ICAN only */
37*4882a593Smuzhiyun #define MSYNC_LOCL 0x01 /* host only */
38*4882a593Smuzhiyun #define TARGET_RUNNING 0x02
39*4882a593Smuzhiyun #define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun #define MSYNC_RB0 0x01
42*4882a593Smuzhiyun #define MSYNC_RB1 0x02
43*4882a593Smuzhiyun #define MSYNC_RBLW 0x04
44*4882a593Smuzhiyun #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun #define MSYNC_WB0 0x10
47*4882a593Smuzhiyun #define MSYNC_WB1 0x20
48*4882a593Smuzhiyun #define MSYNC_WBLW 0x40
49*4882a593Smuzhiyun #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun /* Janz ICAN3 "new-style" host interface queue page numbers */
52*4882a593Smuzhiyun #define QUEUE_TOHOST 5
53*4882a593Smuzhiyun #define QUEUE_FROMHOST_MID 6
54*4882a593Smuzhiyun #define QUEUE_FROMHOST_HIGH 7
55*4882a593Smuzhiyun #define QUEUE_FROMHOST_LOW 8
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun /* The first free page in the DPM is #9 */
58*4882a593Smuzhiyun #define DPM_FREE_START 9
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun /* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
61*4882a593Smuzhiyun #define DESC_VALID 0x80
62*4882a593Smuzhiyun #define DESC_WRAP 0x40
63*4882a593Smuzhiyun #define DESC_INTERRUPT 0x20
64*4882a593Smuzhiyun #define DESC_IVALID 0x10
65*4882a593Smuzhiyun #define DESC_LEN(len) (len)
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /* Janz ICAN3 Firmware Messages */
68*4882a593Smuzhiyun #define MSG_CONNECTI 0x02
69*4882a593Smuzhiyun #define MSG_DISCONNECT 0x03
70*4882a593Smuzhiyun #define MSG_IDVERS 0x04
71*4882a593Smuzhiyun #define MSG_MSGLOST 0x05
72*4882a593Smuzhiyun #define MSG_NEWHOSTIF 0x08
73*4882a593Smuzhiyun #define MSG_INQUIRY 0x0a
74*4882a593Smuzhiyun #define MSG_SETAFILMASK 0x10
75*4882a593Smuzhiyun #define MSG_INITFDPMQUEUE 0x11
76*4882a593Smuzhiyun #define MSG_HWCONF 0x12
77*4882a593Smuzhiyun #define MSG_FMSGLOST 0x15
78*4882a593Smuzhiyun #define MSG_CEVTIND 0x37
79*4882a593Smuzhiyun #define MSG_CBTRREQ 0x41
80*4882a593Smuzhiyun #define MSG_COFFREQ 0x42
81*4882a593Smuzhiyun #define MSG_CONREQ 0x43
82*4882a593Smuzhiyun #define MSG_CCONFREQ 0x47
83*4882a593Smuzhiyun #define MSG_NMTS 0xb0
84*4882a593Smuzhiyun #define MSG_LMTS 0xb4
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun * Janz ICAN3 CAN Inquiry Message Types
88*4882a593Smuzhiyun *
89*4882a593Smuzhiyun * NOTE: there appears to be a firmware bug here. You must send
90*4882a593Smuzhiyun * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
91*4882a593Smuzhiyun * NOTE: response. The controller never responds to a message with
92*4882a593Smuzhiyun * NOTE: the INQUIRY_EXTENDED subspec :(
93*4882a593Smuzhiyun */
94*4882a593Smuzhiyun #define INQUIRY_STATUS 0x00
95*4882a593Smuzhiyun #define INQUIRY_TERMINATION 0x01
96*4882a593Smuzhiyun #define INQUIRY_EXTENDED 0x04
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun /* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
99*4882a593Smuzhiyun #define SETAFILMASK_REJECT 0x00
100*4882a593Smuzhiyun #define SETAFILMASK_FASTIF 0x02
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun /* Janz ICAN3 CAN Hardware Configuration Message Types */
103*4882a593Smuzhiyun #define HWCONF_TERMINATE_ON 0x01
104*4882a593Smuzhiyun #define HWCONF_TERMINATE_OFF 0x00
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* Janz ICAN3 CAN Event Indication Message Types */
107*4882a593Smuzhiyun #define CEVTIND_EI 0x01
108*4882a593Smuzhiyun #define CEVTIND_DOI 0x02
109*4882a593Smuzhiyun #define CEVTIND_LOST 0x04
110*4882a593Smuzhiyun #define CEVTIND_FULL 0x08
111*4882a593Smuzhiyun #define CEVTIND_BEI 0x10
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun #define CEVTIND_CHIP_SJA1000 0x02
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun #define ICAN3_BUSERR_QUOTA_MAX 255
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /* Janz ICAN3 CAN Frame Conversion */
118*4882a593Smuzhiyun #define ICAN3_SNGL 0x02
119*4882a593Smuzhiyun #define ICAN3_ECHO 0x10
120*4882a593Smuzhiyun #define ICAN3_EFF_RTR 0x40
121*4882a593Smuzhiyun #define ICAN3_SFF_RTR 0x10
122*4882a593Smuzhiyun #define ICAN3_EFF 0x80
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun #define ICAN3_CAN_TYPE_MASK 0x0f
125*4882a593Smuzhiyun #define ICAN3_CAN_TYPE_SFF 0x00
126*4882a593Smuzhiyun #define ICAN3_CAN_TYPE_EFF 0x01
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun #define ICAN3_CAN_DLC_MASK 0x0f
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* Janz ICAN3 NMTS subtypes */
131*4882a593Smuzhiyun #define NMTS_CREATE_NODE_REQ 0x0
132*4882a593Smuzhiyun #define NMTS_SLAVE_STATE_IND 0x8
133*4882a593Smuzhiyun #define NMTS_SLAVE_EVENT_IND 0x9
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /* Janz ICAN3 LMTS subtypes */
136*4882a593Smuzhiyun #define LMTS_BUSON_REQ 0x0
137*4882a593Smuzhiyun #define LMTS_BUSOFF_REQ 0x1
138*4882a593Smuzhiyun #define LMTS_CAN_CONF_REQ 0x2
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* Janz ICAN3 NMTS Event indications */
141*4882a593Smuzhiyun #define NE_LOCAL_OCCURRED 0x3
142*4882a593Smuzhiyun #define NE_LOCAL_RESOLVED 0x2
143*4882a593Smuzhiyun #define NE_REMOTE_OCCURRED 0xc
144*4882a593Smuzhiyun #define NE_REMOTE_RESOLVED 0x8
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun * SJA1000 Status and Error Register Definitions
148*4882a593Smuzhiyun *
149*4882a593Smuzhiyun * Copied from drivers/net/can/sja1000/sja1000.h
150*4882a593Smuzhiyun */
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* status register content */
153*4882a593Smuzhiyun #define SR_BS 0x80
154*4882a593Smuzhiyun #define SR_ES 0x40
155*4882a593Smuzhiyun #define SR_TS 0x20
156*4882a593Smuzhiyun #define SR_RS 0x10
157*4882a593Smuzhiyun #define SR_TCS 0x08
158*4882a593Smuzhiyun #define SR_TBS 0x04
159*4882a593Smuzhiyun #define SR_DOS 0x02
160*4882a593Smuzhiyun #define SR_RBS 0x01
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun #define SR_CRIT (SR_BS|SR_ES)
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* ECC register */
165*4882a593Smuzhiyun #define ECC_SEG 0x1F
166*4882a593Smuzhiyun #define ECC_DIR 0x20
167*4882a593Smuzhiyun #define ECC_ERR 6
168*4882a593Smuzhiyun #define ECC_BIT 0x00
169*4882a593Smuzhiyun #define ECC_FORM 0x40
170*4882a593Smuzhiyun #define ECC_STUFF 0x80
171*4882a593Smuzhiyun #define ECC_MASK 0xc0
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* Number of buffers for use in the "new-style" host interface */
174*4882a593Smuzhiyun #define ICAN3_NEW_BUFFERS 16
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun /* Number of buffers for use in the "fast" host interface */
177*4882a593Smuzhiyun #define ICAN3_TX_BUFFERS 512
178*4882a593Smuzhiyun #define ICAN3_RX_BUFFERS 1024
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun /* SJA1000 Clock Input */
181*4882a593Smuzhiyun #define ICAN3_CAN_CLOCK 8000000
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* Janz ICAN3 firmware types */
184*4882a593Smuzhiyun enum ican3_fwtype {
185*4882a593Smuzhiyun ICAN3_FWTYPE_ICANOS,
186*4882a593Smuzhiyun ICAN3_FWTYPE_CAL_CANOPEN,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /* Driver Name */
190*4882a593Smuzhiyun #define DRV_NAME "janz-ican3"
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun /* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
193*4882a593Smuzhiyun struct ican3_dpm_control {
194*4882a593Smuzhiyun /* window address register */
195*4882a593Smuzhiyun u8 window_address;
196*4882a593Smuzhiyun u8 unused1;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun /*
199*4882a593Smuzhiyun * Read access: clear interrupt from microcontroller
200*4882a593Smuzhiyun * Write access: send interrupt to microcontroller
201*4882a593Smuzhiyun */
202*4882a593Smuzhiyun u8 interrupt;
203*4882a593Smuzhiyun u8 unused2;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun /* write-only: reset all hardware on the module */
206*4882a593Smuzhiyun u8 hwreset;
207*4882a593Smuzhiyun u8 unused3;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* write-only: generate an interrupt to the TPU */
210*4882a593Smuzhiyun u8 tpuinterrupt;
211*4882a593Smuzhiyun };
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun struct ican3_dev {
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun /* must be the first member */
216*4882a593Smuzhiyun struct can_priv can;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* CAN network device */
219*4882a593Smuzhiyun struct net_device *ndev;
220*4882a593Smuzhiyun struct napi_struct napi;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* module number */
223*4882a593Smuzhiyun unsigned int num;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun /* base address of registers and IRQ */
226*4882a593Smuzhiyun struct janz_cmodio_onboard_regs __iomem *ctrl;
227*4882a593Smuzhiyun struct ican3_dpm_control __iomem *dpmctrl;
228*4882a593Smuzhiyun void __iomem *dpm;
229*4882a593Smuzhiyun int irq;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /* CAN bus termination status */
232*4882a593Smuzhiyun struct completion termination_comp;
233*4882a593Smuzhiyun bool termination_enabled;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun /* CAN bus error status registers */
236*4882a593Smuzhiyun struct completion buserror_comp;
237*4882a593Smuzhiyun struct can_berr_counter bec;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun /* firmware type */
240*4882a593Smuzhiyun enum ican3_fwtype fwtype;
241*4882a593Smuzhiyun char fwinfo[32];
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun /* old and new style host interface */
244*4882a593Smuzhiyun unsigned int iftype;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun /* queue for echo packets */
247*4882a593Smuzhiyun struct sk_buff_head echoq;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun /*
250*4882a593Smuzhiyun * Any function which changes the current DPM page must hold this
251*4882a593Smuzhiyun * lock while it is performing data accesses. This ensures that the
252*4882a593Smuzhiyun * function will not be preempted and end up reading data from a
253*4882a593Smuzhiyun * different DPM page than it expects.
254*4882a593Smuzhiyun */
255*4882a593Smuzhiyun spinlock_t lock;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun /* new host interface */
258*4882a593Smuzhiyun unsigned int rx_int;
259*4882a593Smuzhiyun unsigned int rx_num;
260*4882a593Smuzhiyun unsigned int tx_num;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* fast host interface */
263*4882a593Smuzhiyun unsigned int fastrx_start;
264*4882a593Smuzhiyun unsigned int fastrx_num;
265*4882a593Smuzhiyun unsigned int fasttx_start;
266*4882a593Smuzhiyun unsigned int fasttx_num;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun /* first free DPM page */
269*4882a593Smuzhiyun unsigned int free_page;
270*4882a593Smuzhiyun };
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun struct ican3_msg {
273*4882a593Smuzhiyun u8 control;
274*4882a593Smuzhiyun u8 spec;
275*4882a593Smuzhiyun __le16 len;
276*4882a593Smuzhiyun u8 data[252];
277*4882a593Smuzhiyun };
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun struct ican3_new_desc {
280*4882a593Smuzhiyun u8 control;
281*4882a593Smuzhiyun u8 pointer;
282*4882a593Smuzhiyun };
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun struct ican3_fast_desc {
285*4882a593Smuzhiyun u8 control;
286*4882a593Smuzhiyun u8 command;
287*4882a593Smuzhiyun u8 data[14];
288*4882a593Smuzhiyun };
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun /* write to the window basic address register */
ican3_set_page(struct ican3_dev * mod,unsigned int page)291*4882a593Smuzhiyun static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun BUG_ON(page >= DPM_NUM_PAGES);
294*4882a593Smuzhiyun iowrite8(page, &mod->dpmctrl->window_address);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /*
298*4882a593Smuzhiyun * ICAN3 "old-style" host interface
299*4882a593Smuzhiyun */
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun /*
302*4882a593Smuzhiyun * Receive a message from the ICAN3 "old-style" firmware interface
303*4882a593Smuzhiyun *
304*4882a593Smuzhiyun * LOCKING: must hold mod->lock
305*4882a593Smuzhiyun *
306*4882a593Smuzhiyun * returns 0 on success, -ENOMEM when no message exists
307*4882a593Smuzhiyun */
ican3_old_recv_msg(struct ican3_dev * mod,struct ican3_msg * msg)308*4882a593Smuzhiyun static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun unsigned int mbox, mbox_page;
311*4882a593Smuzhiyun u8 locl, peer, xord;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun /* get the MSYNC registers */
314*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_OLD_CONTROL);
315*4882a593Smuzhiyun peer = ioread8(mod->dpm + MSYNC_PEER);
316*4882a593Smuzhiyun locl = ioread8(mod->dpm + MSYNC_LOCL);
317*4882a593Smuzhiyun xord = locl ^ peer;
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun if ((xord & MSYNC_RB_MASK) == 0x00) {
320*4882a593Smuzhiyun netdev_dbg(mod->ndev, "no mbox for reading\n");
321*4882a593Smuzhiyun return -ENOMEM;
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
324*4882a593Smuzhiyun /* find the first free mbox to read */
325*4882a593Smuzhiyun if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
326*4882a593Smuzhiyun mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
327*4882a593Smuzhiyun else
328*4882a593Smuzhiyun mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /* copy the message */
331*4882a593Smuzhiyun mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
332*4882a593Smuzhiyun ican3_set_page(mod, mbox_page);
333*4882a593Smuzhiyun memcpy_fromio(msg, mod->dpm, sizeof(*msg));
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun /*
336*4882a593Smuzhiyun * notify the firmware that the read buffer is available
337*4882a593Smuzhiyun * for it to fill again
338*4882a593Smuzhiyun */
339*4882a593Smuzhiyun locl ^= mbox;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_OLD_CONTROL);
342*4882a593Smuzhiyun iowrite8(locl, mod->dpm + MSYNC_LOCL);
343*4882a593Smuzhiyun return 0;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun /*
347*4882a593Smuzhiyun * Send a message through the "old-style" firmware interface
348*4882a593Smuzhiyun *
349*4882a593Smuzhiyun * LOCKING: must hold mod->lock
350*4882a593Smuzhiyun *
351*4882a593Smuzhiyun * returns 0 on success, -ENOMEM when no free space exists
352*4882a593Smuzhiyun */
ican3_old_send_msg(struct ican3_dev * mod,struct ican3_msg * msg)353*4882a593Smuzhiyun static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun unsigned int mbox, mbox_page;
356*4882a593Smuzhiyun u8 locl, peer, xord;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun /* get the MSYNC registers */
359*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_OLD_CONTROL);
360*4882a593Smuzhiyun peer = ioread8(mod->dpm + MSYNC_PEER);
361*4882a593Smuzhiyun locl = ioread8(mod->dpm + MSYNC_LOCL);
362*4882a593Smuzhiyun xord = locl ^ peer;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
365*4882a593Smuzhiyun netdev_err(mod->ndev, "no mbox for writing\n");
366*4882a593Smuzhiyun return -ENOMEM;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun /* calculate a free mbox to use */
370*4882a593Smuzhiyun mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun /* copy the message to the DPM */
373*4882a593Smuzhiyun mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
374*4882a593Smuzhiyun ican3_set_page(mod, mbox_page);
375*4882a593Smuzhiyun memcpy_toio(mod->dpm, msg, sizeof(*msg));
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun locl ^= mbox;
378*4882a593Smuzhiyun if (mbox == MSYNC_WB1)
379*4882a593Smuzhiyun locl |= MSYNC_WBLW;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_OLD_CONTROL);
382*4882a593Smuzhiyun iowrite8(locl, mod->dpm + MSYNC_LOCL);
383*4882a593Smuzhiyun return 0;
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /*
387*4882a593Smuzhiyun * ICAN3 "new-style" Host Interface Setup
388*4882a593Smuzhiyun */
389*4882a593Smuzhiyun
ican3_init_new_host_interface(struct ican3_dev * mod)390*4882a593Smuzhiyun static void ican3_init_new_host_interface(struct ican3_dev *mod)
391*4882a593Smuzhiyun {
392*4882a593Smuzhiyun struct ican3_new_desc desc;
393*4882a593Smuzhiyun unsigned long flags;
394*4882a593Smuzhiyun void __iomem *dst;
395*4882a593Smuzhiyun int i;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
398*4882a593Smuzhiyun
399*4882a593Smuzhiyun /* setup the internal datastructures for RX */
400*4882a593Smuzhiyun mod->rx_num = 0;
401*4882a593Smuzhiyun mod->rx_int = 0;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun /* tohost queue descriptors are in page 5 */
404*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_TOHOST);
405*4882a593Smuzhiyun dst = mod->dpm;
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun /* initialize the tohost (rx) queue descriptors: pages 9-24 */
408*4882a593Smuzhiyun for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
409*4882a593Smuzhiyun desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
410*4882a593Smuzhiyun desc.pointer = mod->free_page;
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /* set wrap flag on last buffer */
413*4882a593Smuzhiyun if (i == ICAN3_NEW_BUFFERS - 1)
414*4882a593Smuzhiyun desc.control |= DESC_WRAP;
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun memcpy_toio(dst, &desc, sizeof(desc));
417*4882a593Smuzhiyun dst += sizeof(desc);
418*4882a593Smuzhiyun mod->free_page++;
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun /* fromhost (tx) mid queue descriptors are in page 6 */
422*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_FROMHOST_MID);
423*4882a593Smuzhiyun dst = mod->dpm;
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun /* setup the internal datastructures for TX */
426*4882a593Smuzhiyun mod->tx_num = 0;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* initialize the fromhost mid queue descriptors: pages 25-40 */
429*4882a593Smuzhiyun for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
430*4882a593Smuzhiyun desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
431*4882a593Smuzhiyun desc.pointer = mod->free_page;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun /* set wrap flag on last buffer */
434*4882a593Smuzhiyun if (i == ICAN3_NEW_BUFFERS - 1)
435*4882a593Smuzhiyun desc.control |= DESC_WRAP;
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun memcpy_toio(dst, &desc, sizeof(desc));
438*4882a593Smuzhiyun dst += sizeof(desc);
439*4882a593Smuzhiyun mod->free_page++;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun /* fromhost hi queue descriptors are in page 7 */
443*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
444*4882a593Smuzhiyun dst = mod->dpm;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun /* initialize only a single buffer in the fromhost hi queue (unused) */
447*4882a593Smuzhiyun desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
448*4882a593Smuzhiyun desc.pointer = mod->free_page;
449*4882a593Smuzhiyun memcpy_toio(dst, &desc, sizeof(desc));
450*4882a593Smuzhiyun mod->free_page++;
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /* fromhost low queue descriptors are in page 8 */
453*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_FROMHOST_LOW);
454*4882a593Smuzhiyun dst = mod->dpm;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun /* initialize only a single buffer in the fromhost low queue (unused) */
457*4882a593Smuzhiyun desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
458*4882a593Smuzhiyun desc.pointer = mod->free_page;
459*4882a593Smuzhiyun memcpy_toio(dst, &desc, sizeof(desc));
460*4882a593Smuzhiyun mod->free_page++;
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun /*
466*4882a593Smuzhiyun * ICAN3 Fast Host Interface Setup
467*4882a593Smuzhiyun */
468*4882a593Smuzhiyun
ican3_init_fast_host_interface(struct ican3_dev * mod)469*4882a593Smuzhiyun static void ican3_init_fast_host_interface(struct ican3_dev *mod)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun struct ican3_fast_desc desc;
472*4882a593Smuzhiyun unsigned long flags;
473*4882a593Smuzhiyun unsigned int addr;
474*4882a593Smuzhiyun void __iomem *dst;
475*4882a593Smuzhiyun int i;
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun /* save the start recv page */
480*4882a593Smuzhiyun mod->fastrx_start = mod->free_page;
481*4882a593Smuzhiyun mod->fastrx_num = 0;
482*4882a593Smuzhiyun
483*4882a593Smuzhiyun /* build a single fast tohost queue descriptor */
484*4882a593Smuzhiyun memset(&desc, 0, sizeof(desc));
485*4882a593Smuzhiyun desc.control = 0x00;
486*4882a593Smuzhiyun desc.command = 1;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /* build the tohost queue descriptor ring in memory */
489*4882a593Smuzhiyun addr = 0;
490*4882a593Smuzhiyun for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun /* set the wrap bit on the last buffer */
493*4882a593Smuzhiyun if (i == ICAN3_RX_BUFFERS - 1)
494*4882a593Smuzhiyun desc.control |= DESC_WRAP;
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun /* switch to the correct page */
497*4882a593Smuzhiyun ican3_set_page(mod, mod->free_page);
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun /* copy the descriptor to the DPM */
500*4882a593Smuzhiyun dst = mod->dpm + addr;
501*4882a593Smuzhiyun memcpy_toio(dst, &desc, sizeof(desc));
502*4882a593Smuzhiyun addr += sizeof(desc);
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun /* move to the next page if necessary */
505*4882a593Smuzhiyun if (addr >= DPM_PAGE_SIZE) {
506*4882a593Smuzhiyun addr = 0;
507*4882a593Smuzhiyun mod->free_page++;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
511*4882a593Smuzhiyun /* make sure we page-align the next queue */
512*4882a593Smuzhiyun if (addr != 0)
513*4882a593Smuzhiyun mod->free_page++;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun /* save the start xmit page */
516*4882a593Smuzhiyun mod->fasttx_start = mod->free_page;
517*4882a593Smuzhiyun mod->fasttx_num = 0;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /* build a single fast fromhost queue descriptor */
520*4882a593Smuzhiyun memset(&desc, 0, sizeof(desc));
521*4882a593Smuzhiyun desc.control = DESC_VALID;
522*4882a593Smuzhiyun desc.command = 1;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun /* build the fromhost queue descriptor ring in memory */
525*4882a593Smuzhiyun addr = 0;
526*4882a593Smuzhiyun for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun /* set the wrap bit on the last buffer */
529*4882a593Smuzhiyun if (i == ICAN3_TX_BUFFERS - 1)
530*4882a593Smuzhiyun desc.control |= DESC_WRAP;
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* switch to the correct page */
533*4882a593Smuzhiyun ican3_set_page(mod, mod->free_page);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun /* copy the descriptor to the DPM */
536*4882a593Smuzhiyun dst = mod->dpm + addr;
537*4882a593Smuzhiyun memcpy_toio(dst, &desc, sizeof(desc));
538*4882a593Smuzhiyun addr += sizeof(desc);
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun /* move to the next page if necessary */
541*4882a593Smuzhiyun if (addr >= DPM_PAGE_SIZE) {
542*4882a593Smuzhiyun addr = 0;
543*4882a593Smuzhiyun mod->free_page++;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun /*
551*4882a593Smuzhiyun * ICAN3 "new-style" Host Interface Message Helpers
552*4882a593Smuzhiyun */
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun /*
555*4882a593Smuzhiyun * LOCKING: must hold mod->lock
556*4882a593Smuzhiyun */
ican3_new_send_msg(struct ican3_dev * mod,struct ican3_msg * msg)557*4882a593Smuzhiyun static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun struct ican3_new_desc desc;
560*4882a593Smuzhiyun void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
561*4882a593Smuzhiyun
562*4882a593Smuzhiyun /* switch to the fromhost mid queue, and read the buffer descriptor */
563*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_FROMHOST_MID);
564*4882a593Smuzhiyun memcpy_fromio(&desc, desc_addr, sizeof(desc));
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun if (!(desc.control & DESC_VALID)) {
567*4882a593Smuzhiyun netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
568*4882a593Smuzhiyun return -ENOMEM;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun /* switch to the data page, copy the data */
572*4882a593Smuzhiyun ican3_set_page(mod, desc.pointer);
573*4882a593Smuzhiyun memcpy_toio(mod->dpm, msg, sizeof(*msg));
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun /* switch back to the descriptor, set the valid bit, write it back */
576*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_FROMHOST_MID);
577*4882a593Smuzhiyun desc.control ^= DESC_VALID;
578*4882a593Smuzhiyun memcpy_toio(desc_addr, &desc, sizeof(desc));
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun /* update the tx number */
581*4882a593Smuzhiyun mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
582*4882a593Smuzhiyun return 0;
583*4882a593Smuzhiyun }
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun /*
586*4882a593Smuzhiyun * LOCKING: must hold mod->lock
587*4882a593Smuzhiyun */
ican3_new_recv_msg(struct ican3_dev * mod,struct ican3_msg * msg)588*4882a593Smuzhiyun static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun struct ican3_new_desc desc;
591*4882a593Smuzhiyun void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun /* switch to the tohost queue, and read the buffer descriptor */
594*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_TOHOST);
595*4882a593Smuzhiyun memcpy_fromio(&desc, desc_addr, sizeof(desc));
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun if (!(desc.control & DESC_VALID)) {
598*4882a593Smuzhiyun netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
599*4882a593Smuzhiyun return -ENOMEM;
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun /* switch to the data page, copy the data */
603*4882a593Smuzhiyun ican3_set_page(mod, desc.pointer);
604*4882a593Smuzhiyun memcpy_fromio(msg, mod->dpm, sizeof(*msg));
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun /* switch back to the descriptor, toggle the valid bit, write it back */
607*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_TOHOST);
608*4882a593Smuzhiyun desc.control ^= DESC_VALID;
609*4882a593Smuzhiyun memcpy_toio(desc_addr, &desc, sizeof(desc));
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun /* update the rx number */
612*4882a593Smuzhiyun mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
613*4882a593Smuzhiyun return 0;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun /*
617*4882a593Smuzhiyun * Message Send / Recv Helpers
618*4882a593Smuzhiyun */
619*4882a593Smuzhiyun
ican3_send_msg(struct ican3_dev * mod,struct ican3_msg * msg)620*4882a593Smuzhiyun static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
621*4882a593Smuzhiyun {
622*4882a593Smuzhiyun unsigned long flags;
623*4882a593Smuzhiyun int ret;
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun if (mod->iftype == 0)
628*4882a593Smuzhiyun ret = ican3_old_send_msg(mod, msg);
629*4882a593Smuzhiyun else
630*4882a593Smuzhiyun ret = ican3_new_send_msg(mod, msg);
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
633*4882a593Smuzhiyun return ret;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun
ican3_recv_msg(struct ican3_dev * mod,struct ican3_msg * msg)636*4882a593Smuzhiyun static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun unsigned long flags;
639*4882a593Smuzhiyun int ret;
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun if (mod->iftype == 0)
644*4882a593Smuzhiyun ret = ican3_old_recv_msg(mod, msg);
645*4882a593Smuzhiyun else
646*4882a593Smuzhiyun ret = ican3_new_recv_msg(mod, msg);
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
649*4882a593Smuzhiyun return ret;
650*4882a593Smuzhiyun }
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun /*
653*4882a593Smuzhiyun * Quick Pre-constructed Messages
654*4882a593Smuzhiyun */
655*4882a593Smuzhiyun
ican3_msg_connect(struct ican3_dev * mod)656*4882a593Smuzhiyun static int ican3_msg_connect(struct ican3_dev *mod)
657*4882a593Smuzhiyun {
658*4882a593Smuzhiyun struct ican3_msg msg;
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
661*4882a593Smuzhiyun msg.spec = MSG_CONNECTI;
662*4882a593Smuzhiyun msg.len = cpu_to_le16(0);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
ican3_msg_disconnect(struct ican3_dev * mod)667*4882a593Smuzhiyun static int ican3_msg_disconnect(struct ican3_dev *mod)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun struct ican3_msg msg;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
672*4882a593Smuzhiyun msg.spec = MSG_DISCONNECT;
673*4882a593Smuzhiyun msg.len = cpu_to_le16(0);
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun
ican3_msg_newhostif(struct ican3_dev * mod)678*4882a593Smuzhiyun static int ican3_msg_newhostif(struct ican3_dev *mod)
679*4882a593Smuzhiyun {
680*4882a593Smuzhiyun struct ican3_msg msg;
681*4882a593Smuzhiyun int ret;
682*4882a593Smuzhiyun
683*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
684*4882a593Smuzhiyun msg.spec = MSG_NEWHOSTIF;
685*4882a593Smuzhiyun msg.len = cpu_to_le16(0);
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun /* If we're not using the old interface, switching seems bogus */
688*4882a593Smuzhiyun WARN_ON(mod->iftype != 0);
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun ret = ican3_send_msg(mod, &msg);
691*4882a593Smuzhiyun if (ret)
692*4882a593Smuzhiyun return ret;
693*4882a593Smuzhiyun
694*4882a593Smuzhiyun /* mark the module as using the new host interface */
695*4882a593Smuzhiyun mod->iftype = 1;
696*4882a593Smuzhiyun return 0;
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun
ican3_msg_fasthostif(struct ican3_dev * mod)699*4882a593Smuzhiyun static int ican3_msg_fasthostif(struct ican3_dev *mod)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun struct ican3_msg msg;
702*4882a593Smuzhiyun unsigned int addr;
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
705*4882a593Smuzhiyun msg.spec = MSG_INITFDPMQUEUE;
706*4882a593Smuzhiyun msg.len = cpu_to_le16(8);
707*4882a593Smuzhiyun
708*4882a593Smuzhiyun /* write the tohost queue start address */
709*4882a593Smuzhiyun addr = DPM_PAGE_ADDR(mod->fastrx_start);
710*4882a593Smuzhiyun msg.data[0] = addr & 0xff;
711*4882a593Smuzhiyun msg.data[1] = (addr >> 8) & 0xff;
712*4882a593Smuzhiyun msg.data[2] = (addr >> 16) & 0xff;
713*4882a593Smuzhiyun msg.data[3] = (addr >> 24) & 0xff;
714*4882a593Smuzhiyun
715*4882a593Smuzhiyun /* write the fromhost queue start address */
716*4882a593Smuzhiyun addr = DPM_PAGE_ADDR(mod->fasttx_start);
717*4882a593Smuzhiyun msg.data[4] = addr & 0xff;
718*4882a593Smuzhiyun msg.data[5] = (addr >> 8) & 0xff;
719*4882a593Smuzhiyun msg.data[6] = (addr >> 16) & 0xff;
720*4882a593Smuzhiyun msg.data[7] = (addr >> 24) & 0xff;
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun /* If we're not using the new interface yet, we cannot do this */
723*4882a593Smuzhiyun WARN_ON(mod->iftype != 1);
724*4882a593Smuzhiyun
725*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
726*4882a593Smuzhiyun }
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun /*
729*4882a593Smuzhiyun * Setup the CAN filter to either accept or reject all
730*4882a593Smuzhiyun * messages from the CAN bus.
731*4882a593Smuzhiyun */
ican3_set_id_filter(struct ican3_dev * mod,bool accept)732*4882a593Smuzhiyun static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
733*4882a593Smuzhiyun {
734*4882a593Smuzhiyun struct ican3_msg msg;
735*4882a593Smuzhiyun int ret;
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun /* Standard Frame Format */
738*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
739*4882a593Smuzhiyun msg.spec = MSG_SETAFILMASK;
740*4882a593Smuzhiyun msg.len = cpu_to_le16(5);
741*4882a593Smuzhiyun msg.data[0] = 0x00; /* IDLo LSB */
742*4882a593Smuzhiyun msg.data[1] = 0x00; /* IDLo MSB */
743*4882a593Smuzhiyun msg.data[2] = 0xff; /* IDHi LSB */
744*4882a593Smuzhiyun msg.data[3] = 0x07; /* IDHi MSB */
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun /* accept all frames for fast host if, or reject all frames */
747*4882a593Smuzhiyun msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun ret = ican3_send_msg(mod, &msg);
750*4882a593Smuzhiyun if (ret)
751*4882a593Smuzhiyun return ret;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun /* Extended Frame Format */
754*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
755*4882a593Smuzhiyun msg.spec = MSG_SETAFILMASK;
756*4882a593Smuzhiyun msg.len = cpu_to_le16(13);
757*4882a593Smuzhiyun msg.data[0] = 0; /* MUX = 0 */
758*4882a593Smuzhiyun msg.data[1] = 0x00; /* IDLo LSB */
759*4882a593Smuzhiyun msg.data[2] = 0x00;
760*4882a593Smuzhiyun msg.data[3] = 0x00;
761*4882a593Smuzhiyun msg.data[4] = 0x20; /* IDLo MSB */
762*4882a593Smuzhiyun msg.data[5] = 0xff; /* IDHi LSB */
763*4882a593Smuzhiyun msg.data[6] = 0xff;
764*4882a593Smuzhiyun msg.data[7] = 0xff;
765*4882a593Smuzhiyun msg.data[8] = 0x3f; /* IDHi MSB */
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun /* accept all frames for fast host if, or reject all frames */
768*4882a593Smuzhiyun msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
771*4882a593Smuzhiyun }
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun /*
774*4882a593Smuzhiyun * Bring the CAN bus online or offline
775*4882a593Smuzhiyun */
ican3_set_bus_state(struct ican3_dev * mod,bool on)776*4882a593Smuzhiyun static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun struct can_bittiming *bt = &mod->can.bittiming;
779*4882a593Smuzhiyun struct ican3_msg msg;
780*4882a593Smuzhiyun u8 btr0, btr1;
781*4882a593Smuzhiyun int res;
782*4882a593Smuzhiyun
783*4882a593Smuzhiyun /* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */
784*4882a593Smuzhiyun /* The bittiming register command for the ICAN3 just sets the bit timing */
785*4882a593Smuzhiyun /* registers on the SJA1000 chip directly */
786*4882a593Smuzhiyun btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
787*4882a593Smuzhiyun btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
788*4882a593Smuzhiyun (((bt->phase_seg2 - 1) & 0x7) << 4);
789*4882a593Smuzhiyun if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
790*4882a593Smuzhiyun btr1 |= 0x80;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
793*4882a593Smuzhiyun if (on) {
794*4882a593Smuzhiyun /* set bittiming */
795*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
796*4882a593Smuzhiyun msg.spec = MSG_CBTRREQ;
797*4882a593Smuzhiyun msg.len = cpu_to_le16(4);
798*4882a593Smuzhiyun msg.data[0] = 0x00;
799*4882a593Smuzhiyun msg.data[1] = 0x00;
800*4882a593Smuzhiyun msg.data[2] = btr0;
801*4882a593Smuzhiyun msg.data[3] = btr1;
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun res = ican3_send_msg(mod, &msg);
804*4882a593Smuzhiyun if (res)
805*4882a593Smuzhiyun return res;
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun
808*4882a593Smuzhiyun /* can-on/off request */
809*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
810*4882a593Smuzhiyun msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
811*4882a593Smuzhiyun msg.len = cpu_to_le16(0);
812*4882a593Smuzhiyun
813*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
814*4882a593Smuzhiyun
815*4882a593Smuzhiyun } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
816*4882a593Smuzhiyun /* bittiming + can-on/off request */
817*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
818*4882a593Smuzhiyun msg.spec = MSG_LMTS;
819*4882a593Smuzhiyun if (on) {
820*4882a593Smuzhiyun msg.len = cpu_to_le16(4);
821*4882a593Smuzhiyun msg.data[0] = LMTS_BUSON_REQ;
822*4882a593Smuzhiyun msg.data[1] = 0;
823*4882a593Smuzhiyun msg.data[2] = btr0;
824*4882a593Smuzhiyun msg.data[3] = btr1;
825*4882a593Smuzhiyun } else {
826*4882a593Smuzhiyun msg.len = cpu_to_le16(2);
827*4882a593Smuzhiyun msg.data[0] = LMTS_BUSOFF_REQ;
828*4882a593Smuzhiyun msg.data[1] = 0;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun res = ican3_send_msg(mod, &msg);
831*4882a593Smuzhiyun if (res)
832*4882a593Smuzhiyun return res;
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun if (on) {
835*4882a593Smuzhiyun /* create NMT Slave Node for error processing
836*4882a593Smuzhiyun * class 2 (with error capability, see CiA/DS203-1)
837*4882a593Smuzhiyun * id 1
838*4882a593Smuzhiyun * name locnod1 (must be exactly 7 bytes)
839*4882a593Smuzhiyun */
840*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
841*4882a593Smuzhiyun msg.spec = MSG_NMTS;
842*4882a593Smuzhiyun msg.len = cpu_to_le16(11);
843*4882a593Smuzhiyun msg.data[0] = NMTS_CREATE_NODE_REQ;
844*4882a593Smuzhiyun msg.data[1] = 0;
845*4882a593Smuzhiyun msg.data[2] = 2; /* node class */
846*4882a593Smuzhiyun msg.data[3] = 1; /* node id */
847*4882a593Smuzhiyun strcpy(msg.data + 4, "locnod1"); /* node name */
848*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
849*4882a593Smuzhiyun }
850*4882a593Smuzhiyun return 0;
851*4882a593Smuzhiyun }
852*4882a593Smuzhiyun return -ENOTSUPP;
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun
ican3_set_termination(struct ican3_dev * mod,bool on)855*4882a593Smuzhiyun static int ican3_set_termination(struct ican3_dev *mod, bool on)
856*4882a593Smuzhiyun {
857*4882a593Smuzhiyun struct ican3_msg msg;
858*4882a593Smuzhiyun
859*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
860*4882a593Smuzhiyun msg.spec = MSG_HWCONF;
861*4882a593Smuzhiyun msg.len = cpu_to_le16(2);
862*4882a593Smuzhiyun msg.data[0] = 0x00;
863*4882a593Smuzhiyun msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
864*4882a593Smuzhiyun
865*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
866*4882a593Smuzhiyun }
867*4882a593Smuzhiyun
ican3_send_inquiry(struct ican3_dev * mod,u8 subspec)868*4882a593Smuzhiyun static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
869*4882a593Smuzhiyun {
870*4882a593Smuzhiyun struct ican3_msg msg;
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
873*4882a593Smuzhiyun msg.spec = MSG_INQUIRY;
874*4882a593Smuzhiyun msg.len = cpu_to_le16(2);
875*4882a593Smuzhiyun msg.data[0] = subspec;
876*4882a593Smuzhiyun msg.data[1] = 0x00;
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
ican3_set_buserror(struct ican3_dev * mod,u8 quota)881*4882a593Smuzhiyun static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
882*4882a593Smuzhiyun {
883*4882a593Smuzhiyun struct ican3_msg msg;
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
886*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
887*4882a593Smuzhiyun msg.spec = MSG_CCONFREQ;
888*4882a593Smuzhiyun msg.len = cpu_to_le16(2);
889*4882a593Smuzhiyun msg.data[0] = 0x00;
890*4882a593Smuzhiyun msg.data[1] = quota;
891*4882a593Smuzhiyun } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
892*4882a593Smuzhiyun memset(&msg, 0, sizeof(msg));
893*4882a593Smuzhiyun msg.spec = MSG_LMTS;
894*4882a593Smuzhiyun msg.len = cpu_to_le16(4);
895*4882a593Smuzhiyun msg.data[0] = LMTS_CAN_CONF_REQ;
896*4882a593Smuzhiyun msg.data[1] = 0x00;
897*4882a593Smuzhiyun msg.data[2] = 0x00;
898*4882a593Smuzhiyun msg.data[3] = quota;
899*4882a593Smuzhiyun } else {
900*4882a593Smuzhiyun return -ENOTSUPP;
901*4882a593Smuzhiyun }
902*4882a593Smuzhiyun return ican3_send_msg(mod, &msg);
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun /*
906*4882a593Smuzhiyun * ICAN3 to Linux CAN Frame Conversion
907*4882a593Smuzhiyun */
908*4882a593Smuzhiyun
ican3_to_can_frame(struct ican3_dev * mod,struct ican3_fast_desc * desc,struct can_frame * cf)909*4882a593Smuzhiyun static void ican3_to_can_frame(struct ican3_dev *mod,
910*4882a593Smuzhiyun struct ican3_fast_desc *desc,
911*4882a593Smuzhiyun struct can_frame *cf)
912*4882a593Smuzhiyun {
913*4882a593Smuzhiyun if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
914*4882a593Smuzhiyun if (desc->data[1] & ICAN3_SFF_RTR)
915*4882a593Smuzhiyun cf->can_id |= CAN_RTR_FLAG;
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun cf->can_id |= desc->data[0] << 3;
918*4882a593Smuzhiyun cf->can_id |= (desc->data[1] & 0xe0) >> 5;
919*4882a593Smuzhiyun cf->can_dlc = get_can_dlc(desc->data[1] & ICAN3_CAN_DLC_MASK);
920*4882a593Smuzhiyun memcpy(cf->data, &desc->data[2], cf->can_dlc);
921*4882a593Smuzhiyun } else {
922*4882a593Smuzhiyun cf->can_dlc = get_can_dlc(desc->data[0] & ICAN3_CAN_DLC_MASK);
923*4882a593Smuzhiyun if (desc->data[0] & ICAN3_EFF_RTR)
924*4882a593Smuzhiyun cf->can_id |= CAN_RTR_FLAG;
925*4882a593Smuzhiyun
926*4882a593Smuzhiyun if (desc->data[0] & ICAN3_EFF) {
927*4882a593Smuzhiyun cf->can_id |= CAN_EFF_FLAG;
928*4882a593Smuzhiyun cf->can_id |= desc->data[2] << 21; /* 28-21 */
929*4882a593Smuzhiyun cf->can_id |= desc->data[3] << 13; /* 20-13 */
930*4882a593Smuzhiyun cf->can_id |= desc->data[4] << 5; /* 12-5 */
931*4882a593Smuzhiyun cf->can_id |= (desc->data[5] & 0xf8) >> 3;
932*4882a593Smuzhiyun } else {
933*4882a593Smuzhiyun cf->can_id |= desc->data[2] << 3; /* 10-3 */
934*4882a593Smuzhiyun cf->can_id |= desc->data[3] >> 5; /* 2-0 */
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun memcpy(cf->data, &desc->data[6], cf->can_dlc);
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun }
940*4882a593Smuzhiyun
can_frame_to_ican3(struct ican3_dev * mod,struct can_frame * cf,struct ican3_fast_desc * desc)941*4882a593Smuzhiyun static void can_frame_to_ican3(struct ican3_dev *mod,
942*4882a593Smuzhiyun struct can_frame *cf,
943*4882a593Smuzhiyun struct ican3_fast_desc *desc)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun /* clear out any stale data in the descriptor */
946*4882a593Smuzhiyun memset(desc->data, 0, sizeof(desc->data));
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun /* we always use the extended format, with the ECHO flag set */
949*4882a593Smuzhiyun desc->command = ICAN3_CAN_TYPE_EFF;
950*4882a593Smuzhiyun desc->data[0] |= cf->can_dlc;
951*4882a593Smuzhiyun desc->data[1] |= ICAN3_ECHO;
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun /* support single transmission (no retries) mode */
954*4882a593Smuzhiyun if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
955*4882a593Smuzhiyun desc->data[1] |= ICAN3_SNGL;
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun if (cf->can_id & CAN_RTR_FLAG)
958*4882a593Smuzhiyun desc->data[0] |= ICAN3_EFF_RTR;
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun /* pack the id into the correct places */
961*4882a593Smuzhiyun if (cf->can_id & CAN_EFF_FLAG) {
962*4882a593Smuzhiyun desc->data[0] |= ICAN3_EFF;
963*4882a593Smuzhiyun desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
964*4882a593Smuzhiyun desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
965*4882a593Smuzhiyun desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
966*4882a593Smuzhiyun desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
967*4882a593Smuzhiyun } else {
968*4882a593Smuzhiyun desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
969*4882a593Smuzhiyun desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun /* copy the data bits into the descriptor */
973*4882a593Smuzhiyun memcpy(&desc->data[6], cf->data, cf->can_dlc);
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun /*
977*4882a593Smuzhiyun * Interrupt Handling
978*4882a593Smuzhiyun */
979*4882a593Smuzhiyun
980*4882a593Smuzhiyun /*
981*4882a593Smuzhiyun * Handle an ID + Version message response from the firmware. We never generate
982*4882a593Smuzhiyun * this message in production code, but it is very useful when debugging to be
983*4882a593Smuzhiyun * able to display this message.
984*4882a593Smuzhiyun */
ican3_handle_idvers(struct ican3_dev * mod,struct ican3_msg * msg)985*4882a593Smuzhiyun static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun
ican3_handle_msglost(struct ican3_dev * mod,struct ican3_msg * msg)990*4882a593Smuzhiyun static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
991*4882a593Smuzhiyun {
992*4882a593Smuzhiyun struct net_device *dev = mod->ndev;
993*4882a593Smuzhiyun struct net_device_stats *stats = &dev->stats;
994*4882a593Smuzhiyun struct can_frame *cf;
995*4882a593Smuzhiyun struct sk_buff *skb;
996*4882a593Smuzhiyun
997*4882a593Smuzhiyun /*
998*4882a593Smuzhiyun * Report that communication messages with the microcontroller firmware
999*4882a593Smuzhiyun * are being lost. These are never CAN frames, so we do not generate an
1000*4882a593Smuzhiyun * error frame for userspace
1001*4882a593Smuzhiyun */
1002*4882a593Smuzhiyun if (msg->spec == MSG_MSGLOST) {
1003*4882a593Smuzhiyun netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
1004*4882a593Smuzhiyun return;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun
1007*4882a593Smuzhiyun /*
1008*4882a593Smuzhiyun * Oops, this indicates that we have lost messages in the fast queue,
1009*4882a593Smuzhiyun * which are exclusively CAN messages. Our driver isn't reading CAN
1010*4882a593Smuzhiyun * frames fast enough.
1011*4882a593Smuzhiyun *
1012*4882a593Smuzhiyun * We'll pretend that the SJA1000 told us that it ran out of buffer
1013*4882a593Smuzhiyun * space, because there is not a better message for this.
1014*4882a593Smuzhiyun */
1015*4882a593Smuzhiyun skb = alloc_can_err_skb(dev, &cf);
1016*4882a593Smuzhiyun if (skb) {
1017*4882a593Smuzhiyun cf->can_id |= CAN_ERR_CRTL;
1018*4882a593Smuzhiyun cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1019*4882a593Smuzhiyun stats->rx_over_errors++;
1020*4882a593Smuzhiyun stats->rx_errors++;
1021*4882a593Smuzhiyun netif_rx(skb);
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun }
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun /*
1026*4882a593Smuzhiyun * Handle CAN Event Indication Messages from the firmware
1027*4882a593Smuzhiyun *
1028*4882a593Smuzhiyun * The ICAN3 firmware provides the values of some SJA1000 registers when it
1029*4882a593Smuzhiyun * generates this message. The code below is largely copied from the
1030*4882a593Smuzhiyun * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
1031*4882a593Smuzhiyun */
ican3_handle_cevtind(struct ican3_dev * mod,struct ican3_msg * msg)1032*4882a593Smuzhiyun static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
1033*4882a593Smuzhiyun {
1034*4882a593Smuzhiyun struct net_device *dev = mod->ndev;
1035*4882a593Smuzhiyun struct net_device_stats *stats = &dev->stats;
1036*4882a593Smuzhiyun enum can_state state = mod->can.state;
1037*4882a593Smuzhiyun u8 isrc, ecc, status, rxerr, txerr;
1038*4882a593Smuzhiyun struct can_frame *cf;
1039*4882a593Smuzhiyun struct sk_buff *skb;
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun /* we can only handle the SJA1000 part */
1042*4882a593Smuzhiyun if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
1043*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
1044*4882a593Smuzhiyun return -ENODEV;
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun /* check the message length for sanity */
1048*4882a593Smuzhiyun if (le16_to_cpu(msg->len) < 6) {
1049*4882a593Smuzhiyun netdev_err(mod->ndev, "error message too short\n");
1050*4882a593Smuzhiyun return -EINVAL;
1051*4882a593Smuzhiyun }
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun isrc = msg->data[0];
1054*4882a593Smuzhiyun ecc = msg->data[2];
1055*4882a593Smuzhiyun status = msg->data[3];
1056*4882a593Smuzhiyun rxerr = msg->data[4];
1057*4882a593Smuzhiyun txerr = msg->data[5];
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun /*
1060*4882a593Smuzhiyun * This hardware lacks any support other than bus error messages to
1061*4882a593Smuzhiyun * determine if packet transmission has failed.
1062*4882a593Smuzhiyun *
1063*4882a593Smuzhiyun * When TX errors happen, one echo skb needs to be dropped from the
1064*4882a593Smuzhiyun * front of the queue.
1065*4882a593Smuzhiyun *
1066*4882a593Smuzhiyun * A small bit of code is duplicated here and below, to avoid error
1067*4882a593Smuzhiyun * skb allocation when it will just be freed immediately.
1068*4882a593Smuzhiyun */
1069*4882a593Smuzhiyun if (isrc == CEVTIND_BEI) {
1070*4882a593Smuzhiyun int ret;
1071*4882a593Smuzhiyun netdev_dbg(mod->ndev, "bus error interrupt\n");
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun /* TX error */
1074*4882a593Smuzhiyun if (!(ecc & ECC_DIR)) {
1075*4882a593Smuzhiyun kfree_skb(skb_dequeue(&mod->echoq));
1076*4882a593Smuzhiyun stats->tx_errors++;
1077*4882a593Smuzhiyun } else {
1078*4882a593Smuzhiyun stats->rx_errors++;
1079*4882a593Smuzhiyun }
1080*4882a593Smuzhiyun
1081*4882a593Smuzhiyun /*
1082*4882a593Smuzhiyun * The controller automatically disables bus-error interrupts
1083*4882a593Smuzhiyun * and therefore we must re-enable them.
1084*4882a593Smuzhiyun */
1085*4882a593Smuzhiyun ret = ican3_set_buserror(mod, 1);
1086*4882a593Smuzhiyun if (ret) {
1087*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to re-enable bus-error\n");
1088*4882a593Smuzhiyun return ret;
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun /* bus error reporting is off, return immediately */
1092*4882a593Smuzhiyun if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
1093*4882a593Smuzhiyun return 0;
1094*4882a593Smuzhiyun }
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun skb = alloc_can_err_skb(dev, &cf);
1097*4882a593Smuzhiyun if (skb == NULL)
1098*4882a593Smuzhiyun return -ENOMEM;
1099*4882a593Smuzhiyun
1100*4882a593Smuzhiyun /* data overrun interrupt */
1101*4882a593Smuzhiyun if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1102*4882a593Smuzhiyun netdev_dbg(mod->ndev, "data overrun interrupt\n");
1103*4882a593Smuzhiyun cf->can_id |= CAN_ERR_CRTL;
1104*4882a593Smuzhiyun cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1105*4882a593Smuzhiyun stats->rx_over_errors++;
1106*4882a593Smuzhiyun stats->rx_errors++;
1107*4882a593Smuzhiyun }
1108*4882a593Smuzhiyun
1109*4882a593Smuzhiyun /* error warning + passive interrupt */
1110*4882a593Smuzhiyun if (isrc == CEVTIND_EI) {
1111*4882a593Smuzhiyun netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
1112*4882a593Smuzhiyun if (status & SR_BS) {
1113*4882a593Smuzhiyun state = CAN_STATE_BUS_OFF;
1114*4882a593Smuzhiyun cf->can_id |= CAN_ERR_BUSOFF;
1115*4882a593Smuzhiyun mod->can.can_stats.bus_off++;
1116*4882a593Smuzhiyun can_bus_off(dev);
1117*4882a593Smuzhiyun } else if (status & SR_ES) {
1118*4882a593Smuzhiyun if (rxerr >= 128 || txerr >= 128)
1119*4882a593Smuzhiyun state = CAN_STATE_ERROR_PASSIVE;
1120*4882a593Smuzhiyun else
1121*4882a593Smuzhiyun state = CAN_STATE_ERROR_WARNING;
1122*4882a593Smuzhiyun } else {
1123*4882a593Smuzhiyun state = CAN_STATE_ERROR_ACTIVE;
1124*4882a593Smuzhiyun }
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun /* bus error interrupt */
1128*4882a593Smuzhiyun if (isrc == CEVTIND_BEI) {
1129*4882a593Smuzhiyun mod->can.can_stats.bus_error++;
1130*4882a593Smuzhiyun cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
1131*4882a593Smuzhiyun
1132*4882a593Smuzhiyun switch (ecc & ECC_MASK) {
1133*4882a593Smuzhiyun case ECC_BIT:
1134*4882a593Smuzhiyun cf->data[2] |= CAN_ERR_PROT_BIT;
1135*4882a593Smuzhiyun break;
1136*4882a593Smuzhiyun case ECC_FORM:
1137*4882a593Smuzhiyun cf->data[2] |= CAN_ERR_PROT_FORM;
1138*4882a593Smuzhiyun break;
1139*4882a593Smuzhiyun case ECC_STUFF:
1140*4882a593Smuzhiyun cf->data[2] |= CAN_ERR_PROT_STUFF;
1141*4882a593Smuzhiyun break;
1142*4882a593Smuzhiyun default:
1143*4882a593Smuzhiyun cf->data[3] = ecc & ECC_SEG;
1144*4882a593Smuzhiyun break;
1145*4882a593Smuzhiyun }
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun if (!(ecc & ECC_DIR))
1148*4882a593Smuzhiyun cf->data[2] |= CAN_ERR_PROT_TX;
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun cf->data[6] = txerr;
1151*4882a593Smuzhiyun cf->data[7] = rxerr;
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun
1154*4882a593Smuzhiyun if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1155*4882a593Smuzhiyun state == CAN_STATE_ERROR_PASSIVE)) {
1156*4882a593Smuzhiyun cf->can_id |= CAN_ERR_CRTL;
1157*4882a593Smuzhiyun if (state == CAN_STATE_ERROR_WARNING) {
1158*4882a593Smuzhiyun mod->can.can_stats.error_warning++;
1159*4882a593Smuzhiyun cf->data[1] = (txerr > rxerr) ?
1160*4882a593Smuzhiyun CAN_ERR_CRTL_TX_WARNING :
1161*4882a593Smuzhiyun CAN_ERR_CRTL_RX_WARNING;
1162*4882a593Smuzhiyun } else {
1163*4882a593Smuzhiyun mod->can.can_stats.error_passive++;
1164*4882a593Smuzhiyun cf->data[1] = (txerr > rxerr) ?
1165*4882a593Smuzhiyun CAN_ERR_CRTL_TX_PASSIVE :
1166*4882a593Smuzhiyun CAN_ERR_CRTL_RX_PASSIVE;
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun cf->data[6] = txerr;
1170*4882a593Smuzhiyun cf->data[7] = rxerr;
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun mod->can.state = state;
1174*4882a593Smuzhiyun netif_rx(skb);
1175*4882a593Smuzhiyun return 0;
1176*4882a593Smuzhiyun }
1177*4882a593Smuzhiyun
ican3_handle_inquiry(struct ican3_dev * mod,struct ican3_msg * msg)1178*4882a593Smuzhiyun static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1179*4882a593Smuzhiyun {
1180*4882a593Smuzhiyun switch (msg->data[0]) {
1181*4882a593Smuzhiyun case INQUIRY_STATUS:
1182*4882a593Smuzhiyun case INQUIRY_EXTENDED:
1183*4882a593Smuzhiyun mod->bec.rxerr = msg->data[5];
1184*4882a593Smuzhiyun mod->bec.txerr = msg->data[6];
1185*4882a593Smuzhiyun complete(&mod->buserror_comp);
1186*4882a593Smuzhiyun break;
1187*4882a593Smuzhiyun case INQUIRY_TERMINATION:
1188*4882a593Smuzhiyun mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1189*4882a593Smuzhiyun complete(&mod->termination_comp);
1190*4882a593Smuzhiyun break;
1191*4882a593Smuzhiyun default:
1192*4882a593Smuzhiyun netdev_err(mod->ndev, "received an unknown inquiry response\n");
1193*4882a593Smuzhiyun break;
1194*4882a593Smuzhiyun }
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun /* Handle NMTS Slave Event Indication Messages from the firmware */
ican3_handle_nmtsind(struct ican3_dev * mod,struct ican3_msg * msg)1198*4882a593Smuzhiyun static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
1199*4882a593Smuzhiyun {
1200*4882a593Smuzhiyun u16 subspec;
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun subspec = msg->data[0] + msg->data[1] * 0x100;
1203*4882a593Smuzhiyun if (subspec == NMTS_SLAVE_EVENT_IND) {
1204*4882a593Smuzhiyun switch (msg->data[2]) {
1205*4882a593Smuzhiyun case NE_LOCAL_OCCURRED:
1206*4882a593Smuzhiyun case NE_LOCAL_RESOLVED:
1207*4882a593Smuzhiyun /* now follows the same message as Raw ICANOS CEVTIND
1208*4882a593Smuzhiyun * shift the data at the same place and call this method
1209*4882a593Smuzhiyun */
1210*4882a593Smuzhiyun le16_add_cpu(&msg->len, -3);
1211*4882a593Smuzhiyun memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
1212*4882a593Smuzhiyun ican3_handle_cevtind(mod, msg);
1213*4882a593Smuzhiyun break;
1214*4882a593Smuzhiyun case NE_REMOTE_OCCURRED:
1215*4882a593Smuzhiyun case NE_REMOTE_RESOLVED:
1216*4882a593Smuzhiyun /* should not occurre, ignore */
1217*4882a593Smuzhiyun break;
1218*4882a593Smuzhiyun default:
1219*4882a593Smuzhiyun netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
1220*4882a593Smuzhiyun msg->data[2]);
1221*4882a593Smuzhiyun break;
1222*4882a593Smuzhiyun }
1223*4882a593Smuzhiyun } else if (subspec == NMTS_SLAVE_STATE_IND) {
1224*4882a593Smuzhiyun /* ignore state indications */
1225*4882a593Smuzhiyun } else {
1226*4882a593Smuzhiyun netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
1227*4882a593Smuzhiyun subspec);
1228*4882a593Smuzhiyun return;
1229*4882a593Smuzhiyun }
1230*4882a593Smuzhiyun }
1231*4882a593Smuzhiyun
ican3_handle_unknown_message(struct ican3_dev * mod,struct ican3_msg * msg)1232*4882a593Smuzhiyun static void ican3_handle_unknown_message(struct ican3_dev *mod,
1233*4882a593Smuzhiyun struct ican3_msg *msg)
1234*4882a593Smuzhiyun {
1235*4882a593Smuzhiyun netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
1236*4882a593Smuzhiyun msg->spec, le16_to_cpu(msg->len));
1237*4882a593Smuzhiyun }
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun /*
1240*4882a593Smuzhiyun * Handle a control message from the firmware
1241*4882a593Smuzhiyun */
ican3_handle_message(struct ican3_dev * mod,struct ican3_msg * msg)1242*4882a593Smuzhiyun static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1243*4882a593Smuzhiyun {
1244*4882a593Smuzhiyun netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1245*4882a593Smuzhiyun mod->num, msg->spec, le16_to_cpu(msg->len));
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun switch (msg->spec) {
1248*4882a593Smuzhiyun case MSG_IDVERS:
1249*4882a593Smuzhiyun ican3_handle_idvers(mod, msg);
1250*4882a593Smuzhiyun break;
1251*4882a593Smuzhiyun case MSG_MSGLOST:
1252*4882a593Smuzhiyun case MSG_FMSGLOST:
1253*4882a593Smuzhiyun ican3_handle_msglost(mod, msg);
1254*4882a593Smuzhiyun break;
1255*4882a593Smuzhiyun case MSG_CEVTIND:
1256*4882a593Smuzhiyun ican3_handle_cevtind(mod, msg);
1257*4882a593Smuzhiyun break;
1258*4882a593Smuzhiyun case MSG_INQUIRY:
1259*4882a593Smuzhiyun ican3_handle_inquiry(mod, msg);
1260*4882a593Smuzhiyun break;
1261*4882a593Smuzhiyun case MSG_NMTS:
1262*4882a593Smuzhiyun ican3_handle_nmtsind(mod, msg);
1263*4882a593Smuzhiyun break;
1264*4882a593Smuzhiyun default:
1265*4882a593Smuzhiyun ican3_handle_unknown_message(mod, msg);
1266*4882a593Smuzhiyun break;
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun }
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun /*
1271*4882a593Smuzhiyun * The ican3 needs to store all echo skbs, and therefore cannot
1272*4882a593Smuzhiyun * use the generic infrastructure for this.
1273*4882a593Smuzhiyun */
ican3_put_echo_skb(struct ican3_dev * mod,struct sk_buff * skb)1274*4882a593Smuzhiyun static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1275*4882a593Smuzhiyun {
1276*4882a593Smuzhiyun skb = can_create_echo_skb(skb);
1277*4882a593Smuzhiyun if (!skb)
1278*4882a593Smuzhiyun return;
1279*4882a593Smuzhiyun
1280*4882a593Smuzhiyun /* save this skb for tx interrupt echo handling */
1281*4882a593Smuzhiyun skb_queue_tail(&mod->echoq, skb);
1282*4882a593Smuzhiyun }
1283*4882a593Smuzhiyun
ican3_get_echo_skb(struct ican3_dev * mod)1284*4882a593Smuzhiyun static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1285*4882a593Smuzhiyun {
1286*4882a593Smuzhiyun struct sk_buff *skb = skb_dequeue(&mod->echoq);
1287*4882a593Smuzhiyun struct can_frame *cf;
1288*4882a593Smuzhiyun u8 dlc;
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun /* this should never trigger unless there is a driver bug */
1291*4882a593Smuzhiyun if (!skb) {
1292*4882a593Smuzhiyun netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1293*4882a593Smuzhiyun return 0;
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun
1296*4882a593Smuzhiyun cf = (struct can_frame *)skb->data;
1297*4882a593Smuzhiyun dlc = cf->can_dlc;
1298*4882a593Smuzhiyun
1299*4882a593Smuzhiyun /* check flag whether this packet has to be looped back */
1300*4882a593Smuzhiyun if (skb->pkt_type != PACKET_LOOPBACK) {
1301*4882a593Smuzhiyun kfree_skb(skb);
1302*4882a593Smuzhiyun return dlc;
1303*4882a593Smuzhiyun }
1304*4882a593Smuzhiyun
1305*4882a593Smuzhiyun skb->protocol = htons(ETH_P_CAN);
1306*4882a593Smuzhiyun skb->pkt_type = PACKET_BROADCAST;
1307*4882a593Smuzhiyun skb->ip_summed = CHECKSUM_UNNECESSARY;
1308*4882a593Smuzhiyun skb->dev = mod->ndev;
1309*4882a593Smuzhiyun netif_receive_skb(skb);
1310*4882a593Smuzhiyun return dlc;
1311*4882a593Smuzhiyun }
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun /*
1314*4882a593Smuzhiyun * Compare an skb with an existing echo skb
1315*4882a593Smuzhiyun *
1316*4882a593Smuzhiyun * This function will be used on devices which have a hardware loopback.
1317*4882a593Smuzhiyun * On these devices, this function can be used to compare a received skb
1318*4882a593Smuzhiyun * with the saved echo skbs so that the hardware echo skb can be dropped.
1319*4882a593Smuzhiyun *
1320*4882a593Smuzhiyun * Returns true if the skb's are identical, false otherwise.
1321*4882a593Smuzhiyun */
ican3_echo_skb_matches(struct ican3_dev * mod,struct sk_buff * skb)1322*4882a593Smuzhiyun static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun struct can_frame *cf = (struct can_frame *)skb->data;
1325*4882a593Smuzhiyun struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1326*4882a593Smuzhiyun struct can_frame *echo_cf;
1327*4882a593Smuzhiyun
1328*4882a593Smuzhiyun if (!echo_skb)
1329*4882a593Smuzhiyun return false;
1330*4882a593Smuzhiyun
1331*4882a593Smuzhiyun echo_cf = (struct can_frame *)echo_skb->data;
1332*4882a593Smuzhiyun if (cf->can_id != echo_cf->can_id)
1333*4882a593Smuzhiyun return false;
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun if (cf->can_dlc != echo_cf->can_dlc)
1336*4882a593Smuzhiyun return false;
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun return memcmp(cf->data, echo_cf->data, cf->can_dlc) == 0;
1339*4882a593Smuzhiyun }
1340*4882a593Smuzhiyun
1341*4882a593Smuzhiyun /*
1342*4882a593Smuzhiyun * Check that there is room in the TX ring to transmit another skb
1343*4882a593Smuzhiyun *
1344*4882a593Smuzhiyun * LOCKING: must hold mod->lock
1345*4882a593Smuzhiyun */
ican3_txok(struct ican3_dev * mod)1346*4882a593Smuzhiyun static bool ican3_txok(struct ican3_dev *mod)
1347*4882a593Smuzhiyun {
1348*4882a593Smuzhiyun struct ican3_fast_desc __iomem *desc;
1349*4882a593Smuzhiyun u8 control;
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun /* check that we have echo queue space */
1352*4882a593Smuzhiyun if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1353*4882a593Smuzhiyun return false;
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun /* copy the control bits of the descriptor */
1356*4882a593Smuzhiyun ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1357*4882a593Smuzhiyun desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1358*4882a593Smuzhiyun control = ioread8(&desc->control);
1359*4882a593Smuzhiyun
1360*4882a593Smuzhiyun /* if the control bits are not valid, then we have no more space */
1361*4882a593Smuzhiyun if (!(control & DESC_VALID))
1362*4882a593Smuzhiyun return false;
1363*4882a593Smuzhiyun
1364*4882a593Smuzhiyun return true;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun
1367*4882a593Smuzhiyun /*
1368*4882a593Smuzhiyun * Receive one CAN frame from the hardware
1369*4882a593Smuzhiyun *
1370*4882a593Smuzhiyun * CONTEXT: must be called from user context
1371*4882a593Smuzhiyun */
ican3_recv_skb(struct ican3_dev * mod)1372*4882a593Smuzhiyun static int ican3_recv_skb(struct ican3_dev *mod)
1373*4882a593Smuzhiyun {
1374*4882a593Smuzhiyun struct net_device *ndev = mod->ndev;
1375*4882a593Smuzhiyun struct net_device_stats *stats = &ndev->stats;
1376*4882a593Smuzhiyun struct ican3_fast_desc desc;
1377*4882a593Smuzhiyun void __iomem *desc_addr;
1378*4882a593Smuzhiyun struct can_frame *cf;
1379*4882a593Smuzhiyun struct sk_buff *skb;
1380*4882a593Smuzhiyun unsigned long flags;
1381*4882a593Smuzhiyun
1382*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
1383*4882a593Smuzhiyun
1384*4882a593Smuzhiyun /* copy the whole descriptor */
1385*4882a593Smuzhiyun ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1386*4882a593Smuzhiyun desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1387*4882a593Smuzhiyun memcpy_fromio(&desc, desc_addr, sizeof(desc));
1388*4882a593Smuzhiyun
1389*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
1390*4882a593Smuzhiyun
1391*4882a593Smuzhiyun /* check that we actually have a CAN frame */
1392*4882a593Smuzhiyun if (!(desc.control & DESC_VALID))
1393*4882a593Smuzhiyun return -ENOBUFS;
1394*4882a593Smuzhiyun
1395*4882a593Smuzhiyun /* allocate an skb */
1396*4882a593Smuzhiyun skb = alloc_can_skb(ndev, &cf);
1397*4882a593Smuzhiyun if (unlikely(skb == NULL)) {
1398*4882a593Smuzhiyun stats->rx_dropped++;
1399*4882a593Smuzhiyun goto err_noalloc;
1400*4882a593Smuzhiyun }
1401*4882a593Smuzhiyun
1402*4882a593Smuzhiyun /* convert the ICAN3 frame into Linux CAN format */
1403*4882a593Smuzhiyun ican3_to_can_frame(mod, &desc, cf);
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun /*
1406*4882a593Smuzhiyun * If this is an ECHO frame received from the hardware loopback
1407*4882a593Smuzhiyun * feature, use the skb saved in the ECHO stack instead. This allows
1408*4882a593Smuzhiyun * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1409*4882a593Smuzhiyun *
1410*4882a593Smuzhiyun * Since this is a confirmation of a successfully transmitted packet
1411*4882a593Smuzhiyun * sent from this host, update the transmit statistics.
1412*4882a593Smuzhiyun *
1413*4882a593Smuzhiyun * Also, the netdevice queue needs to be allowed to send packets again.
1414*4882a593Smuzhiyun */
1415*4882a593Smuzhiyun if (ican3_echo_skb_matches(mod, skb)) {
1416*4882a593Smuzhiyun stats->tx_packets++;
1417*4882a593Smuzhiyun stats->tx_bytes += ican3_get_echo_skb(mod);
1418*4882a593Smuzhiyun kfree_skb(skb);
1419*4882a593Smuzhiyun goto err_noalloc;
1420*4882a593Smuzhiyun }
1421*4882a593Smuzhiyun
1422*4882a593Smuzhiyun /* update statistics, receive the skb */
1423*4882a593Smuzhiyun stats->rx_packets++;
1424*4882a593Smuzhiyun stats->rx_bytes += cf->can_dlc;
1425*4882a593Smuzhiyun netif_receive_skb(skb);
1426*4882a593Smuzhiyun
1427*4882a593Smuzhiyun err_noalloc:
1428*4882a593Smuzhiyun /* toggle the valid bit and return the descriptor to the ring */
1429*4882a593Smuzhiyun desc.control ^= DESC_VALID;
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
1432*4882a593Smuzhiyun
1433*4882a593Smuzhiyun ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1434*4882a593Smuzhiyun memcpy_toio(desc_addr, &desc, 1);
1435*4882a593Smuzhiyun
1436*4882a593Smuzhiyun /* update the next buffer pointer */
1437*4882a593Smuzhiyun mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1438*4882a593Smuzhiyun : (mod->fastrx_num + 1);
1439*4882a593Smuzhiyun
1440*4882a593Smuzhiyun /* there are still more buffers to process */
1441*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
1442*4882a593Smuzhiyun return 0;
1443*4882a593Smuzhiyun }
1444*4882a593Smuzhiyun
ican3_napi(struct napi_struct * napi,int budget)1445*4882a593Smuzhiyun static int ican3_napi(struct napi_struct *napi, int budget)
1446*4882a593Smuzhiyun {
1447*4882a593Smuzhiyun struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1448*4882a593Smuzhiyun unsigned long flags;
1449*4882a593Smuzhiyun int received = 0;
1450*4882a593Smuzhiyun int ret;
1451*4882a593Smuzhiyun
1452*4882a593Smuzhiyun /* process all communication messages */
1453*4882a593Smuzhiyun while (true) {
1454*4882a593Smuzhiyun struct ican3_msg msg;
1455*4882a593Smuzhiyun ret = ican3_recv_msg(mod, &msg);
1456*4882a593Smuzhiyun if (ret)
1457*4882a593Smuzhiyun break;
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun ican3_handle_message(mod, &msg);
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun
1462*4882a593Smuzhiyun /* process all CAN frames from the fast interface */
1463*4882a593Smuzhiyun while (received < budget) {
1464*4882a593Smuzhiyun ret = ican3_recv_skb(mod);
1465*4882a593Smuzhiyun if (ret)
1466*4882a593Smuzhiyun break;
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun received++;
1469*4882a593Smuzhiyun }
1470*4882a593Smuzhiyun
1471*4882a593Smuzhiyun /* We have processed all packets that the adapter had, but it
1472*4882a593Smuzhiyun * was less than our budget, stop polling */
1473*4882a593Smuzhiyun if (received < budget)
1474*4882a593Smuzhiyun napi_complete_done(napi, received);
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
1477*4882a593Smuzhiyun
1478*4882a593Smuzhiyun /* Wake up the transmit queue if necessary */
1479*4882a593Smuzhiyun if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1480*4882a593Smuzhiyun netif_wake_queue(mod->ndev);
1481*4882a593Smuzhiyun
1482*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
1483*4882a593Smuzhiyun
1484*4882a593Smuzhiyun /* re-enable interrupt generation */
1485*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1486*4882a593Smuzhiyun return received;
1487*4882a593Smuzhiyun }
1488*4882a593Smuzhiyun
ican3_irq(int irq,void * dev_id)1489*4882a593Smuzhiyun static irqreturn_t ican3_irq(int irq, void *dev_id)
1490*4882a593Smuzhiyun {
1491*4882a593Smuzhiyun struct ican3_dev *mod = dev_id;
1492*4882a593Smuzhiyun u8 stat;
1493*4882a593Smuzhiyun
1494*4882a593Smuzhiyun /*
1495*4882a593Smuzhiyun * The interrupt status register on this device reports interrupts
1496*4882a593Smuzhiyun * as zeroes instead of using ones like most other devices
1497*4882a593Smuzhiyun */
1498*4882a593Smuzhiyun stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1499*4882a593Smuzhiyun if (stat == (1 << mod->num))
1500*4882a593Smuzhiyun return IRQ_NONE;
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun /* clear the MODULbus interrupt from the microcontroller */
1503*4882a593Smuzhiyun ioread8(&mod->dpmctrl->interrupt);
1504*4882a593Smuzhiyun
1505*4882a593Smuzhiyun /* disable interrupt generation, schedule the NAPI poller */
1506*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1507*4882a593Smuzhiyun napi_schedule(&mod->napi);
1508*4882a593Smuzhiyun return IRQ_HANDLED;
1509*4882a593Smuzhiyun }
1510*4882a593Smuzhiyun
1511*4882a593Smuzhiyun /*
1512*4882a593Smuzhiyun * Firmware reset, startup, and shutdown
1513*4882a593Smuzhiyun */
1514*4882a593Smuzhiyun
1515*4882a593Smuzhiyun /*
1516*4882a593Smuzhiyun * Reset an ICAN module to its power-on state
1517*4882a593Smuzhiyun *
1518*4882a593Smuzhiyun * CONTEXT: no network device registered
1519*4882a593Smuzhiyun */
ican3_reset_module(struct ican3_dev * mod)1520*4882a593Smuzhiyun static int ican3_reset_module(struct ican3_dev *mod)
1521*4882a593Smuzhiyun {
1522*4882a593Smuzhiyun unsigned long start;
1523*4882a593Smuzhiyun u8 runold, runnew;
1524*4882a593Smuzhiyun
1525*4882a593Smuzhiyun /* disable interrupts so no more work is scheduled */
1526*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1527*4882a593Smuzhiyun
1528*4882a593Smuzhiyun /* the first unallocated page in the DPM is #9 */
1529*4882a593Smuzhiyun mod->free_page = DPM_FREE_START;
1530*4882a593Smuzhiyun
1531*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_OLD_CONTROL);
1532*4882a593Smuzhiyun runold = ioread8(mod->dpm + TARGET_RUNNING);
1533*4882a593Smuzhiyun
1534*4882a593Smuzhiyun /* reset the module */
1535*4882a593Smuzhiyun iowrite8(0x00, &mod->dpmctrl->hwreset);
1536*4882a593Smuzhiyun
1537*4882a593Smuzhiyun /* wait until the module has finished resetting and is running */
1538*4882a593Smuzhiyun start = jiffies;
1539*4882a593Smuzhiyun do {
1540*4882a593Smuzhiyun ican3_set_page(mod, QUEUE_OLD_CONTROL);
1541*4882a593Smuzhiyun runnew = ioread8(mod->dpm + TARGET_RUNNING);
1542*4882a593Smuzhiyun if (runnew == (runold ^ 0xff))
1543*4882a593Smuzhiyun return 0;
1544*4882a593Smuzhiyun
1545*4882a593Smuzhiyun msleep(10);
1546*4882a593Smuzhiyun } while (time_before(jiffies, start + HZ / 2));
1547*4882a593Smuzhiyun
1548*4882a593Smuzhiyun netdev_err(mod->ndev, "failed to reset CAN module\n");
1549*4882a593Smuzhiyun return -ETIMEDOUT;
1550*4882a593Smuzhiyun }
1551*4882a593Smuzhiyun
ican3_shutdown_module(struct ican3_dev * mod)1552*4882a593Smuzhiyun static void ican3_shutdown_module(struct ican3_dev *mod)
1553*4882a593Smuzhiyun {
1554*4882a593Smuzhiyun ican3_msg_disconnect(mod);
1555*4882a593Smuzhiyun ican3_reset_module(mod);
1556*4882a593Smuzhiyun }
1557*4882a593Smuzhiyun
1558*4882a593Smuzhiyun /*
1559*4882a593Smuzhiyun * Startup an ICAN module, bringing it into fast mode
1560*4882a593Smuzhiyun */
ican3_startup_module(struct ican3_dev * mod)1561*4882a593Smuzhiyun static int ican3_startup_module(struct ican3_dev *mod)
1562*4882a593Smuzhiyun {
1563*4882a593Smuzhiyun int ret;
1564*4882a593Smuzhiyun
1565*4882a593Smuzhiyun ret = ican3_reset_module(mod);
1566*4882a593Smuzhiyun if (ret) {
1567*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to reset module\n");
1568*4882a593Smuzhiyun return ret;
1569*4882a593Smuzhiyun }
1570*4882a593Smuzhiyun
1571*4882a593Smuzhiyun /* detect firmware */
1572*4882a593Smuzhiyun memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
1573*4882a593Smuzhiyun if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
1574*4882a593Smuzhiyun netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
1575*4882a593Smuzhiyun return -ENODEV;
1576*4882a593Smuzhiyun }
1577*4882a593Smuzhiyun if (strstr(mod->fwinfo, "CAL/CANopen"))
1578*4882a593Smuzhiyun mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
1579*4882a593Smuzhiyun else
1580*4882a593Smuzhiyun mod->fwtype = ICAN3_FWTYPE_ICANOS;
1581*4882a593Smuzhiyun
1582*4882a593Smuzhiyun /* re-enable interrupts so we can send messages */
1583*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1584*4882a593Smuzhiyun
1585*4882a593Smuzhiyun ret = ican3_msg_connect(mod);
1586*4882a593Smuzhiyun if (ret) {
1587*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to connect to module\n");
1588*4882a593Smuzhiyun return ret;
1589*4882a593Smuzhiyun }
1590*4882a593Smuzhiyun
1591*4882a593Smuzhiyun ican3_init_new_host_interface(mod);
1592*4882a593Smuzhiyun ret = ican3_msg_newhostif(mod);
1593*4882a593Smuzhiyun if (ret) {
1594*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to switch to new-style interface\n");
1595*4882a593Smuzhiyun return ret;
1596*4882a593Smuzhiyun }
1597*4882a593Smuzhiyun
1598*4882a593Smuzhiyun /* default to "termination on" */
1599*4882a593Smuzhiyun ret = ican3_set_termination(mod, true);
1600*4882a593Smuzhiyun if (ret) {
1601*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to enable termination\n");
1602*4882a593Smuzhiyun return ret;
1603*4882a593Smuzhiyun }
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun /* default to "bus errors enabled" */
1606*4882a593Smuzhiyun ret = ican3_set_buserror(mod, 1);
1607*4882a593Smuzhiyun if (ret) {
1608*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to set bus-error\n");
1609*4882a593Smuzhiyun return ret;
1610*4882a593Smuzhiyun }
1611*4882a593Smuzhiyun
1612*4882a593Smuzhiyun ican3_init_fast_host_interface(mod);
1613*4882a593Smuzhiyun ret = ican3_msg_fasthostif(mod);
1614*4882a593Smuzhiyun if (ret) {
1615*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to switch to fast host interface\n");
1616*4882a593Smuzhiyun return ret;
1617*4882a593Smuzhiyun }
1618*4882a593Smuzhiyun
1619*4882a593Smuzhiyun ret = ican3_set_id_filter(mod, true);
1620*4882a593Smuzhiyun if (ret) {
1621*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to set acceptance filter\n");
1622*4882a593Smuzhiyun return ret;
1623*4882a593Smuzhiyun }
1624*4882a593Smuzhiyun
1625*4882a593Smuzhiyun return 0;
1626*4882a593Smuzhiyun }
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun /*
1629*4882a593Smuzhiyun * CAN Network Device
1630*4882a593Smuzhiyun */
1631*4882a593Smuzhiyun
ican3_open(struct net_device * ndev)1632*4882a593Smuzhiyun static int ican3_open(struct net_device *ndev)
1633*4882a593Smuzhiyun {
1634*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(ndev);
1635*4882a593Smuzhiyun int ret;
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun /* open the CAN layer */
1638*4882a593Smuzhiyun ret = open_candev(ndev);
1639*4882a593Smuzhiyun if (ret) {
1640*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to start CAN layer\n");
1641*4882a593Smuzhiyun return ret;
1642*4882a593Smuzhiyun }
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun /* bring the bus online */
1645*4882a593Smuzhiyun ret = ican3_set_bus_state(mod, true);
1646*4882a593Smuzhiyun if (ret) {
1647*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to set bus-on\n");
1648*4882a593Smuzhiyun close_candev(ndev);
1649*4882a593Smuzhiyun return ret;
1650*4882a593Smuzhiyun }
1651*4882a593Smuzhiyun
1652*4882a593Smuzhiyun /* start up the network device */
1653*4882a593Smuzhiyun mod->can.state = CAN_STATE_ERROR_ACTIVE;
1654*4882a593Smuzhiyun netif_start_queue(ndev);
1655*4882a593Smuzhiyun
1656*4882a593Smuzhiyun return 0;
1657*4882a593Smuzhiyun }
1658*4882a593Smuzhiyun
ican3_stop(struct net_device * ndev)1659*4882a593Smuzhiyun static int ican3_stop(struct net_device *ndev)
1660*4882a593Smuzhiyun {
1661*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(ndev);
1662*4882a593Smuzhiyun int ret;
1663*4882a593Smuzhiyun
1664*4882a593Smuzhiyun /* stop the network device xmit routine */
1665*4882a593Smuzhiyun netif_stop_queue(ndev);
1666*4882a593Smuzhiyun mod->can.state = CAN_STATE_STOPPED;
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun /* bring the bus offline, stop receiving packets */
1669*4882a593Smuzhiyun ret = ican3_set_bus_state(mod, false);
1670*4882a593Smuzhiyun if (ret) {
1671*4882a593Smuzhiyun netdev_err(mod->ndev, "unable to set bus-off\n");
1672*4882a593Smuzhiyun return ret;
1673*4882a593Smuzhiyun }
1674*4882a593Smuzhiyun
1675*4882a593Smuzhiyun /* drop all outstanding echo skbs */
1676*4882a593Smuzhiyun skb_queue_purge(&mod->echoq);
1677*4882a593Smuzhiyun
1678*4882a593Smuzhiyun /* close the CAN layer */
1679*4882a593Smuzhiyun close_candev(ndev);
1680*4882a593Smuzhiyun return 0;
1681*4882a593Smuzhiyun }
1682*4882a593Smuzhiyun
ican3_xmit(struct sk_buff * skb,struct net_device * ndev)1683*4882a593Smuzhiyun static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1684*4882a593Smuzhiyun {
1685*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(ndev);
1686*4882a593Smuzhiyun struct can_frame *cf = (struct can_frame *)skb->data;
1687*4882a593Smuzhiyun struct ican3_fast_desc desc;
1688*4882a593Smuzhiyun void __iomem *desc_addr;
1689*4882a593Smuzhiyun unsigned long flags;
1690*4882a593Smuzhiyun
1691*4882a593Smuzhiyun if (can_dropped_invalid_skb(ndev, skb))
1692*4882a593Smuzhiyun return NETDEV_TX_OK;
1693*4882a593Smuzhiyun
1694*4882a593Smuzhiyun spin_lock_irqsave(&mod->lock, flags);
1695*4882a593Smuzhiyun
1696*4882a593Smuzhiyun /* check that we can actually transmit */
1697*4882a593Smuzhiyun if (!ican3_txok(mod)) {
1698*4882a593Smuzhiyun netdev_err(mod->ndev, "BUG: no free descriptors\n");
1699*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
1700*4882a593Smuzhiyun return NETDEV_TX_BUSY;
1701*4882a593Smuzhiyun }
1702*4882a593Smuzhiyun
1703*4882a593Smuzhiyun /* copy the control bits of the descriptor */
1704*4882a593Smuzhiyun ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1705*4882a593Smuzhiyun desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1706*4882a593Smuzhiyun memset(&desc, 0, sizeof(desc));
1707*4882a593Smuzhiyun memcpy_fromio(&desc, desc_addr, 1);
1708*4882a593Smuzhiyun
1709*4882a593Smuzhiyun /* convert the Linux CAN frame into ICAN3 format */
1710*4882a593Smuzhiyun can_frame_to_ican3(mod, cf, &desc);
1711*4882a593Smuzhiyun
1712*4882a593Smuzhiyun /*
1713*4882a593Smuzhiyun * This hardware doesn't have TX-done notifications, so we'll try and
1714*4882a593Smuzhiyun * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1715*4882a593Smuzhiyun * stack. Upon packet reception, check if the ECHO skb and received
1716*4882a593Smuzhiyun * skb match, and use that to wake the queue.
1717*4882a593Smuzhiyun */
1718*4882a593Smuzhiyun ican3_put_echo_skb(mod, skb);
1719*4882a593Smuzhiyun
1720*4882a593Smuzhiyun /*
1721*4882a593Smuzhiyun * the programming manual says that you must set the IVALID bit, then
1722*4882a593Smuzhiyun * interrupt, then set the valid bit. Quite weird, but it seems to be
1723*4882a593Smuzhiyun * required for this to work
1724*4882a593Smuzhiyun */
1725*4882a593Smuzhiyun desc.control |= DESC_IVALID;
1726*4882a593Smuzhiyun memcpy_toio(desc_addr, &desc, sizeof(desc));
1727*4882a593Smuzhiyun
1728*4882a593Smuzhiyun /* generate a MODULbus interrupt to the microcontroller */
1729*4882a593Smuzhiyun iowrite8(0x01, &mod->dpmctrl->interrupt);
1730*4882a593Smuzhiyun
1731*4882a593Smuzhiyun desc.control ^= DESC_VALID;
1732*4882a593Smuzhiyun memcpy_toio(desc_addr, &desc, sizeof(desc));
1733*4882a593Smuzhiyun
1734*4882a593Smuzhiyun /* update the next buffer pointer */
1735*4882a593Smuzhiyun mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1736*4882a593Smuzhiyun : (mod->fasttx_num + 1);
1737*4882a593Smuzhiyun
1738*4882a593Smuzhiyun /* if there is no free descriptor space, stop the transmit queue */
1739*4882a593Smuzhiyun if (!ican3_txok(mod))
1740*4882a593Smuzhiyun netif_stop_queue(ndev);
1741*4882a593Smuzhiyun
1742*4882a593Smuzhiyun spin_unlock_irqrestore(&mod->lock, flags);
1743*4882a593Smuzhiyun return NETDEV_TX_OK;
1744*4882a593Smuzhiyun }
1745*4882a593Smuzhiyun
1746*4882a593Smuzhiyun static const struct net_device_ops ican3_netdev_ops = {
1747*4882a593Smuzhiyun .ndo_open = ican3_open,
1748*4882a593Smuzhiyun .ndo_stop = ican3_stop,
1749*4882a593Smuzhiyun .ndo_start_xmit = ican3_xmit,
1750*4882a593Smuzhiyun .ndo_change_mtu = can_change_mtu,
1751*4882a593Smuzhiyun };
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun /*
1754*4882a593Smuzhiyun * Low-level CAN Device
1755*4882a593Smuzhiyun */
1756*4882a593Smuzhiyun
1757*4882a593Smuzhiyun /* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
1758*4882a593Smuzhiyun static const struct can_bittiming_const ican3_bittiming_const = {
1759*4882a593Smuzhiyun .name = DRV_NAME,
1760*4882a593Smuzhiyun .tseg1_min = 1,
1761*4882a593Smuzhiyun .tseg1_max = 16,
1762*4882a593Smuzhiyun .tseg2_min = 1,
1763*4882a593Smuzhiyun .tseg2_max = 8,
1764*4882a593Smuzhiyun .sjw_max = 4,
1765*4882a593Smuzhiyun .brp_min = 1,
1766*4882a593Smuzhiyun .brp_max = 64,
1767*4882a593Smuzhiyun .brp_inc = 1,
1768*4882a593Smuzhiyun };
1769*4882a593Smuzhiyun
ican3_set_mode(struct net_device * ndev,enum can_mode mode)1770*4882a593Smuzhiyun static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1771*4882a593Smuzhiyun {
1772*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(ndev);
1773*4882a593Smuzhiyun int ret;
1774*4882a593Smuzhiyun
1775*4882a593Smuzhiyun if (mode != CAN_MODE_START)
1776*4882a593Smuzhiyun return -ENOTSUPP;
1777*4882a593Smuzhiyun
1778*4882a593Smuzhiyun /* bring the bus online */
1779*4882a593Smuzhiyun ret = ican3_set_bus_state(mod, true);
1780*4882a593Smuzhiyun if (ret) {
1781*4882a593Smuzhiyun netdev_err(ndev, "unable to set bus-on\n");
1782*4882a593Smuzhiyun return ret;
1783*4882a593Smuzhiyun }
1784*4882a593Smuzhiyun
1785*4882a593Smuzhiyun /* start up the network device */
1786*4882a593Smuzhiyun mod->can.state = CAN_STATE_ERROR_ACTIVE;
1787*4882a593Smuzhiyun
1788*4882a593Smuzhiyun if (netif_queue_stopped(ndev))
1789*4882a593Smuzhiyun netif_wake_queue(ndev);
1790*4882a593Smuzhiyun
1791*4882a593Smuzhiyun return 0;
1792*4882a593Smuzhiyun }
1793*4882a593Smuzhiyun
ican3_get_berr_counter(const struct net_device * ndev,struct can_berr_counter * bec)1794*4882a593Smuzhiyun static int ican3_get_berr_counter(const struct net_device *ndev,
1795*4882a593Smuzhiyun struct can_berr_counter *bec)
1796*4882a593Smuzhiyun {
1797*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(ndev);
1798*4882a593Smuzhiyun int ret;
1799*4882a593Smuzhiyun
1800*4882a593Smuzhiyun ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1801*4882a593Smuzhiyun if (ret)
1802*4882a593Smuzhiyun return ret;
1803*4882a593Smuzhiyun
1804*4882a593Smuzhiyun if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
1805*4882a593Smuzhiyun netdev_info(mod->ndev, "%s timed out\n", __func__);
1806*4882a593Smuzhiyun return -ETIMEDOUT;
1807*4882a593Smuzhiyun }
1808*4882a593Smuzhiyun
1809*4882a593Smuzhiyun bec->rxerr = mod->bec.rxerr;
1810*4882a593Smuzhiyun bec->txerr = mod->bec.txerr;
1811*4882a593Smuzhiyun return 0;
1812*4882a593Smuzhiyun }
1813*4882a593Smuzhiyun
1814*4882a593Smuzhiyun /*
1815*4882a593Smuzhiyun * Sysfs Attributes
1816*4882a593Smuzhiyun */
1817*4882a593Smuzhiyun
ican3_sysfs_show_term(struct device * dev,struct device_attribute * attr,char * buf)1818*4882a593Smuzhiyun static ssize_t ican3_sysfs_show_term(struct device *dev,
1819*4882a593Smuzhiyun struct device_attribute *attr,
1820*4882a593Smuzhiyun char *buf)
1821*4882a593Smuzhiyun {
1822*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1823*4882a593Smuzhiyun int ret;
1824*4882a593Smuzhiyun
1825*4882a593Smuzhiyun ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1826*4882a593Smuzhiyun if (ret)
1827*4882a593Smuzhiyun return ret;
1828*4882a593Smuzhiyun
1829*4882a593Smuzhiyun if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
1830*4882a593Smuzhiyun netdev_info(mod->ndev, "%s timed out\n", __func__);
1831*4882a593Smuzhiyun return -ETIMEDOUT;
1832*4882a593Smuzhiyun }
1833*4882a593Smuzhiyun
1834*4882a593Smuzhiyun return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1835*4882a593Smuzhiyun }
1836*4882a593Smuzhiyun
ican3_sysfs_set_term(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1837*4882a593Smuzhiyun static ssize_t ican3_sysfs_set_term(struct device *dev,
1838*4882a593Smuzhiyun struct device_attribute *attr,
1839*4882a593Smuzhiyun const char *buf, size_t count)
1840*4882a593Smuzhiyun {
1841*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1842*4882a593Smuzhiyun unsigned long enable;
1843*4882a593Smuzhiyun int ret;
1844*4882a593Smuzhiyun
1845*4882a593Smuzhiyun if (kstrtoul(buf, 0, &enable))
1846*4882a593Smuzhiyun return -EINVAL;
1847*4882a593Smuzhiyun
1848*4882a593Smuzhiyun ret = ican3_set_termination(mod, enable);
1849*4882a593Smuzhiyun if (ret)
1850*4882a593Smuzhiyun return ret;
1851*4882a593Smuzhiyun
1852*4882a593Smuzhiyun return count;
1853*4882a593Smuzhiyun }
1854*4882a593Smuzhiyun
ican3_sysfs_show_fwinfo(struct device * dev,struct device_attribute * attr,char * buf)1855*4882a593Smuzhiyun static ssize_t ican3_sysfs_show_fwinfo(struct device *dev,
1856*4882a593Smuzhiyun struct device_attribute *attr,
1857*4882a593Smuzhiyun char *buf)
1858*4882a593Smuzhiyun {
1859*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1860*4882a593Smuzhiyun
1861*4882a593Smuzhiyun return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
1862*4882a593Smuzhiyun }
1863*4882a593Smuzhiyun
1864*4882a593Smuzhiyun static DEVICE_ATTR(termination, 0644, ican3_sysfs_show_term,
1865*4882a593Smuzhiyun ican3_sysfs_set_term);
1866*4882a593Smuzhiyun static DEVICE_ATTR(fwinfo, 0444, ican3_sysfs_show_fwinfo, NULL);
1867*4882a593Smuzhiyun
1868*4882a593Smuzhiyun static struct attribute *ican3_sysfs_attrs[] = {
1869*4882a593Smuzhiyun &dev_attr_termination.attr,
1870*4882a593Smuzhiyun &dev_attr_fwinfo.attr,
1871*4882a593Smuzhiyun NULL,
1872*4882a593Smuzhiyun };
1873*4882a593Smuzhiyun
1874*4882a593Smuzhiyun static const struct attribute_group ican3_sysfs_attr_group = {
1875*4882a593Smuzhiyun .attrs = ican3_sysfs_attrs,
1876*4882a593Smuzhiyun };
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun /*
1879*4882a593Smuzhiyun * PCI Subsystem
1880*4882a593Smuzhiyun */
1881*4882a593Smuzhiyun
ican3_probe(struct platform_device * pdev)1882*4882a593Smuzhiyun static int ican3_probe(struct platform_device *pdev)
1883*4882a593Smuzhiyun {
1884*4882a593Smuzhiyun struct janz_platform_data *pdata;
1885*4882a593Smuzhiyun struct net_device *ndev;
1886*4882a593Smuzhiyun struct ican3_dev *mod;
1887*4882a593Smuzhiyun struct resource *res;
1888*4882a593Smuzhiyun struct device *dev;
1889*4882a593Smuzhiyun int ret;
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun pdata = dev_get_platdata(&pdev->dev);
1892*4882a593Smuzhiyun if (!pdata)
1893*4882a593Smuzhiyun return -ENXIO;
1894*4882a593Smuzhiyun
1895*4882a593Smuzhiyun dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1896*4882a593Smuzhiyun
1897*4882a593Smuzhiyun /* save the struct device for printing */
1898*4882a593Smuzhiyun dev = &pdev->dev;
1899*4882a593Smuzhiyun
1900*4882a593Smuzhiyun /* allocate the CAN device and private data */
1901*4882a593Smuzhiyun ndev = alloc_candev(sizeof(*mod), 0);
1902*4882a593Smuzhiyun if (!ndev) {
1903*4882a593Smuzhiyun dev_err(dev, "unable to allocate CANdev\n");
1904*4882a593Smuzhiyun ret = -ENOMEM;
1905*4882a593Smuzhiyun goto out_return;
1906*4882a593Smuzhiyun }
1907*4882a593Smuzhiyun
1908*4882a593Smuzhiyun platform_set_drvdata(pdev, ndev);
1909*4882a593Smuzhiyun mod = netdev_priv(ndev);
1910*4882a593Smuzhiyun mod->ndev = ndev;
1911*4882a593Smuzhiyun mod->num = pdata->modno;
1912*4882a593Smuzhiyun netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1913*4882a593Smuzhiyun skb_queue_head_init(&mod->echoq);
1914*4882a593Smuzhiyun spin_lock_init(&mod->lock);
1915*4882a593Smuzhiyun init_completion(&mod->termination_comp);
1916*4882a593Smuzhiyun init_completion(&mod->buserror_comp);
1917*4882a593Smuzhiyun
1918*4882a593Smuzhiyun /* setup device-specific sysfs attributes */
1919*4882a593Smuzhiyun ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1920*4882a593Smuzhiyun
1921*4882a593Smuzhiyun /* the first unallocated page in the DPM is 9 */
1922*4882a593Smuzhiyun mod->free_page = DPM_FREE_START;
1923*4882a593Smuzhiyun
1924*4882a593Smuzhiyun ndev->netdev_ops = &ican3_netdev_ops;
1925*4882a593Smuzhiyun ndev->flags |= IFF_ECHO;
1926*4882a593Smuzhiyun SET_NETDEV_DEV(ndev, &pdev->dev);
1927*4882a593Smuzhiyun
1928*4882a593Smuzhiyun mod->can.clock.freq = ICAN3_CAN_CLOCK;
1929*4882a593Smuzhiyun mod->can.bittiming_const = &ican3_bittiming_const;
1930*4882a593Smuzhiyun mod->can.do_set_mode = ican3_set_mode;
1931*4882a593Smuzhiyun mod->can.do_get_berr_counter = ican3_get_berr_counter;
1932*4882a593Smuzhiyun mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1933*4882a593Smuzhiyun | CAN_CTRLMODE_BERR_REPORTING
1934*4882a593Smuzhiyun | CAN_CTRLMODE_ONE_SHOT;
1935*4882a593Smuzhiyun
1936*4882a593Smuzhiyun /* find our IRQ number */
1937*4882a593Smuzhiyun mod->irq = platform_get_irq(pdev, 0);
1938*4882a593Smuzhiyun if (mod->irq < 0) {
1939*4882a593Smuzhiyun ret = -ENODEV;
1940*4882a593Smuzhiyun goto out_free_ndev;
1941*4882a593Smuzhiyun }
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun ndev->irq = mod->irq;
1944*4882a593Smuzhiyun
1945*4882a593Smuzhiyun /* get access to the MODULbus registers for this module */
1946*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1947*4882a593Smuzhiyun if (!res) {
1948*4882a593Smuzhiyun dev_err(dev, "MODULbus registers not found\n");
1949*4882a593Smuzhiyun ret = -ENODEV;
1950*4882a593Smuzhiyun goto out_free_ndev;
1951*4882a593Smuzhiyun }
1952*4882a593Smuzhiyun
1953*4882a593Smuzhiyun mod->dpm = ioremap(res->start, resource_size(res));
1954*4882a593Smuzhiyun if (!mod->dpm) {
1955*4882a593Smuzhiyun dev_err(dev, "MODULbus registers not ioremap\n");
1956*4882a593Smuzhiyun ret = -ENOMEM;
1957*4882a593Smuzhiyun goto out_free_ndev;
1958*4882a593Smuzhiyun }
1959*4882a593Smuzhiyun
1960*4882a593Smuzhiyun mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1961*4882a593Smuzhiyun
1962*4882a593Smuzhiyun /* get access to the control registers for this module */
1963*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1964*4882a593Smuzhiyun if (!res) {
1965*4882a593Smuzhiyun dev_err(dev, "CONTROL registers not found\n");
1966*4882a593Smuzhiyun ret = -ENODEV;
1967*4882a593Smuzhiyun goto out_iounmap_dpm;
1968*4882a593Smuzhiyun }
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun mod->ctrl = ioremap(res->start, resource_size(res));
1971*4882a593Smuzhiyun if (!mod->ctrl) {
1972*4882a593Smuzhiyun dev_err(dev, "CONTROL registers not ioremap\n");
1973*4882a593Smuzhiyun ret = -ENOMEM;
1974*4882a593Smuzhiyun goto out_iounmap_dpm;
1975*4882a593Smuzhiyun }
1976*4882a593Smuzhiyun
1977*4882a593Smuzhiyun /* disable our IRQ, then hookup the IRQ handler */
1978*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1979*4882a593Smuzhiyun ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1980*4882a593Smuzhiyun if (ret) {
1981*4882a593Smuzhiyun dev_err(dev, "unable to request IRQ\n");
1982*4882a593Smuzhiyun goto out_iounmap_ctrl;
1983*4882a593Smuzhiyun }
1984*4882a593Smuzhiyun
1985*4882a593Smuzhiyun /* reset and initialize the CAN controller into fast mode */
1986*4882a593Smuzhiyun napi_enable(&mod->napi);
1987*4882a593Smuzhiyun ret = ican3_startup_module(mod);
1988*4882a593Smuzhiyun if (ret) {
1989*4882a593Smuzhiyun dev_err(dev, "%s: unable to start CANdev\n", __func__);
1990*4882a593Smuzhiyun goto out_free_irq;
1991*4882a593Smuzhiyun }
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun /* register with the Linux CAN layer */
1994*4882a593Smuzhiyun ret = register_candev(ndev);
1995*4882a593Smuzhiyun if (ret) {
1996*4882a593Smuzhiyun dev_err(dev, "%s: unable to register CANdev\n", __func__);
1997*4882a593Smuzhiyun goto out_free_irq;
1998*4882a593Smuzhiyun }
1999*4882a593Smuzhiyun
2000*4882a593Smuzhiyun netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
2001*4882a593Smuzhiyun return 0;
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun out_free_irq:
2004*4882a593Smuzhiyun napi_disable(&mod->napi);
2005*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2006*4882a593Smuzhiyun free_irq(mod->irq, mod);
2007*4882a593Smuzhiyun out_iounmap_ctrl:
2008*4882a593Smuzhiyun iounmap(mod->ctrl);
2009*4882a593Smuzhiyun out_iounmap_dpm:
2010*4882a593Smuzhiyun iounmap(mod->dpm);
2011*4882a593Smuzhiyun out_free_ndev:
2012*4882a593Smuzhiyun free_candev(ndev);
2013*4882a593Smuzhiyun out_return:
2014*4882a593Smuzhiyun return ret;
2015*4882a593Smuzhiyun }
2016*4882a593Smuzhiyun
ican3_remove(struct platform_device * pdev)2017*4882a593Smuzhiyun static int ican3_remove(struct platform_device *pdev)
2018*4882a593Smuzhiyun {
2019*4882a593Smuzhiyun struct net_device *ndev = platform_get_drvdata(pdev);
2020*4882a593Smuzhiyun struct ican3_dev *mod = netdev_priv(ndev);
2021*4882a593Smuzhiyun
2022*4882a593Smuzhiyun /* unregister the netdevice, stop interrupts */
2023*4882a593Smuzhiyun unregister_netdev(ndev);
2024*4882a593Smuzhiyun napi_disable(&mod->napi);
2025*4882a593Smuzhiyun iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2026*4882a593Smuzhiyun free_irq(mod->irq, mod);
2027*4882a593Smuzhiyun
2028*4882a593Smuzhiyun /* put the module into reset */
2029*4882a593Smuzhiyun ican3_shutdown_module(mod);
2030*4882a593Smuzhiyun
2031*4882a593Smuzhiyun /* unmap all registers */
2032*4882a593Smuzhiyun iounmap(mod->ctrl);
2033*4882a593Smuzhiyun iounmap(mod->dpm);
2034*4882a593Smuzhiyun
2035*4882a593Smuzhiyun free_candev(ndev);
2036*4882a593Smuzhiyun
2037*4882a593Smuzhiyun return 0;
2038*4882a593Smuzhiyun }
2039*4882a593Smuzhiyun
2040*4882a593Smuzhiyun static struct platform_driver ican3_driver = {
2041*4882a593Smuzhiyun .driver = {
2042*4882a593Smuzhiyun .name = DRV_NAME,
2043*4882a593Smuzhiyun },
2044*4882a593Smuzhiyun .probe = ican3_probe,
2045*4882a593Smuzhiyun .remove = ican3_remove,
2046*4882a593Smuzhiyun };
2047*4882a593Smuzhiyun
2048*4882a593Smuzhiyun module_platform_driver(ican3_driver);
2049*4882a593Smuzhiyun
2050*4882a593Smuzhiyun MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
2051*4882a593Smuzhiyun MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
2052*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2053*4882a593Smuzhiyun MODULE_ALIAS("platform:janz-ican3");
2054