1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef __COM9026_H 3*4882a593Smuzhiyun #define __COM9026_H 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun /* COM 9026 controller chip --> ARCnet register addresses */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define COM9026_REG_W_INTMASK 0 /* writable */ 8*4882a593Smuzhiyun #define COM9026_REG_R_STATUS 0 /* readable */ 9*4882a593Smuzhiyun #define COM9026_REG_W_COMMAND 1 /* writable, returns random vals on read (?) */ 10*4882a593Smuzhiyun #define COM9026_REG_RW_CONFIG 2 /* Configuration register */ 11*4882a593Smuzhiyun #define COM9026_REG_R_RESET 8 /* software reset (on read) */ 12*4882a593Smuzhiyun #define COM9026_REG_RW_MEMDATA 12 /* Data port for IO-mapped memory */ 13*4882a593Smuzhiyun #define COM9026_REG_W_ADDR_LO 14 /* Control registers for said */ 14*4882a593Smuzhiyun #define COM9026_REG_W_ADDR_HI 15 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define COM9026_REG_R_STATION 1 /* Station ID */ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #endif 19