xref: /OK3568_Linux_fs/kernel/drivers/mux/adg792a.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Multiplexer driver for Analog Devices ADG792A/G Triple 4:1 mux
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2017 Axentia Technologies AB
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Peter Rosin <peda@axentia.se>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/mux/driver.h>
14*4882a593Smuzhiyun #include <linux/property.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define ADG792A_LDSW		BIT(0)
17*4882a593Smuzhiyun #define ADG792A_RESETB		BIT(1)
18*4882a593Smuzhiyun #define ADG792A_DISABLE(mux)	(0x50 | (mux))
19*4882a593Smuzhiyun #define ADG792A_DISABLE_ALL	(0x5f)
20*4882a593Smuzhiyun #define ADG792A_MUX(mux, state)	(0xc0 | (((mux) + 1) << 2) | (state))
21*4882a593Smuzhiyun #define ADG792A_MUX_ALL(state)	(0xc0 | (state))
22*4882a593Smuzhiyun 
adg792a_write_cmd(struct i2c_client * i2c,u8 cmd,int reset)23*4882a593Smuzhiyun static int adg792a_write_cmd(struct i2c_client *i2c, u8 cmd, int reset)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	u8 data = ADG792A_RESETB | ADG792A_LDSW;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	/* ADG792A_RESETB is active low, the chip resets when it is zero. */
28*4882a593Smuzhiyun 	if (reset)
29*4882a593Smuzhiyun 		data &= ~ADG792A_RESETB;
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 	return i2c_smbus_write_byte_data(i2c, cmd, data);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun 
adg792a_set(struct mux_control * mux,int state)34*4882a593Smuzhiyun static int adg792a_set(struct mux_control *mux, int state)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun 	struct i2c_client *i2c = to_i2c_client(mux->chip->dev.parent);
37*4882a593Smuzhiyun 	u8 cmd;
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun 	if (mux->chip->controllers == 1) {
40*4882a593Smuzhiyun 		/* parallel mux controller operation */
41*4882a593Smuzhiyun 		if (state == MUX_IDLE_DISCONNECT)
42*4882a593Smuzhiyun 			cmd = ADG792A_DISABLE_ALL;
43*4882a593Smuzhiyun 		else
44*4882a593Smuzhiyun 			cmd = ADG792A_MUX_ALL(state);
45*4882a593Smuzhiyun 	} else {
46*4882a593Smuzhiyun 		unsigned int controller = mux_control_get_index(mux);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 		if (state == MUX_IDLE_DISCONNECT)
49*4882a593Smuzhiyun 			cmd = ADG792A_DISABLE(controller);
50*4882a593Smuzhiyun 		else
51*4882a593Smuzhiyun 			cmd = ADG792A_MUX(controller, state);
52*4882a593Smuzhiyun 	}
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	return adg792a_write_cmd(i2c, cmd, 0);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun static const struct mux_control_ops adg792a_ops = {
58*4882a593Smuzhiyun 	.set = adg792a_set,
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
adg792a_probe(struct i2c_client * i2c)61*4882a593Smuzhiyun static int adg792a_probe(struct i2c_client *i2c)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	struct device *dev = &i2c->dev;
64*4882a593Smuzhiyun 	struct mux_chip *mux_chip;
65*4882a593Smuzhiyun 	s32 idle_state[3];
66*4882a593Smuzhiyun 	u32 cells;
67*4882a593Smuzhiyun 	int ret;
68*4882a593Smuzhiyun 	int i;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
71*4882a593Smuzhiyun 		return -ENODEV;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	ret = device_property_read_u32(dev, "#mux-control-cells", &cells);
74*4882a593Smuzhiyun 	if (ret < 0)
75*4882a593Smuzhiyun 		return ret;
76*4882a593Smuzhiyun 	if (cells >= 2)
77*4882a593Smuzhiyun 		return -EINVAL;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	mux_chip = devm_mux_chip_alloc(dev, cells ? 3 : 1, 0);
80*4882a593Smuzhiyun 	if (IS_ERR(mux_chip))
81*4882a593Smuzhiyun 		return PTR_ERR(mux_chip);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	mux_chip->ops = &adg792a_ops;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	ret = adg792a_write_cmd(i2c, ADG792A_DISABLE_ALL, 1);
86*4882a593Smuzhiyun 	if (ret < 0)
87*4882a593Smuzhiyun 		return ret;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	ret = device_property_read_u32_array(dev, "idle-state",
90*4882a593Smuzhiyun 					     (u32 *)idle_state,
91*4882a593Smuzhiyun 					     mux_chip->controllers);
92*4882a593Smuzhiyun 	if (ret < 0) {
93*4882a593Smuzhiyun 		idle_state[0] = MUX_IDLE_AS_IS;
94*4882a593Smuzhiyun 		idle_state[1] = MUX_IDLE_AS_IS;
95*4882a593Smuzhiyun 		idle_state[2] = MUX_IDLE_AS_IS;
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	for (i = 0; i < mux_chip->controllers; ++i) {
99*4882a593Smuzhiyun 		struct mux_control *mux = &mux_chip->mux[i];
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 		mux->states = 4;
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 		switch (idle_state[i]) {
104*4882a593Smuzhiyun 		case MUX_IDLE_DISCONNECT:
105*4882a593Smuzhiyun 		case MUX_IDLE_AS_IS:
106*4882a593Smuzhiyun 		case 0 ... 4:
107*4882a593Smuzhiyun 			mux->idle_state = idle_state[i];
108*4882a593Smuzhiyun 			break;
109*4882a593Smuzhiyun 		default:
110*4882a593Smuzhiyun 			dev_err(dev, "invalid idle-state %d\n", idle_state[i]);
111*4882a593Smuzhiyun 			return -EINVAL;
112*4882a593Smuzhiyun 		}
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	ret = devm_mux_chip_register(dev, mux_chip);
116*4882a593Smuzhiyun 	if (ret < 0)
117*4882a593Smuzhiyun 		return ret;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	if (cells)
120*4882a593Smuzhiyun 		dev_info(dev, "3x single pole quadruple throw muxes registered\n");
121*4882a593Smuzhiyun 	else
122*4882a593Smuzhiyun 		dev_info(dev, "triple pole quadruple throw mux registered\n");
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	return 0;
125*4882a593Smuzhiyun }
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun static const struct i2c_device_id adg792a_id[] = {
128*4882a593Smuzhiyun 	{ .name = "adg792a", },
129*4882a593Smuzhiyun 	{ .name = "adg792g", },
130*4882a593Smuzhiyun 	{ }
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, adg792a_id);
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun static const struct of_device_id adg792a_of_match[] = {
135*4882a593Smuzhiyun 	{ .compatible = "adi,adg792a", },
136*4882a593Smuzhiyun 	{ .compatible = "adi,adg792g", },
137*4882a593Smuzhiyun 	{ }
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, adg792a_of_match);
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun static struct i2c_driver adg792a_driver = {
142*4882a593Smuzhiyun 	.driver		= {
143*4882a593Smuzhiyun 		.name		= "adg792a",
144*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(adg792a_of_match),
145*4882a593Smuzhiyun 	},
146*4882a593Smuzhiyun 	.probe_new	= adg792a_probe,
147*4882a593Smuzhiyun 	.id_table	= adg792a_id,
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun module_i2c_driver(adg792a_driver);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun MODULE_DESCRIPTION("Analog Devices ADG792A/G Triple 4:1 mux driver");
152*4882a593Smuzhiyun MODULE_AUTHOR("Peter Rosin <peda@axentia.se>");
153*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
154