1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #include <linux/mtd/spi-nor.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include "core.h" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun static const struct flash_info puya_parts[] = { 11*4882a593Smuzhiyun { "PY25Q128HA", INFO(0x852018, 0, 64 * 1024, 256, 12*4882a593Smuzhiyun SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 13*4882a593Smuzhiyun { "P25Q64H", INFO(0x856017, 0, 64 * 1024, 128, 14*4882a593Smuzhiyun SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 15*4882a593Smuzhiyun { "PY25Q64HA", INFO(0x852017, 0, 64 * 1024, 256, 16*4882a593Smuzhiyun SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 17*4882a593Smuzhiyun { "P25Q128H", INFO(0x856018, 0, 64 * 1024, 256, 18*4882a593Smuzhiyun SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 19*4882a593Smuzhiyun { "PY25Q256HB", INFO(0x852019, 0, 64 * 1024, 512, 20*4882a593Smuzhiyun SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun const struct spi_nor_manufacturer spi_nor_puya = { 24*4882a593Smuzhiyun .name = "puya", 25*4882a593Smuzhiyun .parts = puya_parts, 26*4882a593Smuzhiyun .nparts = ARRAY_SIZE(puya_parts), 27*4882a593Smuzhiyun }; 28