1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2005, Intec Automation Inc. 4*4882a593Smuzhiyun * Copyright (C) 2014, Freescale Semiconductor, Inc. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include <linux/mtd/spi-nor.h> 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "core.h" 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun static const struct flash_info esmt_parts[] = { 12*4882a593Smuzhiyun /* ESMT */ 13*4882a593Smuzhiyun { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, 14*4882a593Smuzhiyun SECT_4K | SPI_NOR_HAS_LOCK) }, 15*4882a593Smuzhiyun { "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, 16*4882a593Smuzhiyun SECT_4K | SPI_NOR_HAS_LOCK) }, 17*4882a593Smuzhiyun { "f25l64qa", INFO(0x8c4117, 0, 64 * 1024, 128, 18*4882a593Smuzhiyun SECT_4K | SPI_NOR_HAS_LOCK) }, 19*4882a593Smuzhiyun { "en25qh128", 20*4882a593Smuzhiyun INFO(0x1c7018, 0, 64 * 1024, 256, SECT_4K) }, 21*4882a593Smuzhiyun { "en25s64", 22*4882a593Smuzhiyun INFO(0x1c3817, 0, 64 * 1024, 128, SECT_4K) }, 23*4882a593Smuzhiyun { "en25qh256a", 24*4882a593Smuzhiyun INFO(0x1c7019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, 25*4882a593Smuzhiyun { "en25qx256a", 26*4882a593Smuzhiyun INFO(0x1c7119, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, 27*4882a593Smuzhiyun { "en25qx128a", 28*4882a593Smuzhiyun INFO(0x1c7118, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun const struct spi_nor_manufacturer spi_nor_esmt = { 32*4882a593Smuzhiyun .name = "esmt", 33*4882a593Smuzhiyun .parts = esmt_parts, 34*4882a593Smuzhiyun .nparts = ARRAY_SIZE(esmt_parts), 35*4882a593Smuzhiyun }; 36