1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * linux/drivers/mtd/rknand/rknand_base.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2005-2009 Fuzhou Rockchip Electronics
6*4882a593Smuzhiyun * ZYF <zyf@rock-chips.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun #include <linux/version.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/sched.h>
13*4882a593Smuzhiyun #include <linux/delay.h>
14*4882a593Smuzhiyun #include <linux/init.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/platform_device.h>
17*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
18*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
19*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
20*4882a593Smuzhiyun #include <linux/mutex.h>
21*4882a593Smuzhiyun #include <linux/kthread.h>
22*4882a593Smuzhiyun #include <linux/dma-mapping.h>
23*4882a593Smuzhiyun #include <asm/dma.h>
24*4882a593Smuzhiyun #include <asm/cacheflush.h>
25*4882a593Smuzhiyun #include <linux/irq.h>
26*4882a593Smuzhiyun #include <linux/interrupt.h>
27*4882a593Smuzhiyun #include <linux/reboot.h>
28*4882a593Smuzhiyun #include <asm/io.h>
29*4882a593Smuzhiyun #include <asm/mach/flash.h>
30*4882a593Smuzhiyun //#include "api_flash.h"
31*4882a593Smuzhiyun #include "rknand_base.h"
32*4882a593Smuzhiyun #include "../mtdcore.h"
33*4882a593Smuzhiyun #include <linux/clk.h>
34*4882a593Smuzhiyun #include <linux/cpufreq.h>
35*4882a593Smuzhiyun #ifdef CONFIG_OF
36*4882a593Smuzhiyun #include <linux/of.h>
37*4882a593Smuzhiyun #endif
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun #define DRIVER_NAME "rk29xxnand"
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun const char rknand_base_version[] = "rknand_base.c version: 4.38 20120717";
42*4882a593Smuzhiyun #define NAND_DEBUG_LEVEL0 0
43*4882a593Smuzhiyun #define NAND_DEBUG_LEVEL1 1
44*4882a593Smuzhiyun #define NAND_DEBUG_LEVEL2 2
45*4882a593Smuzhiyun #define NAND_DEBUG_LEVEL3 3
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun int g_num_partitions = 0;
48*4882a593Smuzhiyun unsigned long SysImageWriteEndAdd = 0;
49*4882a593Smuzhiyun struct mtd_info rknand_mtd;
50*4882a593Smuzhiyun struct mtd_partition *rknand_parts;
51*4882a593Smuzhiyun struct rknand_info * gpNandInfo;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun #ifdef CONFIG_MTD_NAND_RK29XX_DEBUG
54*4882a593Smuzhiyun static int s_debug = CONFIG_MTD_NAND_RK29XX_DEBUG_VERBOSE;
55*4882a593Smuzhiyun #undef NAND_DEBUG
56*4882a593Smuzhiyun #define NAND_DEBUG(n, format, arg...) \
57*4882a593Smuzhiyun if (n <= s_debug) { \
58*4882a593Smuzhiyun printk(format,##arg); \
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun #else
61*4882a593Smuzhiyun #undef NAND_DEBUG
62*4882a593Smuzhiyun #define NAND_DEBUG(n, arg...)
63*4882a593Smuzhiyun static const int s_debug = 0;
64*4882a593Smuzhiyun #endif
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #include <linux/proc_fs.h>
67*4882a593Smuzhiyun #include <linux/version.h>
68*4882a593Smuzhiyun #if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 26))
69*4882a593Smuzhiyun #define NANDPROC_ROOT (&proc_root)
70*4882a593Smuzhiyun #else
71*4882a593Smuzhiyun #define NANDPROC_ROOT NULL
72*4882a593Smuzhiyun #endif
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun //#define RKNAND_TRAC_EN
75*4882a593Smuzhiyun #ifdef RKNAND_TRAC_EN
76*4882a593Smuzhiyun static struct proc_dir_entry *my_trac_proc_entry;
77*4882a593Smuzhiyun #define MAX_TRAC_BUFFER_SIZE (long)(2048 * 8 * 512) //sector
78*4882a593Smuzhiyun static char grknand_trac_buf[MAX_TRAC_BUFFER_SIZE];
79*4882a593Smuzhiyun static char *ptrac_buf = grknand_trac_buf;
trac_log(long lba,int len,int mod)80*4882a593Smuzhiyun void trac_log(long lba,int len, int mod)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun unsigned long long t;
83*4882a593Smuzhiyun unsigned long nanosec_rem;
84*4882a593Smuzhiyun t = cpu_clock(UINT_MAX);
85*4882a593Smuzhiyun nanosec_rem = do_div(t, 1000000000);
86*4882a593Smuzhiyun if(mod)
87*4882a593Smuzhiyun ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] W %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len);
88*4882a593Smuzhiyun else
89*4882a593Smuzhiyun ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] R %d %d \n",(unsigned long) t, nanosec_rem / 1000,lba,len);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
trac_logs(char * s)92*4882a593Smuzhiyun void trac_logs(char *s)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun unsigned long long t;
95*4882a593Smuzhiyun unsigned long nanosec_rem;
96*4882a593Smuzhiyun t = cpu_clock(UINT_MAX);
97*4882a593Smuzhiyun nanosec_rem = do_div(t, 1000000000);
98*4882a593Smuzhiyun ptrac_buf += sprintf(ptrac_buf,"[%5lu.%06lu] %s\n",(unsigned long) t, nanosec_rem / 1000,s);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
rkNand_trac_read(char * page,char ** start,off_t off,int count,int * eof,void * data)101*4882a593Smuzhiyun static int rkNand_trac_read(char *page, char **start, off_t off, int count, int *eof,
102*4882a593Smuzhiyun void *data)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun char *p = page;
105*4882a593Smuzhiyun int len;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun len = ptrac_buf - grknand_trac_buf - off;
108*4882a593Smuzhiyun //printk("rkNand_trac_read: page=%x,off=%x,count=%x ,len=%x \n",(int)page,(int)off,count,len);
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun if (len < 0)
111*4882a593Smuzhiyun len = 0;
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun if(len > count)
114*4882a593Smuzhiyun len = count;
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun memcpy(p,grknand_trac_buf + off,len);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun *eof = (len < count) ? 1 : 0;
119*4882a593Smuzhiyun *start = page;
120*4882a593Smuzhiyun if(len < count)
121*4882a593Smuzhiyun ptrac_buf = grknand_trac_buf;
122*4882a593Smuzhiyun return len;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun #endif
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define DATA_LEN (1024*8*2/4) //���ݿ鵥λword
128*4882a593Smuzhiyun #define SPARE_LEN (32*8*2/4) //У�����ݳ���
129*4882a593Smuzhiyun #define PAGE_LEN (DATA_LEN+SPARE_LEN) //ÿ�����ݵ�λ�ij���
130*4882a593Smuzhiyun #define MAX_BUFFER_SIZE (long)(2048 * 8) //sector
131*4882a593Smuzhiyun //long grknand_buf[MAX_BUFFER_SIZE * 512/4] __attribute__((aligned(4096)));
132*4882a593Smuzhiyun //long grknand_dma_buf[PAGE_LEN*4*5] __attribute__((aligned(4096)));
133*4882a593Smuzhiyun static struct proc_dir_entry *my_proc_entry;
134*4882a593Smuzhiyun extern int rkNand_proc_ftlread(char *page);
135*4882a593Smuzhiyun extern int rkNand_proc_bufread(char *page);
rkNand_proc_read(char * page,char ** start,off_t offset,int count,int * eof,void * data)136*4882a593Smuzhiyun static int rkNand_proc_read(char *page,
137*4882a593Smuzhiyun char **start,
138*4882a593Smuzhiyun off_t offset, int count, int *eof, void *data)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun char *buf = page;
141*4882a593Smuzhiyun int step = offset;
142*4882a593Smuzhiyun *(int *)start = 1;
143*4882a593Smuzhiyun if(step == 0)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun buf += sprintf(buf, "%s\n", rknand_base_version);
146*4882a593Smuzhiyun if(gpNandInfo->proc_ftlread)
147*4882a593Smuzhiyun buf += gpNandInfo->proc_ftlread(buf);
148*4882a593Smuzhiyun if(gpNandInfo->proc_bufread)
149*4882a593Smuzhiyun buf += gpNandInfo->proc_bufread(buf);
150*4882a593Smuzhiyun #ifdef RKNAND_TRAC_EN
151*4882a593Smuzhiyun buf += sprintf(buf, "trac data len:%d\n", ptrac_buf - grknand_trac_buf);
152*4882a593Smuzhiyun #endif
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun return buf - page < count ? buf - page : count;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun #if 0// (LINUX_VERSION_CODE < KERNEL_VERSION(3, 10, 0))
158*4882a593Smuzhiyun static void rknand_create_procfs(void)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun /* Install the proc_fs entry */
161*4882a593Smuzhiyun my_proc_entry = create_proc_entry("rknand",
162*4882a593Smuzhiyun S_IRUGO | S_IFREG,
163*4882a593Smuzhiyun NANDPROC_ROOT);
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (my_proc_entry) {
166*4882a593Smuzhiyun my_proc_entry->write_proc = NULL;
167*4882a593Smuzhiyun my_proc_entry->read_proc = rkNand_proc_read;
168*4882a593Smuzhiyun my_proc_entry->data = NULL;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun #ifdef RKNAND_TRAC_EN
171*4882a593Smuzhiyun /* Install the proc_fs entry */
172*4882a593Smuzhiyun my_trac_proc_entry = create_proc_entry("rknand_trac",
173*4882a593Smuzhiyun S_IRUGO | S_IFREG,
174*4882a593Smuzhiyun NANDPROC_ROOT);
175*4882a593Smuzhiyun if (my_trac_proc_entry) {
176*4882a593Smuzhiyun my_trac_proc_entry->write_proc = NULL;
177*4882a593Smuzhiyun my_trac_proc_entry->read_proc = rkNand_trac_read;
178*4882a593Smuzhiyun my_trac_proc_entry->data = NULL;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun #endif
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun #else
183*4882a593Smuzhiyun static const struct file_operations my_proc_fops = {
184*4882a593Smuzhiyun .owner = THIS_MODULE,
185*4882a593Smuzhiyun .read = rkNand_proc_read,
186*4882a593Smuzhiyun .write = NULL,
187*4882a593Smuzhiyun };
188*4882a593Smuzhiyun
rknand_create_procfs(void)189*4882a593Smuzhiyun static void rknand_create_procfs(void)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun /* Install the proc_fs entry */
192*4882a593Smuzhiyun my_proc_entry = proc_create("rknand",
193*4882a593Smuzhiyun S_IRUGO | S_IFREG,
194*4882a593Smuzhiyun NANDPROC_ROOT,&my_proc_fops);
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun #endif
printk_write_log(long lba,int len,const u_char * pbuf)197*4882a593Smuzhiyun void printk_write_log(long lba,int len, const u_char *pbuf)
198*4882a593Smuzhiyun {
199*4882a593Smuzhiyun char debug_buf[100];
200*4882a593Smuzhiyun int i;
201*4882a593Smuzhiyun for(i=0;i<len;i++)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun sprintf(debug_buf,"%lx :",lba+i);
204*4882a593Smuzhiyun print_hex_dump(KERN_WARNING, debug_buf, DUMP_PREFIX_NONE, 16,4, &pbuf[512*i], 8, 0);
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
rknand_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)208*4882a593Smuzhiyun static int rknand_read(struct mtd_info *mtd, loff_t from, size_t len,
209*4882a593Smuzhiyun size_t *retlen, u_char *buf)
210*4882a593Smuzhiyun {
211*4882a593Smuzhiyun int ret = 0;
212*4882a593Smuzhiyun int sector = len>>9;
213*4882a593Smuzhiyun int LBA = (int)(from>>9);
214*4882a593Smuzhiyun #ifdef RKNAND_TRAC_EN
215*4882a593Smuzhiyun //trac_log(LBA,sector,0);
216*4882a593Smuzhiyun #endif
217*4882a593Smuzhiyun //printk("R %d %d \n",(int)LBA,sector);
218*4882a593Smuzhiyun //if(rknand_debug)
219*4882a593Smuzhiyun // printk("rk28xxnand_read: from=%x,sector=%x,\n",(int)LBA,sector);
220*4882a593Smuzhiyun if(sector && gpNandInfo->ftl_read)
221*4882a593Smuzhiyun {
222*4882a593Smuzhiyun ret = gpNandInfo->ftl_read(LBA, sector, buf);
223*4882a593Smuzhiyun if(ret)
224*4882a593Smuzhiyun *retlen = 0;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun return ret;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
rknand_write(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,const u_char * buf)229*4882a593Smuzhiyun static int rknand_write(struct mtd_info *mtd, loff_t from, size_t len,
230*4882a593Smuzhiyun size_t *retlen, const u_char *buf)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun int ret = 0;
233*4882a593Smuzhiyun int sector = len>>9;
234*4882a593Smuzhiyun int LBA = (int)(from>>9);
235*4882a593Smuzhiyun #ifdef RKNAND_TRAC_EN
236*4882a593Smuzhiyun trac_log(LBA,sector,1);
237*4882a593Smuzhiyun #endif
238*4882a593Smuzhiyun //printk("W %d %d \n",(int)LBA,sector);
239*4882a593Smuzhiyun //return 0;
240*4882a593Smuzhiyun //printk("*");
241*4882a593Smuzhiyun //if(rknand_debug)
242*4882a593Smuzhiyun // printk(KERN_NOTICE "write: from=%lx,sector=%x\n",(int)LBA,sector);
243*4882a593Smuzhiyun //printk_write_log(LBA,sector,buf);
244*4882a593Smuzhiyun if(sector && gpNandInfo->ftl_write)// cmy
245*4882a593Smuzhiyun {
246*4882a593Smuzhiyun if(LBA < SysImageWriteEndAdd)//0x4E000)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun //NAND_DEBUG(NAND_DEBUG_LEVEL0,">>> FtlWriteImage: LBA=0x%08X sector=%d\n",LBA, sector);
249*4882a593Smuzhiyun ret = gpNandInfo->ftl_write(LBA, sector, (void *)buf,1);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun else
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun ret = gpNandInfo->ftl_write(LBA, sector, (void *)buf,0);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun *retlen = len;
257*4882a593Smuzhiyun return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
rknand_diacard(struct mtd_info * mtd,loff_t from,size_t len)260*4882a593Smuzhiyun static int rknand_diacard(struct mtd_info *mtd, loff_t from, size_t len)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun int ret = 0;
263*4882a593Smuzhiyun int sector = len>>9;
264*4882a593Smuzhiyun int LBA = (int)(from>>9);
265*4882a593Smuzhiyun //printk("rknand_diacard: from=%x,sector=%x,\n",(int)LBA,sector);
266*4882a593Smuzhiyun if(sector && gpNandInfo->ftl_discard)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun ret = gpNandInfo->ftl_discard(LBA, sector);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun return ret;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
rknand_erase(struct mtd_info * mtd,struct erase_info * instr)273*4882a593Smuzhiyun static int rknand_erase(struct mtd_info *mtd, struct erase_info *instr)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun int ret = 0;
276*4882a593Smuzhiyun if (instr->callback)
277*4882a593Smuzhiyun instr->callback(instr);
278*4882a593Smuzhiyun return ret;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun
rknand_sync(struct mtd_info * mtd)281*4882a593Smuzhiyun static void rknand_sync(struct mtd_info *mtd)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk_nand_sync: \n");
284*4882a593Smuzhiyun if(gpNandInfo->ftl_sync)
285*4882a593Smuzhiyun gpNandInfo->ftl_sync();
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun extern void FtlWriteCacheEn(int);
rknand_panic_write(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)289*4882a593Smuzhiyun static int rknand_panic_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun int sector = len >> 9;
292*4882a593Smuzhiyun int LBA = (int)(to >> 9);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun if (sector && gpNandInfo->ftl_write_panic) {
295*4882a593Smuzhiyun if(gpNandInfo->ftl_cache_en)
296*4882a593Smuzhiyun gpNandInfo->ftl_cache_en(0);
297*4882a593Smuzhiyun gpNandInfo->ftl_write_panic(LBA, sector, (void *)buf);
298*4882a593Smuzhiyun if(gpNandInfo->ftl_cache_en)
299*4882a593Smuzhiyun gpNandInfo->ftl_cache_en(1);
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun *retlen = len;
302*4882a593Smuzhiyun return 0;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun
GetIdBlockSysData(char * buf,int Sector)306*4882a593Smuzhiyun int GetIdBlockSysData(char * buf, int Sector)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun if(gpNandInfo->GetIdBlockSysData)
309*4882a593Smuzhiyun return( gpNandInfo->GetIdBlockSysData( buf, Sector));
310*4882a593Smuzhiyun return 0;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
GetSNSectorInfoBeforeNandInit(char * pbuf)313*4882a593Smuzhiyun char GetSNSectorInfoBeforeNandInit(char * pbuf)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun char * sn_addr = ioremap(0x10501600,0x200);
316*4882a593Smuzhiyun memcpy(pbuf,sn_addr,0x200);
317*4882a593Smuzhiyun iounmap(sn_addr);
318*4882a593Smuzhiyun //print_hex_dump(KERN_WARNING, "sn:", DUMP_PREFIX_NONE, 16,1, sn_addr, 16, 0);
319*4882a593Smuzhiyun return 0;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
GetSNSectorInfo(char * pbuf)322*4882a593Smuzhiyun char GetSNSectorInfo(char * pbuf)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun if(gpNandInfo->GetSNSectorInfo)
325*4882a593Smuzhiyun return( gpNandInfo->GetSNSectorInfo( pbuf));
326*4882a593Smuzhiyun else
327*4882a593Smuzhiyun return GetSNSectorInfoBeforeNandInit(pbuf);
328*4882a593Smuzhiyun return 0;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun
GetVendor0InfoBeforeNandInit(char * pbuf)332*4882a593Smuzhiyun char GetVendor0InfoBeforeNandInit(char * pbuf)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun char * sn_addr = ioremap(0x10501400,0x200);
335*4882a593Smuzhiyun memcpy(pbuf,sn_addr + 8,504);
336*4882a593Smuzhiyun iounmap(sn_addr);
337*4882a593Smuzhiyun //print_hex_dump(KERN_WARNING, "sn:", DUMP_PREFIX_NONE, 16,1, sn_addr, 16, 0);
338*4882a593Smuzhiyun return 0;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
GetChipSectorInfo(char * pbuf)341*4882a593Smuzhiyun char GetChipSectorInfo(char * pbuf)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun if(gpNandInfo->GetChipSectorInfo)
344*4882a593Smuzhiyun return( gpNandInfo->GetChipSectorInfo( pbuf));
345*4882a593Smuzhiyun return 0;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
GetParamterInfo(char * pbuf,int len)348*4882a593Smuzhiyun int GetParamterInfo(char * pbuf , int len)
349*4882a593Smuzhiyun {
350*4882a593Smuzhiyun int ret = -1;
351*4882a593Smuzhiyun int sector = (len)>>9;
352*4882a593Smuzhiyun int LBA = 0;
353*4882a593Smuzhiyun if(sector && gpNandInfo->ftl_read)
354*4882a593Smuzhiyun {
355*4882a593Smuzhiyun ret = gpNandInfo->ftl_read(LBA, sector, pbuf);
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun return ret?-1:(sector<<9);
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
GetflashDataByLba(int lba,char * pbuf,int len)360*4882a593Smuzhiyun int GetflashDataByLba(int lba,char * pbuf , int len)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun int ret = -1;
363*4882a593Smuzhiyun int sector = (len)>>9;
364*4882a593Smuzhiyun int LBA = lba;
365*4882a593Smuzhiyun if(sector && gpNandInfo->ftl_read)
366*4882a593Smuzhiyun {
367*4882a593Smuzhiyun ret = gpNandInfo->ftl_read(LBA, sector, pbuf);
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun return ret?-1:(sector<<9);
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun
rknand_dev_cache_flush(void)372*4882a593Smuzhiyun void rknand_dev_cache_flush(void)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun if(gpNandInfo->rknand_dev_cache_flush)
375*4882a593Smuzhiyun gpNandInfo->rknand_dev_cache_flush();
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun
rknand_block_isbad(struct mtd_info * mtd,loff_t ofs)379*4882a593Smuzhiyun static int rknand_block_isbad(struct mtd_info *mtd, loff_t ofs)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun return 0;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
rknand_block_markbad(struct mtd_info * mtd,loff_t ofs)384*4882a593Smuzhiyun static int rknand_block_markbad(struct mtd_info *mtd, loff_t ofs)
385*4882a593Smuzhiyun {
386*4882a593Smuzhiyun return 0;
387*4882a593Smuzhiyun }
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun static struct clk *nandc_clk;
391*4882a593Smuzhiyun static unsigned long nandc_clk_rate = 0;
392*4882a593Smuzhiyun static struct notifier_block nandc_freq_transition;
393*4882a593Smuzhiyun /* cpufreq driver support */
rknand_nand_timing_cfg(void)394*4882a593Smuzhiyun static int rknand_nand_timing_cfg(void)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun unsigned long newclk;
397*4882a593Smuzhiyun newclk = clk_get_rate(nandc_clk);
398*4882a593Smuzhiyun //printk("rknand_nand_timing_cfg %d",newclk);
399*4882a593Smuzhiyun if (newclk != nandc_clk_rate)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun if(gpNandInfo->nand_timing_config)
402*4882a593Smuzhiyun {
403*4882a593Smuzhiyun nandc_clk_rate = newclk;
404*4882a593Smuzhiyun //gpNandInfo->nand_timing_config( nandc_clk_rate / 1000); // KHz
405*4882a593Smuzhiyun }
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun return 0;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
rknand_info_init(struct rknand_info * nand_info)410*4882a593Smuzhiyun static int rknand_info_init(struct rknand_info *nand_info)
411*4882a593Smuzhiyun {
412*4882a593Smuzhiyun struct mtd_info *mtd = &rknand_mtd;
413*4882a593Smuzhiyun struct rknand_chip *rknand = &nand_info->rknand;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun rknand->state = FL_READY;
416*4882a593Smuzhiyun rknand->rknand_schedule_enable = 1;
417*4882a593Smuzhiyun rknand->pFlashCallBack = NULL;
418*4882a593Smuzhiyun init_waitqueue_head(&rknand->wq);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun mtd->oobsize = 0;
421*4882a593Smuzhiyun mtd->oobavail = 0;
422*4882a593Smuzhiyun mtd->ecclayout = 0;
423*4882a593Smuzhiyun mtd->erasesize = 32*0x200;
424*4882a593Smuzhiyun mtd->writesize = 8*0x200;
425*4882a593Smuzhiyun
426*4882a593Smuzhiyun // Fill in remaining MTD driver data
427*4882a593Smuzhiyun mtd->type = MTD_NANDFLASH;
428*4882a593Smuzhiyun mtd->flags = (MTD_WRITEABLE|MTD_NO_ERASE);//
429*4882a593Smuzhiyun mtd->_erase = rknand_erase;
430*4882a593Smuzhiyun mtd->_point = NULL;
431*4882a593Smuzhiyun mtd->_unpoint = NULL;
432*4882a593Smuzhiyun mtd->_read = rknand_read;
433*4882a593Smuzhiyun mtd->_write = rknand_write;
434*4882a593Smuzhiyun //mtd->discard = rknand_diacard;
435*4882a593Smuzhiyun mtd->_read_oob = NULL;
436*4882a593Smuzhiyun mtd->_write_oob = NULL;
437*4882a593Smuzhiyun mtd->_panic_write = rknand_panic_write;
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun mtd->_sync = rknand_sync;
440*4882a593Smuzhiyun mtd->_lock = NULL;
441*4882a593Smuzhiyun mtd->_unlock = NULL;
442*4882a593Smuzhiyun mtd->_suspend = NULL;
443*4882a593Smuzhiyun mtd->_resume = NULL;
444*4882a593Smuzhiyun mtd->_block_isbad = rknand_block_isbad;
445*4882a593Smuzhiyun mtd->_block_markbad = rknand_block_markbad;
446*4882a593Smuzhiyun mtd->owner = THIS_MODULE;
447*4882a593Smuzhiyun return 0;
448*4882a593Smuzhiyun }
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun /*
452*4882a593Smuzhiyun * CMY: �����˶������з�����Ϣ��֧��
453*4882a593Smuzhiyun * ��cmdline���ṩ������Ϣ����ʹ��cmdline�ķ�����Ϣ���з���
454*4882a593Smuzhiyun * ��cmdlineû���ṩ������Ϣ����ʹ��Ĭ�ϵķ�����Ϣ(rk28_partition_info)���з���
455*4882a593Smuzhiyun */
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun #ifdef CONFIG_MTD_CMDLINE_PARTS
458*4882a593Smuzhiyun const char *part_probes[] = { "cmdlinepart", NULL };
459*4882a593Smuzhiyun #endif
460*4882a593Smuzhiyun
rknand_add_partitions(struct rknand_info * nand_info)461*4882a593Smuzhiyun static int rknand_add_partitions(struct rknand_info *nand_info)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun #ifdef CONFIG_MTD_CMDLINE_PARTS
464*4882a593Smuzhiyun int num_partitions = 0;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun // �������н�����������Ϣ
467*4882a593Smuzhiyun num_partitions = parse_mtd_partitions(&(rknand_mtd), part_probes, &rknand_parts, 0);
468*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"num_partitions = %d\n",num_partitions);
469*4882a593Smuzhiyun printk("num_partitions = %d\n",num_partitions);
470*4882a593Smuzhiyun if(num_partitions > 0) {
471*4882a593Smuzhiyun int i;
472*4882a593Smuzhiyun for (i = 0; i < num_partitions; i++)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun rknand_parts[i].offset *= 0x200;
475*4882a593Smuzhiyun rknand_parts[i].size *=0x200;
476*4882a593Smuzhiyun }
477*4882a593Smuzhiyun rknand_parts[num_partitions - 1].size = rknand_mtd.size - rknand_parts[num_partitions - 1].offset;
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun g_num_partitions = num_partitions;
480*4882a593Smuzhiyun //#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 0, 0))
481*4882a593Smuzhiyun // return mtd_device_register(&rknand_mtd, rknand_parts, num_partitions);
482*4882a593Smuzhiyun //#else
483*4882a593Smuzhiyun return add_mtd_partitions(&(rknand_mtd), rknand_parts, num_partitions);
484*4882a593Smuzhiyun //#endif
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun #endif
487*4882a593Smuzhiyun g_num_partitions = 0;
488*4882a593Smuzhiyun return 0;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun
add_rknand_device(struct rknand_info * prknand_Info)491*4882a593Smuzhiyun int add_rknand_device(struct rknand_info * prknand_Info)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun struct mtd_partition *parts;
494*4882a593Smuzhiyun int i;
495*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"add_rknand_device: \n");
496*4882a593Smuzhiyun printk("gpNandInfo->nandCapacity = %lx\n",gpNandInfo->nandCapacity);
497*4882a593Smuzhiyun rknand_mtd.size = (uint64_t)gpNandInfo->nandCapacity*0x200;
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun rknand_add_partitions(prknand_Info);
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun parts = rknand_parts;
502*4882a593Smuzhiyun SysImageWriteEndAdd = 0;
503*4882a593Smuzhiyun for(i=0;i<g_num_partitions;i++)
504*4882a593Smuzhiyun {
505*4882a593Smuzhiyun //printk(">>> part[%d]: name=%s offset=0x%012llx\n", i, parts[i].name, parts[i].offset);
506*4882a593Smuzhiyun if(strcmp(parts[i].name,"backup") == 0)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun SysImageWriteEndAdd = (unsigned long)(parts[i].offset + parts[i].size)>>9;//sector
509*4882a593Smuzhiyun //printk(">>> SysImageWriteEndAdd=0x%lx\n", SysImageWriteEndAdd);
510*4882a593Smuzhiyun break;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun if(SysImageWriteEndAdd)
514*4882a593Smuzhiyun gpNandInfo->SysImageWriteEndAdd = SysImageWriteEndAdd;
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun //nandc_clk = clk_get(NULL, "nandc");
517*4882a593Smuzhiyun //clk_enable(nandc_clk);
518*4882a593Smuzhiyun //rknand_nand_timing_cfg();
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun return 0;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
get_rknand_device(struct rknand_info ** prknand_Info)523*4882a593Smuzhiyun int get_rknand_device(struct rknand_info ** prknand_Info)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun *prknand_Info = gpNandInfo;
526*4882a593Smuzhiyun return 0;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun
529*4882a593Smuzhiyun EXPORT_SYMBOL(get_rknand_device);
530*4882a593Smuzhiyun
rknand_dma_map_single(unsigned long ptr,int size,int dir)531*4882a593Smuzhiyun int rknand_dma_map_single(unsigned long ptr,int size,int dir)
532*4882a593Smuzhiyun {
533*4882a593Smuzhiyun return dma_map_single(NULL, ptr,size, dir?DMA_TO_DEVICE:DMA_FROM_DEVICE);
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun EXPORT_SYMBOL(rknand_dma_map_single);
536*4882a593Smuzhiyun
rknand_dma_unmap_single(unsigned long ptr,int size,int dir)537*4882a593Smuzhiyun void rknand_dma_unmap_single(unsigned long ptr,int size,int dir)
538*4882a593Smuzhiyun {
539*4882a593Smuzhiyun dma_unmap_single(NULL, ptr,size, dir?DMA_TO_DEVICE:DMA_FROM_DEVICE);
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun EXPORT_SYMBOL(rknand_dma_unmap_single);
542*4882a593Smuzhiyun
rknand_flash_cs_init(void)543*4882a593Smuzhiyun int rknand_flash_cs_init(void)
544*4882a593Smuzhiyun {
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun }
547*4882a593Smuzhiyun EXPORT_SYMBOL(rknand_flash_cs_init);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun
rknand_get_reg_addr(int * pNandc,int * pSDMMC0,int * pSDMMC1,int * pSDMMC2)550*4882a593Smuzhiyun int rknand_get_reg_addr(int *pNandc,int *pSDMMC0,int *pSDMMC1,int *pSDMMC2)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun //*pNandc = ioremap(RK30_NANDC_PHYS,RK30_NANDC_SIZE);
553*4882a593Smuzhiyun //*pSDMMC0 = ioremap(SDMMC0_BASE_ADDR, 0x4000);
554*4882a593Smuzhiyun //*pSDMMC1 = ioremap(SDMMC1_BASE_ADDR, 0x4000);
555*4882a593Smuzhiyun //*pSDMMC2 = ioremap(EMMC_BASE_ADDR, 0x4000);
556*4882a593Smuzhiyun *pNandc = ioremap(0x10500000,0x4000);
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun EXPORT_SYMBOL(rknand_get_reg_addr);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun static int g_nandc_irq = 27;
rknand_nandc_irq_init(int mode,void * pfun)561*4882a593Smuzhiyun int rknand_nandc_irq_init(int mode,void * pfun)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun int ret = 0;
564*4882a593Smuzhiyun if(mode) //init
565*4882a593Smuzhiyun {
566*4882a593Smuzhiyun ret = request_irq(g_nandc_irq, pfun, 0, "nandc", NULL);
567*4882a593Smuzhiyun if(ret)
568*4882a593Smuzhiyun printk("request IRQ_NANDC irq , ret=%x.........\n", ret);
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun else //deinit
571*4882a593Smuzhiyun {
572*4882a593Smuzhiyun free_irq(g_nandc_irq, NULL);
573*4882a593Smuzhiyun }
574*4882a593Smuzhiyun return ret;
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun EXPORT_SYMBOL(rknand_nandc_irq_init);
rknand_probe(struct platform_device * pdev)577*4882a593Smuzhiyun static int rknand_probe(struct platform_device *pdev)
578*4882a593Smuzhiyun {
579*4882a593Smuzhiyun struct rknand_info *nand_info;
580*4882a593Smuzhiyun int err = 0;
581*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"rk_nand_probe: \n");
582*4882a593Smuzhiyun gpNandInfo = kzalloc(sizeof(struct rknand_info), GFP_KERNEL);
583*4882a593Smuzhiyun if (!gpNandInfo)
584*4882a593Smuzhiyun return -ENOMEM;
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun nand_info = gpNandInfo;
587*4882a593Smuzhiyun printk("rknand_probe: \n");
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun g_nandc_irq = platform_get_irq(pdev, 0);
590*4882a593Smuzhiyun if (g_nandc_irq < 0) {
591*4882a593Smuzhiyun dev_err(&pdev->dev, "no irq resource?\n");
592*4882a593Smuzhiyun return g_nandc_irq;
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun memset(gpNandInfo,0,sizeof(struct rknand_info));
596*4882a593Smuzhiyun
597*4882a593Smuzhiyun gpNandInfo->bufSize = MAX_BUFFER_SIZE * 512;
598*4882a593Smuzhiyun gpNandInfo->pbuf = (char *)NULL;//grknand_buf;
599*4882a593Smuzhiyun gpNandInfo->pdmaBuf = (char *)NULL;//grknand_dma_buf;
600*4882a593Smuzhiyun //printk(" gpNandInfo->pdmaBuf=0x%x\n", gpNandInfo->pdmaBuf);
601*4882a593Smuzhiyun #ifdef CONFIG_MTD_EMMC_CLK_POWER_SAVE
602*4882a593Smuzhiyun gpNandInfo->emmc_clk_power_save_en = 1;
603*4882a593Smuzhiyun #endif
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun rknand_mtd.name = DRIVER_NAME;//dev_name(&pdev->dev);
606*4882a593Smuzhiyun rknand_mtd.priv = &nand_info->rknand;
607*4882a593Smuzhiyun rknand_mtd.owner = THIS_MODULE;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun if(rknand_info_init(nand_info))
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun err = -ENXIO;
612*4882a593Smuzhiyun goto exit_free;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun nand_info->add_rknand_device = add_rknand_device;
616*4882a593Smuzhiyun nand_info->get_rknand_device = get_rknand_device;
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun rknand_create_procfs();
619*4882a593Smuzhiyun return 0;
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun exit_free:
622*4882a593Smuzhiyun if(nand_info)
623*4882a593Smuzhiyun kfree(nand_info);
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun return err;
626*4882a593Smuzhiyun }
627*4882a593Smuzhiyun
rknand_suspend(struct platform_device * pdev,pm_message_t state)628*4882a593Smuzhiyun static int rknand_suspend(struct platform_device *pdev, pm_message_t state)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun gpNandInfo->rknand.rknand_schedule_enable = 0;
631*4882a593Smuzhiyun // if(gpNandInfo->rknand_suspend)
632*4882a593Smuzhiyun // gpNandInfo->rknand_suspend();
633*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_suspend: \n");
634*4882a593Smuzhiyun return 0;
635*4882a593Smuzhiyun }
636*4882a593Smuzhiyun
rknand_resume(struct platform_device * pdev)637*4882a593Smuzhiyun static int rknand_resume(struct platform_device *pdev)
638*4882a593Smuzhiyun {
639*4882a593Smuzhiyun //if(gpNandInfo->rknand_resume)
640*4882a593Smuzhiyun // gpNandInfo->rknand_resume();
641*4882a593Smuzhiyun gpNandInfo->rknand.rknand_schedule_enable = 1;
642*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_resume: \n");
643*4882a593Smuzhiyun return 0;
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun
rknand_shutdown(struct platform_device * pdev)646*4882a593Smuzhiyun void rknand_shutdown(struct platform_device *pdev)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun printk("rknand_shutdown...\n");
649*4882a593Smuzhiyun gpNandInfo->rknand.rknand_schedule_enable = 0;
650*4882a593Smuzhiyun if(gpNandInfo->rknand_buffer_shutdown)
651*4882a593Smuzhiyun gpNandInfo->rknand_buffer_shutdown();
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun #ifdef CONFIG_OF
655*4882a593Smuzhiyun static const struct of_device_id of_rk_nandc_match[] = {
656*4882a593Smuzhiyun { .compatible = "rockchip,rk-nandc" },
657*4882a593Smuzhiyun { /* Sentinel */ }
658*4882a593Smuzhiyun };
659*4882a593Smuzhiyun #endif
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun static struct platform_driver rknand_driver = {
662*4882a593Smuzhiyun .probe = rknand_probe,
663*4882a593Smuzhiyun .suspend = rknand_suspend,
664*4882a593Smuzhiyun .resume = rknand_resume,
665*4882a593Smuzhiyun .shutdown = rknand_shutdown,
666*4882a593Smuzhiyun .driver = {
667*4882a593Smuzhiyun .name = DRIVER_NAME,
668*4882a593Smuzhiyun #ifdef CONFIG_OF
669*4882a593Smuzhiyun .of_match_table = of_rk_nandc_match,
670*4882a593Smuzhiyun #endif
671*4882a593Smuzhiyun .owner = THIS_MODULE,
672*4882a593Smuzhiyun },
673*4882a593Smuzhiyun };
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun MODULE_ALIAS(DRIVER_NAME);
677*4882a593Smuzhiyun
rknand_init(void)678*4882a593Smuzhiyun static int __init rknand_init(void)
679*4882a593Smuzhiyun {
680*4882a593Smuzhiyun int ret;
681*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"rknand_init: \n");
682*4882a593Smuzhiyun ret = platform_driver_register(&rknand_driver);
683*4882a593Smuzhiyun NAND_DEBUG(NAND_DEBUG_LEVEL0,"platform_driver_register:ret = %x \n",ret);
684*4882a593Smuzhiyun return ret;
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun
rknand_exit(void)687*4882a593Smuzhiyun static void __exit rknand_exit(void)
688*4882a593Smuzhiyun {
689*4882a593Smuzhiyun platform_driver_unregister(&rknand_driver);
690*4882a593Smuzhiyun }
691*4882a593Smuzhiyun
692*4882a593Smuzhiyun module_init(rknand_init);
693*4882a593Smuzhiyun module_exit(rknand_exit);
694*4882a593Smuzhiyun
695*4882a593Smuzhiyun MODULE_LICENSE("GPL");
696*4882a593Smuzhiyun MODULE_AUTHOR("ZYF <zyf@rock-chips.com>");
697*4882a593Smuzhiyun MODULE_DESCRIPTION("rknand driver.");
698*4882a593Smuzhiyun
699*4882a593Smuzhiyun
700