xref: /OK3568_Linux_fs/kernel/drivers/mtd/nand/spi/fmsh.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Authors:
6*4882a593Smuzhiyun  *	Dingqiang Lin <jon.lin@rock-chips.com>
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/device.h>
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/mtd/spinand.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define SPINAND_MFR_FMSH		0xA1
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(read_cache_variants,
16*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
17*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
18*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
19*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
20*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
21*4882a593Smuzhiyun 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(write_cache_variants,
24*4882a593Smuzhiyun 		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
25*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(true, 0, NULL, 0));
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun static SPINAND_OP_VARIANTS(update_cache_variants,
28*4882a593Smuzhiyun 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
29*4882a593Smuzhiyun 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
30*4882a593Smuzhiyun 
fm25s01a_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)31*4882a593Smuzhiyun static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section,
32*4882a593Smuzhiyun 				  struct mtd_oob_region *region)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun 	return -ERANGE;
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun 
fm25s01a_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)37*4882a593Smuzhiyun static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section,
38*4882a593Smuzhiyun 				   struct mtd_oob_region *region)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	if (section)
41*4882a593Smuzhiyun 		return -ERANGE;
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	region->offset = 2;
44*4882a593Smuzhiyun 	region->length = 62;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	return 0;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun static const struct mtd_ooblayout_ops fm25s01a_ooblayout = {
50*4882a593Smuzhiyun 	.ecc = fm25s01a_ooblayout_ecc,
51*4882a593Smuzhiyun 	.free = fm25s01a_ooblayout_free,
52*4882a593Smuzhiyun };
53*4882a593Smuzhiyun 
fm25s01_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * region)54*4882a593Smuzhiyun static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section,
55*4882a593Smuzhiyun 				 struct mtd_oob_region *region)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun 	if (section)
58*4882a593Smuzhiyun 		return -ERANGE;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	region->offset = 64;
61*4882a593Smuzhiyun 	region->length = 64;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	return 0;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
fm25s01_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * region)66*4882a593Smuzhiyun static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section,
67*4882a593Smuzhiyun 				  struct mtd_oob_region *region)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	if (section)
70*4882a593Smuzhiyun 		return -ERANGE;
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	region->offset = 2;
73*4882a593Smuzhiyun 	region->length = 62;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun static const struct mtd_ooblayout_ops fm25s01_ooblayout = {
79*4882a593Smuzhiyun 	.ecc = fm25s01_ooblayout_ecc,
80*4882a593Smuzhiyun 	.free = fm25s01_ooblayout_free,
81*4882a593Smuzhiyun };
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /*
84*4882a593Smuzhiyun  * ecc bits: 0xC0[4,6]
85*4882a593Smuzhiyun  * [0b000], No bit errors were detected;
86*4882a593Smuzhiyun  * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not
87*4882a593Smuzhiyun  *	reach Flipping Bits;
88*4882a593Smuzhiyun  * [0b101], Bit error count equals the bit flip
89*4882a593Smuzhiyun  *	detection threshold
90*4882a593Smuzhiyun  * [0b010], Multiple bit errors were detected and
91*4882a593Smuzhiyun  *	not corrected.
92*4882a593Smuzhiyun  * others, Reserved.
93*4882a593Smuzhiyun  */
fm25s01bi3_ecc_ecc_get_status(struct spinand_device * spinand,u8 status)94*4882a593Smuzhiyun static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand,
95*4882a593Smuzhiyun 					u8 status)
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun 	struct nand_device *nand = spinand_to_nand(spinand);
98*4882a593Smuzhiyun 	u8 eccsr = (status & GENMASK(6, 4)) >> 4;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	if (eccsr <= 1 || eccsr == 3)
101*4882a593Smuzhiyun 		return eccsr;
102*4882a593Smuzhiyun 	else if (eccsr == 5)
103*4882a593Smuzhiyun 		return nanddev_get_ecc_requirements(nand)->strength;
104*4882a593Smuzhiyun 	else
105*4882a593Smuzhiyun 		return -EBADMSG;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static const struct spinand_info fmsh_spinand_table[] = {
109*4882a593Smuzhiyun 	SPINAND_INFO("FM25S01A",
110*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
111*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
112*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
113*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
114*4882a593Smuzhiyun 					      &write_cache_variants,
115*4882a593Smuzhiyun 					      &update_cache_variants),
116*4882a593Smuzhiyun 		     0,
117*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
118*4882a593Smuzhiyun 	SPINAND_INFO("FM25S02A",
119*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5),
120*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
121*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
122*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
123*4882a593Smuzhiyun 					      &write_cache_variants,
124*4882a593Smuzhiyun 					      &update_cache_variants),
125*4882a593Smuzhiyun 		     SPINAND_HAS_QE_BIT,
126*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
127*4882a593Smuzhiyun 	SPINAND_INFO("FM25S01",
128*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
129*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
130*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
131*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
132*4882a593Smuzhiyun 					      &write_cache_variants,
133*4882a593Smuzhiyun 					      &update_cache_variants),
134*4882a593Smuzhiyun 		     0,
135*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
136*4882a593Smuzhiyun 	SPINAND_INFO("FM25LS01",
137*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5),
138*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
139*4882a593Smuzhiyun 		     NAND_ECCREQ(1, 512),
140*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
141*4882a593Smuzhiyun 					      &write_cache_variants,
142*4882a593Smuzhiyun 					      &update_cache_variants),
143*4882a593Smuzhiyun 		     0,
144*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)),
145*4882a593Smuzhiyun 	SPINAND_INFO("FM25S01BI3",
146*4882a593Smuzhiyun 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
147*4882a593Smuzhiyun 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
148*4882a593Smuzhiyun 		     NAND_ECCREQ(8, 512),
149*4882a593Smuzhiyun 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
150*4882a593Smuzhiyun 					      &write_cache_variants,
151*4882a593Smuzhiyun 					      &update_cache_variants),
152*4882a593Smuzhiyun 		     SPINAND_HAS_QE_BIT,
153*4882a593Smuzhiyun 		     SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)),
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {
157*4882a593Smuzhiyun };
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun const struct spinand_manufacturer fmsh_spinand_manufacturer = {
160*4882a593Smuzhiyun 	.id = SPINAND_MFR_FMSH,
161*4882a593Smuzhiyun 	.name = "FMSH",
162*4882a593Smuzhiyun 	.chips = fmsh_spinand_table,
163*4882a593Smuzhiyun 	.nchips = ARRAY_SIZE(fmsh_spinand_table),
164*4882a593Smuzhiyun 	.ops = &fmsh_spinand_manuf_ops,
165*4882a593Smuzhiyun };
166