1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (C) 2017 Free Electrons 4*4882a593Smuzhiyun * Copyright (C) 2017 NextThing Co 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Author: Boris Brezillon <boris.brezillon@free-electrons.com> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "internals.h" 10*4882a593Smuzhiyun samsung_nand_decode_id(struct nand_chip * chip)11*4882a593Smuzhiyunstatic void samsung_nand_decode_id(struct nand_chip *chip) 12*4882a593Smuzhiyun { 13*4882a593Smuzhiyun struct nand_device *base = &chip->base; 14*4882a593Smuzhiyun struct nand_ecc_props requirements = {}; 15*4882a593Smuzhiyun struct mtd_info *mtd = nand_to_mtd(chip); 16*4882a593Smuzhiyun struct nand_memory_organization *memorg; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun memorg = nanddev_get_memorg(&chip->base); 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* New Samsung (6 byte ID): Samsung K9GAG08U0F (p.44) */ 21*4882a593Smuzhiyun if (chip->id.len == 6 && !nand_is_slc(chip) && 22*4882a593Smuzhiyun chip->id.data[5] != 0x00) { 23*4882a593Smuzhiyun u8 extid = chip->id.data[3]; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /* Get pagesize */ 26*4882a593Smuzhiyun memorg->pagesize = 2048 << (extid & 0x03); 27*4882a593Smuzhiyun mtd->writesize = memorg->pagesize; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun extid >>= 2; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun /* Get oobsize */ 32*4882a593Smuzhiyun switch (((extid >> 2) & 0x4) | (extid & 0x3)) { 33*4882a593Smuzhiyun case 1: 34*4882a593Smuzhiyun memorg->oobsize = 128; 35*4882a593Smuzhiyun break; 36*4882a593Smuzhiyun case 2: 37*4882a593Smuzhiyun memorg->oobsize = 218; 38*4882a593Smuzhiyun break; 39*4882a593Smuzhiyun case 3: 40*4882a593Smuzhiyun memorg->oobsize = 400; 41*4882a593Smuzhiyun break; 42*4882a593Smuzhiyun case 4: 43*4882a593Smuzhiyun memorg->oobsize = 436; 44*4882a593Smuzhiyun break; 45*4882a593Smuzhiyun case 5: 46*4882a593Smuzhiyun memorg->oobsize = 512; 47*4882a593Smuzhiyun break; 48*4882a593Smuzhiyun case 6: 49*4882a593Smuzhiyun memorg->oobsize = 640; 50*4882a593Smuzhiyun break; 51*4882a593Smuzhiyun default: 52*4882a593Smuzhiyun /* 53*4882a593Smuzhiyun * We should never reach this case, but if that 54*4882a593Smuzhiyun * happens, this probably means Samsung decided to use 55*4882a593Smuzhiyun * a different extended ID format, and we should find 56*4882a593Smuzhiyun * a way to support it. 57*4882a593Smuzhiyun */ 58*4882a593Smuzhiyun WARN(1, "Invalid OOB size value"); 59*4882a593Smuzhiyun break; 60*4882a593Smuzhiyun } 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun mtd->oobsize = memorg->oobsize; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun /* Get blocksize */ 65*4882a593Smuzhiyun extid >>= 2; 66*4882a593Smuzhiyun memorg->pages_per_eraseblock = (128 * 1024) << 67*4882a593Smuzhiyun (((extid >> 1) & 0x04) | 68*4882a593Smuzhiyun (extid & 0x03)) / 69*4882a593Smuzhiyun memorg->pagesize; 70*4882a593Smuzhiyun mtd->erasesize = (128 * 1024) << 71*4882a593Smuzhiyun (((extid >> 1) & 0x04) | (extid & 0x03)); 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* Extract ECC requirements from 5th id byte*/ 74*4882a593Smuzhiyun extid = (chip->id.data[4] >> 4) & 0x07; 75*4882a593Smuzhiyun if (extid < 5) { 76*4882a593Smuzhiyun requirements.step_size = 512; 77*4882a593Smuzhiyun requirements.strength = 1 << extid; 78*4882a593Smuzhiyun } else { 79*4882a593Smuzhiyun requirements.step_size = 1024; 80*4882a593Smuzhiyun switch (extid) { 81*4882a593Smuzhiyun case 5: 82*4882a593Smuzhiyun requirements.strength = 24; 83*4882a593Smuzhiyun break; 84*4882a593Smuzhiyun case 6: 85*4882a593Smuzhiyun requirements.strength = 40; 86*4882a593Smuzhiyun break; 87*4882a593Smuzhiyun case 7: 88*4882a593Smuzhiyun requirements.strength = 60; 89*4882a593Smuzhiyun break; 90*4882a593Smuzhiyun default: 91*4882a593Smuzhiyun WARN(1, "Could not decode ECC info"); 92*4882a593Smuzhiyun requirements.step_size = 0; 93*4882a593Smuzhiyun } 94*4882a593Smuzhiyun } 95*4882a593Smuzhiyun } else { 96*4882a593Smuzhiyun nand_decode_ext_id(chip); 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun if (nand_is_slc(chip)) { 99*4882a593Smuzhiyun switch (chip->id.data[1]) { 100*4882a593Smuzhiyun /* K9F4G08U0D-S[I|C]B0(T00) */ 101*4882a593Smuzhiyun case 0xDC: 102*4882a593Smuzhiyun requirements.step_size = 512; 103*4882a593Smuzhiyun requirements.strength = 1; 104*4882a593Smuzhiyun break; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun /* K9F1G08U0E 21nm chips do not support subpage write */ 107*4882a593Smuzhiyun case 0xF1: 108*4882a593Smuzhiyun if (chip->id.len > 4 && 109*4882a593Smuzhiyun (chip->id.data[4] & GENMASK(1, 0)) == 0x1) 110*4882a593Smuzhiyun chip->options |= NAND_NO_SUBPAGE_WRITE; 111*4882a593Smuzhiyun break; 112*4882a593Smuzhiyun default: 113*4882a593Smuzhiyun break; 114*4882a593Smuzhiyun } 115*4882a593Smuzhiyun } 116*4882a593Smuzhiyun } 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun nanddev_set_ecc_requirements(base, &requirements); 119*4882a593Smuzhiyun } 120*4882a593Smuzhiyun samsung_nand_init(struct nand_chip * chip)121*4882a593Smuzhiyunstatic int samsung_nand_init(struct nand_chip *chip) 122*4882a593Smuzhiyun { 123*4882a593Smuzhiyun struct mtd_info *mtd = nand_to_mtd(chip); 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun if (mtd->writesize > 512) 126*4882a593Smuzhiyun chip->options |= NAND_SAMSUNG_LP_OPTIONS; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun if (!nand_is_slc(chip)) 129*4882a593Smuzhiyun chip->options |= NAND_BBM_LASTPAGE; 130*4882a593Smuzhiyun else 131*4882a593Smuzhiyun chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun return 0; 134*4882a593Smuzhiyun } 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun const struct nand_manufacturer_ops samsung_nand_manuf_ops = { 137*4882a593Smuzhiyun .detect = samsung_nand_decode_id, 138*4882a593Smuzhiyun .init = samsung_nand_init, 139*4882a593Smuzhiyun }; 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