1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 OR MIT */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * MTK SDG1 ECC controller 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (c) 2016 Mediatek 6*4882a593Smuzhiyun * Authors: Xiaolei Li <xiaolei.li@mediatek.com> 7*4882a593Smuzhiyun * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> 8*4882a593Smuzhiyun */ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef __DRIVERS_MTD_NAND_MTK_ECC_H__ 11*4882a593Smuzhiyun #define __DRIVERS_MTD_NAND_MTK_ECC_H__ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #include <linux/types.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun enum mtk_ecc_mode {ECC_DMA_MODE = 0, ECC_NFI_MODE = 1}; 16*4882a593Smuzhiyun enum mtk_ecc_operation {ECC_ENCODE, ECC_DECODE}; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct device_node; 19*4882a593Smuzhiyun struct mtk_ecc; 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun struct mtk_ecc_stats { 22*4882a593Smuzhiyun u32 corrected; 23*4882a593Smuzhiyun u32 bitflips; 24*4882a593Smuzhiyun u32 failed; 25*4882a593Smuzhiyun }; 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun struct mtk_ecc_config { 28*4882a593Smuzhiyun enum mtk_ecc_operation op; 29*4882a593Smuzhiyun enum mtk_ecc_mode mode; 30*4882a593Smuzhiyun dma_addr_t addr; 31*4882a593Smuzhiyun u32 strength; 32*4882a593Smuzhiyun u32 sectors; 33*4882a593Smuzhiyun u32 len; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun int mtk_ecc_encode(struct mtk_ecc *, struct mtk_ecc_config *, u8 *, u32); 37*4882a593Smuzhiyun void mtk_ecc_get_stats(struct mtk_ecc *, struct mtk_ecc_stats *, int); 38*4882a593Smuzhiyun int mtk_ecc_wait_done(struct mtk_ecc *, enum mtk_ecc_operation); 39*4882a593Smuzhiyun int mtk_ecc_enable(struct mtk_ecc *, struct mtk_ecc_config *); 40*4882a593Smuzhiyun void mtk_ecc_disable(struct mtk_ecc *); 41*4882a593Smuzhiyun void mtk_ecc_adjust_strength(struct mtk_ecc *ecc, u32 *p); 42*4882a593Smuzhiyun unsigned int mtk_ecc_get_parity_bits(struct mtk_ecc *ecc); 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun struct mtk_ecc *of_mtk_ecc_get(struct device_node *); 45*4882a593Smuzhiyun void mtk_ecc_release(struct mtk_ecc *); 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #endif 48