xref: /OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/internals.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2018 - Bootlin
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Header containing internal definitions to be used only by core files.
8*4882a593Smuzhiyun  * NAND controller drivers should not include this file.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef __LINUX_RAWNAND_INTERNALS
12*4882a593Smuzhiyun #define __LINUX_RAWNAND_INTERNALS
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/mtd/rawnand.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun /*
17*4882a593Smuzhiyun  * NAND Flash Manufacturer ID Codes
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun #define NAND_MFR_AMD		0x01
20*4882a593Smuzhiyun #define NAND_MFR_ATO		0x9b
21*4882a593Smuzhiyun #define NAND_MFR_EON		0x92
22*4882a593Smuzhiyun #define NAND_MFR_ESMT		0xc8
23*4882a593Smuzhiyun #define NAND_MFR_FUJITSU	0x04
24*4882a593Smuzhiyun #define NAND_MFR_HYNIX		0xad
25*4882a593Smuzhiyun #define NAND_MFR_INTEL		0x89
26*4882a593Smuzhiyun #define NAND_MFR_MACRONIX	0xc2
27*4882a593Smuzhiyun #define NAND_MFR_MICRON		0x2c
28*4882a593Smuzhiyun #define NAND_MFR_NATIONAL	0x8f
29*4882a593Smuzhiyun #define NAND_MFR_RENESAS	0x07
30*4882a593Smuzhiyun #define NAND_MFR_SAMSUNG	0xec
31*4882a593Smuzhiyun #define NAND_MFR_SANDISK	0x45
32*4882a593Smuzhiyun #define NAND_MFR_STMICRO	0x20
33*4882a593Smuzhiyun /* Kioxia is new name of Toshiba memory. */
34*4882a593Smuzhiyun #define NAND_MFR_TOSHIBA	0x98
35*4882a593Smuzhiyun #define NAND_MFR_WINBOND	0xef
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun /**
38*4882a593Smuzhiyun  * struct nand_manufacturer_ops - NAND Manufacturer operations
39*4882a593Smuzhiyun  * @detect: detect the NAND memory organization and capabilities
40*4882a593Smuzhiyun  * @init: initialize all vendor specific fields (like the ->read_retry()
41*4882a593Smuzhiyun  *	  implementation) if any.
42*4882a593Smuzhiyun  * @cleanup: the ->init() function may have allocated resources, ->cleanup()
43*4882a593Smuzhiyun  *	     is here to let vendor specific code release those resources.
44*4882a593Smuzhiyun  * @fixup_onfi_param_page: apply vendor specific fixups to the ONFI parameter
45*4882a593Smuzhiyun  *			   page. This is called after the checksum is verified.
46*4882a593Smuzhiyun  */
47*4882a593Smuzhiyun struct nand_manufacturer_ops {
48*4882a593Smuzhiyun 	void (*detect)(struct nand_chip *chip);
49*4882a593Smuzhiyun 	int (*init)(struct nand_chip *chip);
50*4882a593Smuzhiyun 	void (*cleanup)(struct nand_chip *chip);
51*4882a593Smuzhiyun 	void (*fixup_onfi_param_page)(struct nand_chip *chip,
52*4882a593Smuzhiyun 				      struct nand_onfi_params *p);
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /**
56*4882a593Smuzhiyun  * struct nand_manufacturer_desc - NAND Flash Manufacturer descriptor
57*4882a593Smuzhiyun  * @name: Manufacturer name
58*4882a593Smuzhiyun  * @id: manufacturer ID code of device.
59*4882a593Smuzhiyun  * @ops: manufacturer operations
60*4882a593Smuzhiyun  */
61*4882a593Smuzhiyun struct nand_manufacturer_desc {
62*4882a593Smuzhiyun 	int id;
63*4882a593Smuzhiyun 	char *name;
64*4882a593Smuzhiyun 	const struct nand_manufacturer_ops *ops;
65*4882a593Smuzhiyun };
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun extern struct nand_flash_dev nand_flash_ids[];
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
71*4882a593Smuzhiyun extern const struct nand_manufacturer_ops esmt_nand_manuf_ops;
72*4882a593Smuzhiyun extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
73*4882a593Smuzhiyun extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
74*4882a593Smuzhiyun extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
75*4882a593Smuzhiyun extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
76*4882a593Smuzhiyun extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* MLC pairing schemes */
79*4882a593Smuzhiyun extern const struct mtd_pairing_scheme dist3_pairing_scheme;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun /* Core functions */
82*4882a593Smuzhiyun const struct nand_manufacturer_desc *nand_get_manufacturer_desc(u8 id);
83*4882a593Smuzhiyun int nand_bbm_get_next_page(struct nand_chip *chip, int page);
84*4882a593Smuzhiyun int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs);
85*4882a593Smuzhiyun int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
86*4882a593Smuzhiyun 		    int allowbbt);
87*4882a593Smuzhiyun void onfi_fill_interface_config(struct nand_chip *chip,
88*4882a593Smuzhiyun 				struct nand_interface_config *iface,
89*4882a593Smuzhiyun 				enum nand_interface_type type,
90*4882a593Smuzhiyun 				unsigned int timing_mode);
91*4882a593Smuzhiyun unsigned int
92*4882a593Smuzhiyun onfi_find_closest_sdr_mode(const struct nand_sdr_timings *spec_timings);
93*4882a593Smuzhiyun int nand_choose_best_sdr_timings(struct nand_chip *chip,
94*4882a593Smuzhiyun 				 struct nand_interface_config *iface,
95*4882a593Smuzhiyun 				 struct nand_sdr_timings *spec_timings);
96*4882a593Smuzhiyun const struct nand_interface_config *nand_get_reset_interface_config(void);
97*4882a593Smuzhiyun int nand_get_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
98*4882a593Smuzhiyun int nand_set_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
99*4882a593Smuzhiyun int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,
100*4882a593Smuzhiyun 			       int oob_required, int page);
101*4882a593Smuzhiyun int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf,
102*4882a593Smuzhiyun 				int oob_required, int page);
103*4882a593Smuzhiyun int nand_exit_status_op(struct nand_chip *chip);
104*4882a593Smuzhiyun int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
105*4882a593Smuzhiyun 			    unsigned int len);
106*4882a593Smuzhiyun void nand_decode_ext_id(struct nand_chip *chip);
107*4882a593Smuzhiyun void panic_nand_wait(struct nand_chip *chip, unsigned long timeo);
108*4882a593Smuzhiyun void sanitize_string(uint8_t *s, size_t len);
109*4882a593Smuzhiyun 
nand_has_exec_op(struct nand_chip * chip)110*4882a593Smuzhiyun static inline bool nand_has_exec_op(struct nand_chip *chip)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	if (!chip->controller || !chip->controller->ops ||
113*4882a593Smuzhiyun 	    !chip->controller->ops->exec_op)
114*4882a593Smuzhiyun 		return false;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	return true;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun 
nand_check_op(struct nand_chip * chip,const struct nand_operation * op)119*4882a593Smuzhiyun static inline int nand_check_op(struct nand_chip *chip,
120*4882a593Smuzhiyun 				const struct nand_operation *op)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	if (!nand_has_exec_op(chip))
123*4882a593Smuzhiyun 		return 0;
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	return chip->controller->ops->exec_op(chip, op, true);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun 
nand_exec_op(struct nand_chip * chip,const struct nand_operation * op)128*4882a593Smuzhiyun static inline int nand_exec_op(struct nand_chip *chip,
129*4882a593Smuzhiyun 			       const struct nand_operation *op)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	if (!nand_has_exec_op(chip))
132*4882a593Smuzhiyun 		return -ENOTSUPP;
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	if (WARN_ON(op->cs >= nanddev_ntargets(&chip->base)))
135*4882a593Smuzhiyun 		return -EINVAL;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	return chip->controller->ops->exec_op(chip, op, false);
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun 
nand_controller_can_setup_interface(struct nand_chip * chip)140*4882a593Smuzhiyun static inline bool nand_controller_can_setup_interface(struct nand_chip *chip)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	if (!chip->controller || !chip->controller->ops ||
143*4882a593Smuzhiyun 	    !chip->controller->ops->setup_interface)
144*4882a593Smuzhiyun 		return false;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	if (chip->options & NAND_KEEP_TIMINGS)
147*4882a593Smuzhiyun 		return false;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	return true;
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun /* BBT functions */
153*4882a593Smuzhiyun int nand_markbad_bbt(struct nand_chip *chip, loff_t offs);
154*4882a593Smuzhiyun int nand_isreserved_bbt(struct nand_chip *chip, loff_t offs);
155*4882a593Smuzhiyun int nand_isbad_bbt(struct nand_chip *chip, loff_t offs, int allowbbt);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /* Legacy */
158*4882a593Smuzhiyun void nand_legacy_set_defaults(struct nand_chip *chip);
159*4882a593Smuzhiyun void nand_legacy_adjust_cmdfunc(struct nand_chip *chip);
160*4882a593Smuzhiyun int nand_legacy_check_hooks(struct nand_chip *chip);
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun /* ONFI functions */
163*4882a593Smuzhiyun u16 onfi_crc16(u16 crc, u8 const *p, size_t len);
164*4882a593Smuzhiyun int nand_onfi_detect(struct nand_chip *chip);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun /* JEDEC functions */
167*4882a593Smuzhiyun int nand_jedec_detect(struct nand_chip *chip);
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #endif /* __LINUX_RAWNAND_INTERNALS */
170