1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0+ */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Freescale GPMI NAND Flash Driver 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. 6*4882a593Smuzhiyun * Copyright (C) 2008 Embedded Alley Solutions, Inc. 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H 9*4882a593Smuzhiyun #define __DRIVERS_MTD_NAND_GPMI_NAND_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/mtd/rawnand.h> 12*4882a593Smuzhiyun #include <linux/platform_device.h> 13*4882a593Smuzhiyun #include <linux/dma-mapping.h> 14*4882a593Smuzhiyun #include <linux/dmaengine.h> 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun #define GPMI_CLK_MAX 5 /* MX6Q needs five clocks */ 17*4882a593Smuzhiyun struct resources { 18*4882a593Smuzhiyun void __iomem *gpmi_regs; 19*4882a593Smuzhiyun void __iomem *bch_regs; 20*4882a593Smuzhiyun unsigned int dma_low_channel; 21*4882a593Smuzhiyun unsigned int dma_high_channel; 22*4882a593Smuzhiyun struct clk *clock[GPMI_CLK_MAX]; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun /** 26*4882a593Smuzhiyun * struct bch_geometry - BCH geometry description. 27*4882a593Smuzhiyun * @gf_len: The length of Galois Field. (e.g., 13 or 14) 28*4882a593Smuzhiyun * @ecc_strength: A number that describes the strength of the ECC 29*4882a593Smuzhiyun * algorithm. 30*4882a593Smuzhiyun * @page_size: The size, in bytes, of a physical page, including 31*4882a593Smuzhiyun * both data and OOB. 32*4882a593Smuzhiyun * @metadata_size: The size, in bytes, of the metadata. 33*4882a593Smuzhiyun * @ecc_chunk_size: The size, in bytes, of a single ECC chunk. Note 34*4882a593Smuzhiyun * the first chunk in the page includes both data and 35*4882a593Smuzhiyun * metadata, so it's a bit larger than this value. 36*4882a593Smuzhiyun * @ecc_chunk_count: The number of ECC chunks in the page, 37*4882a593Smuzhiyun * @payload_size: The size, in bytes, of the payload buffer. 38*4882a593Smuzhiyun * @auxiliary_size: The size, in bytes, of the auxiliary buffer. 39*4882a593Smuzhiyun * @auxiliary_status_offset: The offset into the auxiliary buffer at which 40*4882a593Smuzhiyun * the ECC status appears. 41*4882a593Smuzhiyun * @block_mark_byte_offset: The byte offset in the ECC-based page view at 42*4882a593Smuzhiyun * which the underlying physical block mark appears. 43*4882a593Smuzhiyun * @block_mark_bit_offset: The bit offset into the ECC-based page view at 44*4882a593Smuzhiyun * which the underlying physical block mark appears. 45*4882a593Smuzhiyun */ 46*4882a593Smuzhiyun struct bch_geometry { 47*4882a593Smuzhiyun unsigned int gf_len; 48*4882a593Smuzhiyun unsigned int ecc_strength; 49*4882a593Smuzhiyun unsigned int page_size; 50*4882a593Smuzhiyun unsigned int metadata_size; 51*4882a593Smuzhiyun unsigned int ecc_chunk_size; 52*4882a593Smuzhiyun unsigned int ecc_chunk_count; 53*4882a593Smuzhiyun unsigned int payload_size; 54*4882a593Smuzhiyun unsigned int auxiliary_size; 55*4882a593Smuzhiyun unsigned int auxiliary_status_offset; 56*4882a593Smuzhiyun unsigned int block_mark_byte_offset; 57*4882a593Smuzhiyun unsigned int block_mark_bit_offset; 58*4882a593Smuzhiyun }; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /** 61*4882a593Smuzhiyun * struct boot_rom_geometry - Boot ROM geometry description. 62*4882a593Smuzhiyun * @stride_size_in_pages: The size of a boot block stride, in pages. 63*4882a593Smuzhiyun * @search_area_stride_exponent: The logarithm to base 2 of the size of a 64*4882a593Smuzhiyun * search area in boot block strides. 65*4882a593Smuzhiyun */ 66*4882a593Smuzhiyun struct boot_rom_geometry { 67*4882a593Smuzhiyun unsigned int stride_size_in_pages; 68*4882a593Smuzhiyun unsigned int search_area_stride_exponent; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun enum gpmi_type { 72*4882a593Smuzhiyun IS_MX23, 73*4882a593Smuzhiyun IS_MX28, 74*4882a593Smuzhiyun IS_MX6Q, 75*4882a593Smuzhiyun IS_MX6SX, 76*4882a593Smuzhiyun IS_MX7D, 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun struct gpmi_devdata { 80*4882a593Smuzhiyun enum gpmi_type type; 81*4882a593Smuzhiyun int bch_max_ecc_strength; 82*4882a593Smuzhiyun int max_chain_delay; /* See the async EDO mode */ 83*4882a593Smuzhiyun const char * const *clks; 84*4882a593Smuzhiyun const int clks_count; 85*4882a593Smuzhiyun }; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /** 88*4882a593Smuzhiyun * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters. 89*4882a593Smuzhiyun * @must_apply_timings: Whether controller timings have already been 90*4882a593Smuzhiyun * applied or not (useful only while there is 91*4882a593Smuzhiyun * support for only one chip select) 92*4882a593Smuzhiyun * @clk_rate: The clock rate that must be used to derive the 93*4882a593Smuzhiyun * following parameters 94*4882a593Smuzhiyun * @timing0: HW_GPMI_TIMING0 register 95*4882a593Smuzhiyun * @timing1: HW_GPMI_TIMING1 register 96*4882a593Smuzhiyun * @ctrl1n: HW_GPMI_CTRL1n register 97*4882a593Smuzhiyun */ 98*4882a593Smuzhiyun struct gpmi_nfc_hardware_timing { 99*4882a593Smuzhiyun bool must_apply_timings; 100*4882a593Smuzhiyun unsigned long int clk_rate; 101*4882a593Smuzhiyun u32 timing0; 102*4882a593Smuzhiyun u32 timing1; 103*4882a593Smuzhiyun u32 ctrl1n; 104*4882a593Smuzhiyun }; 105*4882a593Smuzhiyun 106*4882a593Smuzhiyun #define GPMI_MAX_TRANSFERS 8 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun struct gpmi_transfer { 109*4882a593Smuzhiyun u8 cmdbuf[8]; 110*4882a593Smuzhiyun struct scatterlist sgl; 111*4882a593Smuzhiyun enum dma_data_direction direction; 112*4882a593Smuzhiyun }; 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun struct gpmi_nand_data { 115*4882a593Smuzhiyun /* Devdata */ 116*4882a593Smuzhiyun const struct gpmi_devdata *devdata; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* System Interface */ 119*4882a593Smuzhiyun struct device *dev; 120*4882a593Smuzhiyun struct platform_device *pdev; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun /* Resources */ 123*4882a593Smuzhiyun struct resources resources; 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun /* Flash Hardware */ 126*4882a593Smuzhiyun struct gpmi_nfc_hardware_timing hw; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun /* BCH */ 129*4882a593Smuzhiyun struct bch_geometry bch_geometry; 130*4882a593Smuzhiyun struct completion bch_done; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun /* NAND Boot issue */ 133*4882a593Smuzhiyun bool swap_block_mark; 134*4882a593Smuzhiyun struct boot_rom_geometry rom_geometry; 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun /* MTD / NAND */ 137*4882a593Smuzhiyun struct nand_controller base; 138*4882a593Smuzhiyun struct nand_chip nand; 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun struct gpmi_transfer transfers[GPMI_MAX_TRANSFERS]; 141*4882a593Smuzhiyun int ntransfers; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun bool bch; 144*4882a593Smuzhiyun uint32_t bch_flashlayout0; 145*4882a593Smuzhiyun uint32_t bch_flashlayout1; 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun char *data_buffer_dma; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun void *auxiliary_virt; 150*4882a593Smuzhiyun dma_addr_t auxiliary_phys; 151*4882a593Smuzhiyun 152*4882a593Smuzhiyun void *raw_buffer; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun /* DMA channels */ 155*4882a593Smuzhiyun #define DMA_CHANS 8 156*4882a593Smuzhiyun struct dma_chan *dma_chans[DMA_CHANS]; 157*4882a593Smuzhiyun struct completion dma_done; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun /* BCH : Status Block Completion Codes */ 161*4882a593Smuzhiyun #define STATUS_GOOD 0x00 162*4882a593Smuzhiyun #define STATUS_ERASED 0xff 163*4882a593Smuzhiyun #define STATUS_UNCORRECTABLE 0xfe 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun /* Use the devdata to distinguish different Archs. */ 166*4882a593Smuzhiyun #define GPMI_IS_MX23(x) ((x)->devdata->type == IS_MX23) 167*4882a593Smuzhiyun #define GPMI_IS_MX28(x) ((x)->devdata->type == IS_MX28) 168*4882a593Smuzhiyun #define GPMI_IS_MX6Q(x) ((x)->devdata->type == IS_MX6Q) 169*4882a593Smuzhiyun #define GPMI_IS_MX6SX(x) ((x)->devdata->type == IS_MX6SX) 170*4882a593Smuzhiyun #define GPMI_IS_MX7D(x) ((x)->devdata->type == IS_MX7D) 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun #define GPMI_IS_MX6(x) (GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || \ 173*4882a593Smuzhiyun GPMI_IS_MX7D(x)) 174*4882a593Smuzhiyun #define GPMI_IS_MXS(x) (GPMI_IS_MX23(x) || GPMI_IS_MX28(x)) 175*4882a593Smuzhiyun #endif 176