1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright © 2015 Broadcom Corporation
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef __BRCMNAND_H__
7*4882a593Smuzhiyun #define __BRCMNAND_H__
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/types.h>
10*4882a593Smuzhiyun #include <linux/io.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun struct platform_device;
13*4882a593Smuzhiyun struct dev_pm_ops;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun struct brcmnand_soc {
16*4882a593Smuzhiyun bool (*ctlrdy_ack)(struct brcmnand_soc *soc);
17*4882a593Smuzhiyun void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en);
18*4882a593Smuzhiyun void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare,
19*4882a593Smuzhiyun bool is_param);
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun
brcmnand_soc_data_bus_prepare(struct brcmnand_soc * soc,bool is_param)22*4882a593Smuzhiyun static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc,
23*4882a593Smuzhiyun bool is_param)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun if (soc && soc->prepare_data_bus)
26*4882a593Smuzhiyun soc->prepare_data_bus(soc, true, is_param);
27*4882a593Smuzhiyun }
28*4882a593Smuzhiyun
brcmnand_soc_data_bus_unprepare(struct brcmnand_soc * soc,bool is_param)29*4882a593Smuzhiyun static inline void brcmnand_soc_data_bus_unprepare(struct brcmnand_soc *soc,
30*4882a593Smuzhiyun bool is_param)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun if (soc && soc->prepare_data_bus)
33*4882a593Smuzhiyun soc->prepare_data_bus(soc, false, is_param);
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
brcmnand_readl(void __iomem * addr)36*4882a593Smuzhiyun static inline u32 brcmnand_readl(void __iomem *addr)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun /*
39*4882a593Smuzhiyun * MIPS endianness is configured by boot strap, which also reverses all
40*4882a593Smuzhiyun * bus endianness (i.e., big-endian CPU + big endian bus ==> native
41*4882a593Smuzhiyun * endian I/O).
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * Other architectures (e.g., ARM) either do not support big endian, or
44*4882a593Smuzhiyun * else leave I/O in little endian mode.
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
47*4882a593Smuzhiyun return __raw_readl(addr);
48*4882a593Smuzhiyun else
49*4882a593Smuzhiyun return readl_relaxed(addr);
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
brcmnand_writel(u32 val,void __iomem * addr)52*4882a593Smuzhiyun static inline void brcmnand_writel(u32 val, void __iomem *addr)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun /* See brcmnand_readl() comments */
55*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_MIPS) && IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
56*4882a593Smuzhiyun __raw_writel(val, addr);
57*4882a593Smuzhiyun else
58*4882a593Smuzhiyun writel_relaxed(val, addr);
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc);
62*4882a593Smuzhiyun int brcmnand_remove(struct platform_device *pdev);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun extern const struct dev_pm_ops brcmnand_pm_ops;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #endif /* __BRCMNAND_H__ */
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