1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * OPAL PNOR flash MTD abstraction
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright IBM 2015
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/errno.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/of_address.h>
13*4882a593Smuzhiyun #include <linux/platform_device.h>
14*4882a593Smuzhiyun #include <linux/string.h>
15*4882a593Smuzhiyun #include <linux/slab.h>
16*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
17*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include <linux/debugfs.h>
20*4882a593Smuzhiyun #include <linux/seq_file.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include <asm/opal.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * This driver creates the a Linux MTD abstraction for platform PNOR flash
27*4882a593Smuzhiyun * backed by OPAL calls
28*4882a593Smuzhiyun */
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun struct powernv_flash {
31*4882a593Smuzhiyun struct mtd_info mtd;
32*4882a593Smuzhiyun u32 id;
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun enum flash_op {
36*4882a593Smuzhiyun FLASH_OP_READ,
37*4882a593Smuzhiyun FLASH_OP_WRITE,
38*4882a593Smuzhiyun FLASH_OP_ERASE,
39*4882a593Smuzhiyun };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun /*
42*4882a593Smuzhiyun * Don't return -ERESTARTSYS if we can't get a token, the MTD core
43*4882a593Smuzhiyun * might have split up the call from userspace and called into the
44*4882a593Smuzhiyun * driver more than once, we'll already have done some amount of work.
45*4882a593Smuzhiyun */
powernv_flash_async_op(struct mtd_info * mtd,enum flash_op op,loff_t offset,size_t len,size_t * retlen,u_char * buf)46*4882a593Smuzhiyun static int powernv_flash_async_op(struct mtd_info *mtd, enum flash_op op,
47*4882a593Smuzhiyun loff_t offset, size_t len, size_t *retlen, u_char *buf)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun struct powernv_flash *info = (struct powernv_flash *)mtd->priv;
50*4882a593Smuzhiyun struct device *dev = &mtd->dev;
51*4882a593Smuzhiyun int token;
52*4882a593Smuzhiyun struct opal_msg msg;
53*4882a593Smuzhiyun int rc;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun dev_dbg(dev, "%s(op=%d, offset=0x%llx, len=%zu)\n",
56*4882a593Smuzhiyun __func__, op, offset, len);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun token = opal_async_get_token_interruptible();
59*4882a593Smuzhiyun if (token < 0) {
60*4882a593Smuzhiyun if (token != -ERESTARTSYS)
61*4882a593Smuzhiyun dev_err(dev, "Failed to get an async token\n");
62*4882a593Smuzhiyun else
63*4882a593Smuzhiyun token = -EINTR;
64*4882a593Smuzhiyun return token;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun switch (op) {
68*4882a593Smuzhiyun case FLASH_OP_READ:
69*4882a593Smuzhiyun rc = opal_flash_read(info->id, offset, __pa(buf), len, token);
70*4882a593Smuzhiyun break;
71*4882a593Smuzhiyun case FLASH_OP_WRITE:
72*4882a593Smuzhiyun rc = opal_flash_write(info->id, offset, __pa(buf), len, token);
73*4882a593Smuzhiyun break;
74*4882a593Smuzhiyun case FLASH_OP_ERASE:
75*4882a593Smuzhiyun rc = opal_flash_erase(info->id, offset, len, token);
76*4882a593Smuzhiyun break;
77*4882a593Smuzhiyun default:
78*4882a593Smuzhiyun WARN_ON_ONCE(1);
79*4882a593Smuzhiyun opal_async_release_token(token);
80*4882a593Smuzhiyun return -EIO;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (rc == OPAL_ASYNC_COMPLETION) {
84*4882a593Smuzhiyun rc = opal_async_wait_response_interruptible(token, &msg);
85*4882a593Smuzhiyun if (rc) {
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun * If we return the mtd core will free the
88*4882a593Smuzhiyun * buffer we've just passed to OPAL but OPAL
89*4882a593Smuzhiyun * will continue to read or write from that
90*4882a593Smuzhiyun * memory.
91*4882a593Smuzhiyun * It may be tempting to ultimately return 0
92*4882a593Smuzhiyun * if we're doing a read or a write since we
93*4882a593Smuzhiyun * are going to end up waiting until OPAL is
94*4882a593Smuzhiyun * done. However, because the MTD core sends
95*4882a593Smuzhiyun * us the userspace request in chunks, we need
96*4882a593Smuzhiyun * it to know we've been interrupted.
97*4882a593Smuzhiyun */
98*4882a593Smuzhiyun rc = -EINTR;
99*4882a593Smuzhiyun if (opal_async_wait_response(token, &msg))
100*4882a593Smuzhiyun dev_err(dev, "opal_async_wait_response() failed\n");
101*4882a593Smuzhiyun goto out;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun rc = opal_get_async_rc(msg);
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /*
107*4882a593Smuzhiyun * OPAL does mutual exclusion on the flash, it will return
108*4882a593Smuzhiyun * OPAL_BUSY.
109*4882a593Smuzhiyun * During firmware updates by the service processor OPAL may
110*4882a593Smuzhiyun * be (temporarily) prevented from accessing the flash, in
111*4882a593Smuzhiyun * this case OPAL will also return OPAL_BUSY.
112*4882a593Smuzhiyun * Both cases aren't errors exactly but the flash could have
113*4882a593Smuzhiyun * changed, userspace should be informed.
114*4882a593Smuzhiyun */
115*4882a593Smuzhiyun if (rc != OPAL_SUCCESS && rc != OPAL_BUSY)
116*4882a593Smuzhiyun dev_err(dev, "opal_flash_async_op(op=%d) failed (rc %d)\n",
117*4882a593Smuzhiyun op, rc);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (rc == OPAL_SUCCESS && retlen)
120*4882a593Smuzhiyun *retlen = len;
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun rc = opal_error_code(rc);
123*4882a593Smuzhiyun out:
124*4882a593Smuzhiyun opal_async_release_token(token);
125*4882a593Smuzhiyun return rc;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /**
129*4882a593Smuzhiyun * @mtd: the device
130*4882a593Smuzhiyun * @from: the offset to read from
131*4882a593Smuzhiyun * @len: the number of bytes to read
132*4882a593Smuzhiyun * @retlen: the number of bytes actually read
133*4882a593Smuzhiyun * @buf: the filled in buffer
134*4882a593Smuzhiyun *
135*4882a593Smuzhiyun * Returns 0 if read successful, or -ERRNO if an error occurred
136*4882a593Smuzhiyun */
powernv_flash_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)137*4882a593Smuzhiyun static int powernv_flash_read(struct mtd_info *mtd, loff_t from, size_t len,
138*4882a593Smuzhiyun size_t *retlen, u_char *buf)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun return powernv_flash_async_op(mtd, FLASH_OP_READ, from,
141*4882a593Smuzhiyun len, retlen, buf);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /**
145*4882a593Smuzhiyun * @mtd: the device
146*4882a593Smuzhiyun * @to: the offset to write to
147*4882a593Smuzhiyun * @len: the number of bytes to write
148*4882a593Smuzhiyun * @retlen: the number of bytes actually written
149*4882a593Smuzhiyun * @buf: the buffer to get bytes from
150*4882a593Smuzhiyun *
151*4882a593Smuzhiyun * Returns 0 if write successful, -ERRNO if error occurred
152*4882a593Smuzhiyun */
powernv_flash_write(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)153*4882a593Smuzhiyun static int powernv_flash_write(struct mtd_info *mtd, loff_t to, size_t len,
154*4882a593Smuzhiyun size_t *retlen, const u_char *buf)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun return powernv_flash_async_op(mtd, FLASH_OP_WRITE, to,
157*4882a593Smuzhiyun len, retlen, (u_char *)buf);
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /**
161*4882a593Smuzhiyun * @mtd: the device
162*4882a593Smuzhiyun * @erase: the erase info
163*4882a593Smuzhiyun * Returns 0 if erase successful or -ERRNO if an error occurred
164*4882a593Smuzhiyun */
powernv_flash_erase(struct mtd_info * mtd,struct erase_info * erase)165*4882a593Smuzhiyun static int powernv_flash_erase(struct mtd_info *mtd, struct erase_info *erase)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun int rc;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun rc = powernv_flash_async_op(mtd, FLASH_OP_ERASE, erase->addr,
170*4882a593Smuzhiyun erase->len, NULL, NULL);
171*4882a593Smuzhiyun if (rc)
172*4882a593Smuzhiyun erase->fail_addr = erase->addr;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun return rc;
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /**
178*4882a593Smuzhiyun * powernv_flash_set_driver_info - Fill the mtd_info structure and docg3
179*4882a593Smuzhiyun * structure @pdev: The platform device
180*4882a593Smuzhiyun * @mtd: The structure to fill
181*4882a593Smuzhiyun */
powernv_flash_set_driver_info(struct device * dev,struct mtd_info * mtd)182*4882a593Smuzhiyun static int powernv_flash_set_driver_info(struct device *dev,
183*4882a593Smuzhiyun struct mtd_info *mtd)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun u64 size;
186*4882a593Smuzhiyun u32 erase_size;
187*4882a593Smuzhiyun int rc;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun rc = of_property_read_u32(dev->of_node, "ibm,flash-block-size",
190*4882a593Smuzhiyun &erase_size);
191*4882a593Smuzhiyun if (rc) {
192*4882a593Smuzhiyun dev_err(dev, "couldn't get resource block size information\n");
193*4882a593Smuzhiyun return rc;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun rc = of_property_read_u64(dev->of_node, "reg", &size);
197*4882a593Smuzhiyun if (rc) {
198*4882a593Smuzhiyun dev_err(dev, "couldn't get resource size information\n");
199*4882a593Smuzhiyun return rc;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun /*
203*4882a593Smuzhiyun * Going to have to check what details I need to set and how to
204*4882a593Smuzhiyun * get them
205*4882a593Smuzhiyun */
206*4882a593Smuzhiyun mtd->name = devm_kasprintf(dev, GFP_KERNEL, "%pOFP", dev->of_node);
207*4882a593Smuzhiyun mtd->type = MTD_NORFLASH;
208*4882a593Smuzhiyun mtd->flags = MTD_WRITEABLE;
209*4882a593Smuzhiyun mtd->size = size;
210*4882a593Smuzhiyun mtd->erasesize = erase_size;
211*4882a593Smuzhiyun mtd->writebufsize = mtd->writesize = 1;
212*4882a593Smuzhiyun mtd->owner = THIS_MODULE;
213*4882a593Smuzhiyun mtd->_erase = powernv_flash_erase;
214*4882a593Smuzhiyun mtd->_read = powernv_flash_read;
215*4882a593Smuzhiyun mtd->_write = powernv_flash_write;
216*4882a593Smuzhiyun mtd->dev.parent = dev;
217*4882a593Smuzhiyun mtd_set_of_node(mtd, dev->of_node);
218*4882a593Smuzhiyun return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun /**
222*4882a593Smuzhiyun * powernv_flash_probe
223*4882a593Smuzhiyun * @pdev: platform device
224*4882a593Smuzhiyun *
225*4882a593Smuzhiyun * Returns 0 on success, -ENOMEM, -ENXIO on error
226*4882a593Smuzhiyun */
powernv_flash_probe(struct platform_device * pdev)227*4882a593Smuzhiyun static int powernv_flash_probe(struct platform_device *pdev)
228*4882a593Smuzhiyun {
229*4882a593Smuzhiyun struct device *dev = &pdev->dev;
230*4882a593Smuzhiyun struct powernv_flash *data;
231*4882a593Smuzhiyun int ret;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
234*4882a593Smuzhiyun if (!data)
235*4882a593Smuzhiyun return -ENOMEM;
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun data->mtd.priv = data;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun ret = of_property_read_u32(dev->of_node, "ibm,opal-id", &(data->id));
240*4882a593Smuzhiyun if (ret) {
241*4882a593Smuzhiyun dev_err(dev, "no device property 'ibm,opal-id'\n");
242*4882a593Smuzhiyun return ret;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun ret = powernv_flash_set_driver_info(dev, &data->mtd);
246*4882a593Smuzhiyun if (ret)
247*4882a593Smuzhiyun return ret;
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun dev_set_drvdata(dev, data);
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun * The current flash that skiboot exposes is one contiguous flash chip
253*4882a593Smuzhiyun * with an ffs partition at the start, it should prove easier for users
254*4882a593Smuzhiyun * to deal with partitions or not as they see fit
255*4882a593Smuzhiyun */
256*4882a593Smuzhiyun return mtd_device_register(&data->mtd, NULL, 0);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /**
260*4882a593Smuzhiyun * op_release - Release the driver
261*4882a593Smuzhiyun * @pdev: the platform device
262*4882a593Smuzhiyun *
263*4882a593Smuzhiyun * Returns 0
264*4882a593Smuzhiyun */
powernv_flash_release(struct platform_device * pdev)265*4882a593Smuzhiyun static int powernv_flash_release(struct platform_device *pdev)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct powernv_flash *data = dev_get_drvdata(&(pdev->dev));
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* All resources should be freed automatically */
270*4882a593Smuzhiyun return mtd_device_unregister(&(data->mtd));
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun static const struct of_device_id powernv_flash_match[] = {
274*4882a593Smuzhiyun { .compatible = "ibm,opal-flash" },
275*4882a593Smuzhiyun {}
276*4882a593Smuzhiyun };
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun static struct platform_driver powernv_flash_driver = {
279*4882a593Smuzhiyun .driver = {
280*4882a593Smuzhiyun .name = "powernv_flash",
281*4882a593Smuzhiyun .of_match_table = powernv_flash_match,
282*4882a593Smuzhiyun },
283*4882a593Smuzhiyun .remove = powernv_flash_release,
284*4882a593Smuzhiyun .probe = powernv_flash_probe,
285*4882a593Smuzhiyun };
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun module_platform_driver(powernv_flash_driver);
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, powernv_flash_match);
290*4882a593Smuzhiyun MODULE_LICENSE("GPL");
291*4882a593Smuzhiyun MODULE_AUTHOR("Cyril Bur <cyril.bur@au1.ibm.com>");
292*4882a593Smuzhiyun MODULE_DESCRIPTION("MTD abstraction for OPAL flash");
293