xref: /OK3568_Linux_fs/kernel/drivers/mtd/devices/pmc551.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * PMC551 PCI Mezzanine Ram Device
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Author:
6*4882a593Smuzhiyun  *	Mark Ferrell <mferrell@mvista.com>
7*4882a593Smuzhiyun  *	Copyright 1999,2000 Nortel Networks
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Description:
10*4882a593Smuzhiyun  *	This driver is intended to support the PMC551 PCI Ram device
11*4882a593Smuzhiyun  *	from Ramix Inc.  The PMC551 is a PMC Mezzanine module for
12*4882a593Smuzhiyun  *	cPCI embedded systems.  The device contains a single SROM
13*4882a593Smuzhiyun  *	that initially programs the V370PDC chipset onboard the
14*4882a593Smuzhiyun  *	device, and various banks of DRAM/SDRAM onboard.  This driver
15*4882a593Smuzhiyun  *	implements this PCI Ram device as an MTD (Memory Technology
16*4882a593Smuzhiyun  *	Device) so that it can be used to hold a file system, or for
17*4882a593Smuzhiyun  *	added swap space in embedded systems.  Since the memory on
18*4882a593Smuzhiyun  *	this board isn't as fast as main memory we do not try to hook
19*4882a593Smuzhiyun  *	it into main memory as that would simply reduce performance
20*4882a593Smuzhiyun  *	on the system.  Using it as a block device allows us to use
21*4882a593Smuzhiyun  *	it as high speed swap or for a high speed disk device of some
22*4882a593Smuzhiyun  *	sort.  Which becomes very useful on diskless systems in the
23*4882a593Smuzhiyun  *	embedded market I might add.
24*4882a593Smuzhiyun  *
25*4882a593Smuzhiyun  * Notes:
26*4882a593Smuzhiyun  *	Due to what I assume is more buggy SROM, the 64M PMC551 I
27*4882a593Smuzhiyun  *	have available claims that all 4 of its DRAM banks have 64MiB
28*4882a593Smuzhiyun  *	of ram configured (making a grand total of 256MiB onboard).
29*4882a593Smuzhiyun  *	This is slightly annoying since the BAR0 size reflects the
30*4882a593Smuzhiyun  *	aperture size, not the dram size, and the V370PDC supplies no
31*4882a593Smuzhiyun  *	other method for memory size discovery.  This problem is
32*4882a593Smuzhiyun  *	mostly only relevant when compiled as a module, as the
33*4882a593Smuzhiyun  *	unloading of the module with an aperture size smaller than
34*4882a593Smuzhiyun  *	the ram will cause the driver to detect the onboard memory
35*4882a593Smuzhiyun  *	size to be equal to the aperture size when the module is
36*4882a593Smuzhiyun  *	reloaded.  Soooo, to help, the module supports an msize
37*4882a593Smuzhiyun  *	option to allow the specification of the onboard memory, and
38*4882a593Smuzhiyun  *	an asize option, to allow the specification of the aperture
39*4882a593Smuzhiyun  *	size.  The aperture must be equal to or less then the memory
40*4882a593Smuzhiyun  *	size, the driver will correct this if you screw it up.  This
41*4882a593Smuzhiyun  *	problem is not relevant for compiled in drivers as compiled
42*4882a593Smuzhiyun  *	in drivers only init once.
43*4882a593Smuzhiyun  *
44*4882a593Smuzhiyun  * Credits:
45*4882a593Smuzhiyun  *	Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
46*4882a593Smuzhiyun  *	initial example code of how to initialize this device and for
47*4882a593Smuzhiyun  *	help with questions I had concerning operation of the device.
48*4882a593Smuzhiyun  *
49*4882a593Smuzhiyun  *	Most of the MTD code for this driver was originally written
50*4882a593Smuzhiyun  *	for the slram.o module in the MTD drivers package which
51*4882a593Smuzhiyun  *	allows the mapping of system memory into an MTD device.
52*4882a593Smuzhiyun  *	Since the PMC551 memory module is accessed in the same
53*4882a593Smuzhiyun  *	fashion as system memory, the slram.c code became a very nice
54*4882a593Smuzhiyun  *	fit to the needs of this driver.  All we added was PCI
55*4882a593Smuzhiyun  *	detection/initialization to the driver and automatically figure
56*4882a593Smuzhiyun  *	out the size via the PCI detection.o, later changes by Corey
57*4882a593Smuzhiyun  *	Minyard set up the card to utilize a 1M sliding apature.
58*4882a593Smuzhiyun  *
59*4882a593Smuzhiyun  *	Corey Minyard <minyard@nortelnetworks.com>
60*4882a593Smuzhiyun  *	* Modified driver to utilize a sliding aperture instead of
61*4882a593Smuzhiyun  *	 mapping all memory into kernel space which turned out to
62*4882a593Smuzhiyun  *	 be very wasteful.
63*4882a593Smuzhiyun  *	* Located a bug in the SROM's initialization sequence that
64*4882a593Smuzhiyun  *	 made the memory unusable, added a fix to code to touch up
65*4882a593Smuzhiyun  *	 the DRAM some.
66*4882a593Smuzhiyun  *
67*4882a593Smuzhiyun  * Bugs/FIXMEs:
68*4882a593Smuzhiyun  *	* MUST fix the init function to not spin on a register
69*4882a593Smuzhiyun  *	waiting for it to set .. this does not safely handle busted
70*4882a593Smuzhiyun  *	devices that never reset the register correctly which will
71*4882a593Smuzhiyun  *	cause the system to hang w/ a reboot being the only chance at
72*4882a593Smuzhiyun  *	recover. [sort of fixed, could be better]
73*4882a593Smuzhiyun  *	* Add I2C handling of the SROM so we can read the SROM's information
74*4882a593Smuzhiyun  *	about the aperture size.  This should always accurately reflect the
75*4882a593Smuzhiyun  *	onboard memory size.
76*4882a593Smuzhiyun  *	* Comb the init routine.  It's still a bit cludgy on a few things.
77*4882a593Smuzhiyun  */
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun #include <linux/kernel.h>
80*4882a593Smuzhiyun #include <linux/module.h>
81*4882a593Smuzhiyun #include <linux/uaccess.h>
82*4882a593Smuzhiyun #include <linux/types.h>
83*4882a593Smuzhiyun #include <linux/init.h>
84*4882a593Smuzhiyun #include <linux/ptrace.h>
85*4882a593Smuzhiyun #include <linux/slab.h>
86*4882a593Smuzhiyun #include <linux/string.h>
87*4882a593Smuzhiyun #include <linux/timer.h>
88*4882a593Smuzhiyun #include <linux/major.h>
89*4882a593Smuzhiyun #include <linux/fs.h>
90*4882a593Smuzhiyun #include <linux/ioctl.h>
91*4882a593Smuzhiyun #include <asm/io.h>
92*4882a593Smuzhiyun #include <linux/pci.h>
93*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun #define PMC551_VERSION \
96*4882a593Smuzhiyun 	"Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun #define PCI_VENDOR_ID_V3_SEMI 0x11b0
99*4882a593Smuzhiyun #define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define PMC551_PCI_MEM_MAP0 0x50
102*4882a593Smuzhiyun #define PMC551_PCI_MEM_MAP1 0x54
103*4882a593Smuzhiyun #define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
104*4882a593Smuzhiyun #define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
105*4882a593Smuzhiyun #define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
106*4882a593Smuzhiyun #define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun #define PMC551_SDRAM_MA  0x60
109*4882a593Smuzhiyun #define PMC551_SDRAM_CMD 0x62
110*4882a593Smuzhiyun #define PMC551_DRAM_CFG  0x64
111*4882a593Smuzhiyun #define PMC551_SYS_CTRL_REG 0x78
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #define PMC551_DRAM_BLK0 0x68
114*4882a593Smuzhiyun #define PMC551_DRAM_BLK1 0x6c
115*4882a593Smuzhiyun #define PMC551_DRAM_BLK2 0x70
116*4882a593Smuzhiyun #define PMC551_DRAM_BLK3 0x74
117*4882a593Smuzhiyun #define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
118*4882a593Smuzhiyun #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
119*4882a593Smuzhiyun #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun struct mypriv {
122*4882a593Smuzhiyun 	struct pci_dev *dev;
123*4882a593Smuzhiyun 	u_char *start;
124*4882a593Smuzhiyun 	u32 base_map0;
125*4882a593Smuzhiyun 	u32 curr_map0;
126*4882a593Smuzhiyun 	u32 asize;
127*4882a593Smuzhiyun 	struct mtd_info *nextpmc551;
128*4882a593Smuzhiyun };
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun static struct mtd_info *pmc551list;
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
133*4882a593Smuzhiyun 			size_t *retlen, void **virt, resource_size_t *phys);
134*4882a593Smuzhiyun 
pmc551_erase(struct mtd_info * mtd,struct erase_info * instr)135*4882a593Smuzhiyun static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct mypriv *priv = mtd->priv;
138*4882a593Smuzhiyun 	u32 soff_hi;		/* start address offset hi */
139*4882a593Smuzhiyun 	u32 eoff_hi, eoff_lo;	/* end address offset hi/lo */
140*4882a593Smuzhiyun 	unsigned long end;
141*4882a593Smuzhiyun 	u_char *ptr;
142*4882a593Smuzhiyun 	size_t retlen;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
145*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
146*4882a593Smuzhiyun 		(long)instr->len);
147*4882a593Smuzhiyun #endif
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	end = instr->addr + instr->len - 1;
150*4882a593Smuzhiyun 	eoff_hi = end & ~(priv->asize - 1);
151*4882a593Smuzhiyun 	soff_hi = instr->addr & ~(priv->asize - 1);
152*4882a593Smuzhiyun 	eoff_lo = end & (priv->asize - 1);
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	pmc551_point(mtd, instr->addr, instr->len, &retlen,
155*4882a593Smuzhiyun 		     (void **)&ptr, NULL);
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun 	if (soff_hi == eoff_hi || mtd->size == priv->asize) {
158*4882a593Smuzhiyun 		/* The whole thing fits within one access, so just one shot
159*4882a593Smuzhiyun 		   will do it. */
160*4882a593Smuzhiyun 		memset(ptr, 0xff, instr->len);
161*4882a593Smuzhiyun 	} else {
162*4882a593Smuzhiyun 		/* We have to do multiple writes to get all the data
163*4882a593Smuzhiyun 		   written. */
164*4882a593Smuzhiyun 		while (soff_hi != eoff_hi) {
165*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
166*4882a593Smuzhiyun 			printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
167*4882a593Smuzhiyun 				"eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
168*4882a593Smuzhiyun #endif
169*4882a593Smuzhiyun 			memset(ptr, 0xff, priv->asize);
170*4882a593Smuzhiyun 			if (soff_hi + priv->asize >= mtd->size) {
171*4882a593Smuzhiyun 				goto out;
172*4882a593Smuzhiyun 			}
173*4882a593Smuzhiyun 			soff_hi += priv->asize;
174*4882a593Smuzhiyun 			pmc551_point(mtd, (priv->base_map0 | soff_hi),
175*4882a593Smuzhiyun 				     priv->asize, &retlen,
176*4882a593Smuzhiyun 				     (void **)&ptr, NULL);
177*4882a593Smuzhiyun 		}
178*4882a593Smuzhiyun 		memset(ptr, 0xff, eoff_lo);
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun       out:
182*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
183*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_erase() done\n");
184*4882a593Smuzhiyun #endif
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	return 0;
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
pmc551_point(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,void ** virt,resource_size_t * phys)189*4882a593Smuzhiyun static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
190*4882a593Smuzhiyun 			size_t *retlen, void **virt, resource_size_t *phys)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	struct mypriv *priv = mtd->priv;
193*4882a593Smuzhiyun 	u32 soff_hi;
194*4882a593Smuzhiyun 	u32 soff_lo;
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
197*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
198*4882a593Smuzhiyun #endif
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	soff_hi = from & ~(priv->asize - 1);
201*4882a593Smuzhiyun 	soff_lo = from & (priv->asize - 1);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	/* Cheap hack optimization */
204*4882a593Smuzhiyun 	if (priv->curr_map0 != from) {
205*4882a593Smuzhiyun 		pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
206*4882a593Smuzhiyun 					(priv->base_map0 | soff_hi));
207*4882a593Smuzhiyun 		priv->curr_map0 = soff_hi;
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	*virt = priv->start + soff_lo;
211*4882a593Smuzhiyun 	*retlen = len;
212*4882a593Smuzhiyun 	return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
pmc551_unpoint(struct mtd_info * mtd,loff_t from,size_t len)215*4882a593Smuzhiyun static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
218*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_unpoint()\n");
219*4882a593Smuzhiyun #endif
220*4882a593Smuzhiyun 	return 0;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
pmc551_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)223*4882a593Smuzhiyun static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
224*4882a593Smuzhiyun 			size_t * retlen, u_char * buf)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun 	struct mypriv *priv = mtd->priv;
227*4882a593Smuzhiyun 	u32 soff_hi;		/* start address offset hi */
228*4882a593Smuzhiyun 	u32 eoff_hi, eoff_lo;	/* end address offset hi/lo */
229*4882a593Smuzhiyun 	unsigned long end;
230*4882a593Smuzhiyun 	u_char *ptr;
231*4882a593Smuzhiyun 	u_char *copyto = buf;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
234*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
235*4882a593Smuzhiyun 		(long)from, (long)len, (long)priv->asize);
236*4882a593Smuzhiyun #endif
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	end = from + len - 1;
239*4882a593Smuzhiyun 	soff_hi = from & ~(priv->asize - 1);
240*4882a593Smuzhiyun 	eoff_hi = end & ~(priv->asize - 1);
241*4882a593Smuzhiyun 	eoff_lo = end & (priv->asize - 1);
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	if (soff_hi == eoff_hi) {
246*4882a593Smuzhiyun 		/* The whole thing fits within one access, so just one shot
247*4882a593Smuzhiyun 		   will do it. */
248*4882a593Smuzhiyun 		memcpy(copyto, ptr, len);
249*4882a593Smuzhiyun 		copyto += len;
250*4882a593Smuzhiyun 	} else {
251*4882a593Smuzhiyun 		/* We have to do multiple writes to get all the data
252*4882a593Smuzhiyun 		   written. */
253*4882a593Smuzhiyun 		while (soff_hi != eoff_hi) {
254*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
255*4882a593Smuzhiyun 			printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
256*4882a593Smuzhiyun 				"eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
257*4882a593Smuzhiyun #endif
258*4882a593Smuzhiyun 			memcpy(copyto, ptr, priv->asize);
259*4882a593Smuzhiyun 			copyto += priv->asize;
260*4882a593Smuzhiyun 			if (soff_hi + priv->asize >= mtd->size) {
261*4882a593Smuzhiyun 				goto out;
262*4882a593Smuzhiyun 			}
263*4882a593Smuzhiyun 			soff_hi += priv->asize;
264*4882a593Smuzhiyun 			pmc551_point(mtd, soff_hi, priv->asize, retlen,
265*4882a593Smuzhiyun 				     (void **)&ptr, NULL);
266*4882a593Smuzhiyun 		}
267*4882a593Smuzhiyun 		memcpy(copyto, ptr, eoff_lo);
268*4882a593Smuzhiyun 		copyto += eoff_lo;
269*4882a593Smuzhiyun 	}
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun       out:
272*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
273*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_read() done\n");
274*4882a593Smuzhiyun #endif
275*4882a593Smuzhiyun 	*retlen = copyto - buf;
276*4882a593Smuzhiyun 	return 0;
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun 
pmc551_write(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)279*4882a593Smuzhiyun static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
280*4882a593Smuzhiyun 			size_t * retlen, const u_char * buf)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun 	struct mypriv *priv = mtd->priv;
283*4882a593Smuzhiyun 	u32 soff_hi;		/* start address offset hi */
284*4882a593Smuzhiyun 	u32 eoff_hi, eoff_lo;	/* end address offset hi/lo */
285*4882a593Smuzhiyun 	unsigned long end;
286*4882a593Smuzhiyun 	u_char *ptr;
287*4882a593Smuzhiyun 	const u_char *copyfrom = buf;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
290*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
291*4882a593Smuzhiyun 		(long)to, (long)len, (long)priv->asize);
292*4882a593Smuzhiyun #endif
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	end = to + len - 1;
295*4882a593Smuzhiyun 	soff_hi = to & ~(priv->asize - 1);
296*4882a593Smuzhiyun 	eoff_hi = end & ~(priv->asize - 1);
297*4882a593Smuzhiyun 	eoff_lo = end & (priv->asize - 1);
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun 	pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (soff_hi == eoff_hi) {
302*4882a593Smuzhiyun 		/* The whole thing fits within one access, so just one shot
303*4882a593Smuzhiyun 		   will do it. */
304*4882a593Smuzhiyun 		memcpy(ptr, copyfrom, len);
305*4882a593Smuzhiyun 		copyfrom += len;
306*4882a593Smuzhiyun 	} else {
307*4882a593Smuzhiyun 		/* We have to do multiple writes to get all the data
308*4882a593Smuzhiyun 		   written. */
309*4882a593Smuzhiyun 		while (soff_hi != eoff_hi) {
310*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
311*4882a593Smuzhiyun 			printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
312*4882a593Smuzhiyun 				"eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
313*4882a593Smuzhiyun #endif
314*4882a593Smuzhiyun 			memcpy(ptr, copyfrom, priv->asize);
315*4882a593Smuzhiyun 			copyfrom += priv->asize;
316*4882a593Smuzhiyun 			if (soff_hi >= mtd->size) {
317*4882a593Smuzhiyun 				goto out;
318*4882a593Smuzhiyun 			}
319*4882a593Smuzhiyun 			soff_hi += priv->asize;
320*4882a593Smuzhiyun 			pmc551_point(mtd, soff_hi, priv->asize, retlen,
321*4882a593Smuzhiyun 				     (void **)&ptr, NULL);
322*4882a593Smuzhiyun 		}
323*4882a593Smuzhiyun 		memcpy(ptr, copyfrom, eoff_lo);
324*4882a593Smuzhiyun 		copyfrom += eoff_lo;
325*4882a593Smuzhiyun 	}
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun       out:
328*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
329*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551_write() done\n");
330*4882a593Smuzhiyun #endif
331*4882a593Smuzhiyun 	*retlen = copyfrom - buf;
332*4882a593Smuzhiyun 	return 0;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun /*
336*4882a593Smuzhiyun  * Fixup routines for the V370PDC
337*4882a593Smuzhiyun  * PCI device ID 0x020011b0
338*4882a593Smuzhiyun  *
339*4882a593Smuzhiyun  * This function basically kick starts the DRAM oboard the card and gets it
340*4882a593Smuzhiyun  * ready to be used.  Before this is done the device reads VERY erratic, so
341*4882a593Smuzhiyun  * much that it can crash the Linux 2.2.x series kernels when a user cat's
342*4882a593Smuzhiyun  * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
343*4882a593Smuzhiyun  * register.  FIXME: stop spinning on registers .. must implement a timeout
344*4882a593Smuzhiyun  * mechanism
345*4882a593Smuzhiyun  * returns the size of the memory region found.
346*4882a593Smuzhiyun  */
fixup_pmc551(struct pci_dev * dev)347*4882a593Smuzhiyun static int __init fixup_pmc551(struct pci_dev *dev)
348*4882a593Smuzhiyun {
349*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_BUGFIX
350*4882a593Smuzhiyun 	u32 dram_data;
351*4882a593Smuzhiyun #endif
352*4882a593Smuzhiyun 	u32 size, dcmd, cfg, dtmp;
353*4882a593Smuzhiyun 	u16 cmd, tmp, i;
354*4882a593Smuzhiyun 	u8 bcmd, counter;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	/* Sanity Check */
357*4882a593Smuzhiyun 	if (!dev) {
358*4882a593Smuzhiyun 		return -ENODEV;
359*4882a593Smuzhiyun 	}
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	/*
362*4882a593Smuzhiyun 	 * Attempt to reset the card
363*4882a593Smuzhiyun 	 * FIXME: Stop Spinning registers
364*4882a593Smuzhiyun 	 */
365*4882a593Smuzhiyun 	counter = 0;
366*4882a593Smuzhiyun 	/* unlock registers */
367*4882a593Smuzhiyun 	pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
368*4882a593Smuzhiyun 	/* read in old data */
369*4882a593Smuzhiyun 	pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
370*4882a593Smuzhiyun 	/* bang the reset line up and down for a few */
371*4882a593Smuzhiyun 	for (i = 0; i < 10; i++) {
372*4882a593Smuzhiyun 		counter = 0;
373*4882a593Smuzhiyun 		bcmd &= ~0x80;
374*4882a593Smuzhiyun 		while (counter++ < 100) {
375*4882a593Smuzhiyun 			pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
376*4882a593Smuzhiyun 		}
377*4882a593Smuzhiyun 		counter = 0;
378*4882a593Smuzhiyun 		bcmd |= 0x80;
379*4882a593Smuzhiyun 		while (counter++ < 100) {
380*4882a593Smuzhiyun 			pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
381*4882a593Smuzhiyun 		}
382*4882a593Smuzhiyun 	}
383*4882a593Smuzhiyun 	bcmd |= (0x40 | 0x20);
384*4882a593Smuzhiyun 	pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	/*
387*4882a593Smuzhiyun 	 * Take care and turn off the memory on the device while we
388*4882a593Smuzhiyun 	 * tweak the configurations
389*4882a593Smuzhiyun 	 */
390*4882a593Smuzhiyun 	pci_read_config_word(dev, PCI_COMMAND, &cmd);
391*4882a593Smuzhiyun 	tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
392*4882a593Smuzhiyun 	pci_write_config_word(dev, PCI_COMMAND, tmp);
393*4882a593Smuzhiyun 
394*4882a593Smuzhiyun 	/*
395*4882a593Smuzhiyun 	 * Disable existing aperture before probing memory size
396*4882a593Smuzhiyun 	 */
397*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
398*4882a593Smuzhiyun 	dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
399*4882a593Smuzhiyun 	pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
400*4882a593Smuzhiyun 	/*
401*4882a593Smuzhiyun 	 * Grab old BAR0 config so that we can figure out memory size
402*4882a593Smuzhiyun 	 * This is another bit of kludge going on.  The reason for the
403*4882a593Smuzhiyun 	 * redundancy is I am hoping to retain the original configuration
404*4882a593Smuzhiyun 	 * previously assigned to the card by the BIOS or some previous
405*4882a593Smuzhiyun 	 * fixup routine in the kernel.  So we read the old config into cfg,
406*4882a593Smuzhiyun 	 * then write all 1's to the memory space, read back the result into
407*4882a593Smuzhiyun 	 * "size", and then write back all the old config.
408*4882a593Smuzhiyun 	 */
409*4882a593Smuzhiyun 	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
410*4882a593Smuzhiyun #ifndef CONFIG_MTD_PMC551_BUGFIX
411*4882a593Smuzhiyun 	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
412*4882a593Smuzhiyun 	pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
413*4882a593Smuzhiyun 	size = (size & PCI_BASE_ADDRESS_MEM_MASK);
414*4882a593Smuzhiyun 	size &= ~(size - 1);
415*4882a593Smuzhiyun 	pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
416*4882a593Smuzhiyun #else
417*4882a593Smuzhiyun 	/*
418*4882a593Smuzhiyun 	 * Get the size of the memory by reading all the DRAM size values
419*4882a593Smuzhiyun 	 * and adding them up.
420*4882a593Smuzhiyun 	 *
421*4882a593Smuzhiyun 	 * KLUDGE ALERT: the boards we are using have invalid column and
422*4882a593Smuzhiyun 	 * row mux values.  We fix them here, but this will break other
423*4882a593Smuzhiyun 	 * memory configurations.
424*4882a593Smuzhiyun 	 */
425*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
426*4882a593Smuzhiyun 	size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
427*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
428*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
429*4882a593Smuzhiyun 	pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
432*4882a593Smuzhiyun 	size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
433*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
434*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
435*4882a593Smuzhiyun 	pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
438*4882a593Smuzhiyun 	size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
439*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
440*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
441*4882a593Smuzhiyun 	pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
444*4882a593Smuzhiyun 	size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
445*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
446*4882a593Smuzhiyun 	dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
447*4882a593Smuzhiyun 	pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	/*
450*4882a593Smuzhiyun 	 * Oops .. something went wrong
451*4882a593Smuzhiyun 	 */
452*4882a593Smuzhiyun 	if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
453*4882a593Smuzhiyun 		return -ENODEV;
454*4882a593Smuzhiyun 	}
455*4882a593Smuzhiyun #endif				/* CONFIG_MTD_PMC551_BUGFIX */
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
458*4882a593Smuzhiyun 		return -ENODEV;
459*4882a593Smuzhiyun 	}
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	/*
462*4882a593Smuzhiyun 	 * Precharge Dram
463*4882a593Smuzhiyun 	 */
464*4882a593Smuzhiyun 	pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
465*4882a593Smuzhiyun 	pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	/*
468*4882a593Smuzhiyun 	 * Wait until command has gone through
469*4882a593Smuzhiyun 	 * FIXME: register spinning issue
470*4882a593Smuzhiyun 	 */
471*4882a593Smuzhiyun 	do {
472*4882a593Smuzhiyun 		pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
473*4882a593Smuzhiyun 		if (counter++ > 100)
474*4882a593Smuzhiyun 			break;
475*4882a593Smuzhiyun 	} while ((PCI_COMMAND_IO) & cmd);
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	/*
478*4882a593Smuzhiyun 	 * Turn on auto refresh
479*4882a593Smuzhiyun 	 * The loop is taken directly from Ramix's example code.  I assume that
480*4882a593Smuzhiyun 	 * this must be held high for some duration of time, but I can find no
481*4882a593Smuzhiyun 	 * documentation refrencing the reasons why.
482*4882a593Smuzhiyun 	 */
483*4882a593Smuzhiyun 	for (i = 1; i <= 8; i++) {
484*4882a593Smuzhiyun 		pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 		/*
487*4882a593Smuzhiyun 		 * Make certain command has gone through
488*4882a593Smuzhiyun 		 * FIXME: register spinning issue
489*4882a593Smuzhiyun 		 */
490*4882a593Smuzhiyun 		counter = 0;
491*4882a593Smuzhiyun 		do {
492*4882a593Smuzhiyun 			pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
493*4882a593Smuzhiyun 			if (counter++ > 100)
494*4882a593Smuzhiyun 				break;
495*4882a593Smuzhiyun 		} while ((PCI_COMMAND_IO) & cmd);
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
499*4882a593Smuzhiyun 	pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
500*4882a593Smuzhiyun 
501*4882a593Smuzhiyun 	/*
502*4882a593Smuzhiyun 	 * Wait until command completes
503*4882a593Smuzhiyun 	 * FIXME: register spinning issue
504*4882a593Smuzhiyun 	 */
505*4882a593Smuzhiyun 	counter = 0;
506*4882a593Smuzhiyun 	do {
507*4882a593Smuzhiyun 		pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
508*4882a593Smuzhiyun 		if (counter++ > 100)
509*4882a593Smuzhiyun 			break;
510*4882a593Smuzhiyun 	} while ((PCI_COMMAND_IO) & cmd);
511*4882a593Smuzhiyun 
512*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
513*4882a593Smuzhiyun 	dcmd |= 0x02000000;
514*4882a593Smuzhiyun 	pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
515*4882a593Smuzhiyun 
516*4882a593Smuzhiyun 	/*
517*4882a593Smuzhiyun 	 * Check to make certain fast back-to-back, if not
518*4882a593Smuzhiyun 	 * then set it so
519*4882a593Smuzhiyun 	 */
520*4882a593Smuzhiyun 	pci_read_config_word(dev, PCI_STATUS, &cmd);
521*4882a593Smuzhiyun 	if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
522*4882a593Smuzhiyun 		cmd |= PCI_COMMAND_FAST_BACK;
523*4882a593Smuzhiyun 		pci_write_config_word(dev, PCI_STATUS, cmd);
524*4882a593Smuzhiyun 	}
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	/*
527*4882a593Smuzhiyun 	 * Check to make certain the DEVSEL is set correctly, this device
528*4882a593Smuzhiyun 	 * has a tendency to assert DEVSEL and TRDY when a write is performed
529*4882a593Smuzhiyun 	 * to the memory when memory is read-only
530*4882a593Smuzhiyun 	 */
531*4882a593Smuzhiyun 	if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
532*4882a593Smuzhiyun 		cmd &= ~PCI_STATUS_DEVSEL_MASK;
533*4882a593Smuzhiyun 		pci_write_config_word(dev, PCI_STATUS, cmd);
534*4882a593Smuzhiyun 	}
535*4882a593Smuzhiyun 	/*
536*4882a593Smuzhiyun 	 * Set to be prefetchable and put everything back based on old cfg.
537*4882a593Smuzhiyun 	 * it's possible that the reset of the V370PDC nuked the original
538*4882a593Smuzhiyun 	 * setup
539*4882a593Smuzhiyun 	 */
540*4882a593Smuzhiyun 	/*
541*4882a593Smuzhiyun 	   cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
542*4882a593Smuzhiyun 	   pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
543*4882a593Smuzhiyun 	 */
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	/*
546*4882a593Smuzhiyun 	 * Turn PCI memory and I/O bus access back on
547*4882a593Smuzhiyun 	 */
548*4882a593Smuzhiyun 	pci_write_config_word(dev, PCI_COMMAND,
549*4882a593Smuzhiyun 			      PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
550*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
551*4882a593Smuzhiyun 	/*
552*4882a593Smuzhiyun 	 * Some screen fun
553*4882a593Smuzhiyun 	 */
554*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
555*4882a593Smuzhiyun 		"0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
556*4882a593Smuzhiyun 		size >> 10 : size >> 20,
557*4882a593Smuzhiyun 		(size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
558*4882a593Smuzhiyun 		((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
559*4882a593Smuzhiyun 		(unsigned long long)pci_resource_start(dev, 0));
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 	/*
562*4882a593Smuzhiyun 	 * Check to see the state of the memory
563*4882a593Smuzhiyun 	 */
564*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
565*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
566*4882a593Smuzhiyun 		"pmc551: DRAM_BLK0 Size: %d at %d\n"
567*4882a593Smuzhiyun 		"pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
568*4882a593Smuzhiyun 		(((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
569*4882a593Smuzhiyun 		(((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
570*4882a593Smuzhiyun 		PMC551_DRAM_BLK_GET_SIZE(dcmd),
571*4882a593Smuzhiyun 		((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
572*4882a593Smuzhiyun 		((dcmd >> 9) & 0xF));
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
575*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
576*4882a593Smuzhiyun 		"pmc551: DRAM_BLK1 Size: %d at %d\n"
577*4882a593Smuzhiyun 		"pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
578*4882a593Smuzhiyun 		(((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
579*4882a593Smuzhiyun 		(((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
580*4882a593Smuzhiyun 		PMC551_DRAM_BLK_GET_SIZE(dcmd),
581*4882a593Smuzhiyun 		((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
582*4882a593Smuzhiyun 		((dcmd >> 9) & 0xF));
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
585*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
586*4882a593Smuzhiyun 		"pmc551: DRAM_BLK2 Size: %d at %d\n"
587*4882a593Smuzhiyun 		"pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
588*4882a593Smuzhiyun 		(((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
589*4882a593Smuzhiyun 		(((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
590*4882a593Smuzhiyun 		PMC551_DRAM_BLK_GET_SIZE(dcmd),
591*4882a593Smuzhiyun 		((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
592*4882a593Smuzhiyun 		((dcmd >> 9) & 0xF));
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
595*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
596*4882a593Smuzhiyun 		"pmc551: DRAM_BLK3 Size: %d at %d\n"
597*4882a593Smuzhiyun 		"pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
598*4882a593Smuzhiyun 		(((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
599*4882a593Smuzhiyun 		(((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
600*4882a593Smuzhiyun 		PMC551_DRAM_BLK_GET_SIZE(dcmd),
601*4882a593Smuzhiyun 		((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
602*4882a593Smuzhiyun 		((dcmd >> 9) & 0xF));
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	pci_read_config_word(dev, PCI_COMMAND, &cmd);
605*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: Memory Access %s\n",
606*4882a593Smuzhiyun 		(((0x1 << 1) & cmd) == 0) ? "off" : "on");
607*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: I/O Access %s\n",
608*4882a593Smuzhiyun 		(((0x1 << 0) & cmd) == 0) ? "off" : "on");
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	pci_read_config_word(dev, PCI_STATUS, &cmd);
611*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: Devsel %s\n",
612*4882a593Smuzhiyun 		((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
613*4882a593Smuzhiyun 		((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
614*4882a593Smuzhiyun 		((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
617*4882a593Smuzhiyun 		((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun 	pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
620*4882a593Smuzhiyun 	printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
621*4882a593Smuzhiyun 		"pmc551: System Control Register is %slocked to PCI access\n"
622*4882a593Smuzhiyun 		"pmc551: System Control Register is %slocked to EEPROM access\n",
623*4882a593Smuzhiyun 		(bcmd & 0x1) ? "software" : "hardware",
624*4882a593Smuzhiyun 		(bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
625*4882a593Smuzhiyun #endif
626*4882a593Smuzhiyun 	return size;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun 
629*4882a593Smuzhiyun /*
630*4882a593Smuzhiyun  * Kernel version specific module stuffages
631*4882a593Smuzhiyun  */
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun MODULE_LICENSE("GPL");
634*4882a593Smuzhiyun MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
635*4882a593Smuzhiyun MODULE_DESCRIPTION(PMC551_VERSION);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun /*
638*4882a593Smuzhiyun  * Stuff these outside the ifdef so as to not bust compiled in driver support
639*4882a593Smuzhiyun  */
640*4882a593Smuzhiyun static int msize = 0;
641*4882a593Smuzhiyun static int asize = 0;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun module_param(msize, int, 0);
644*4882a593Smuzhiyun MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
645*4882a593Smuzhiyun module_param(asize, int, 0);
646*4882a593Smuzhiyun MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun /*
649*4882a593Smuzhiyun  * PMC551 Card Initialization
650*4882a593Smuzhiyun  */
init_pmc551(void)651*4882a593Smuzhiyun static int __init init_pmc551(void)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	struct pci_dev *PCI_Device = NULL;
654*4882a593Smuzhiyun 	struct mypriv *priv;
655*4882a593Smuzhiyun 	int found = 0;
656*4882a593Smuzhiyun 	struct mtd_info *mtd;
657*4882a593Smuzhiyun 	int length = 0;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	if (msize) {
660*4882a593Smuzhiyun 		msize = (1 << (ffs(msize) - 1)) << 20;
661*4882a593Smuzhiyun 		if (msize > (1 << 30)) {
662*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
663*4882a593Smuzhiyun 				msize);
664*4882a593Smuzhiyun 			return -EINVAL;
665*4882a593Smuzhiyun 		}
666*4882a593Smuzhiyun 	}
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	if (asize) {
669*4882a593Smuzhiyun 		asize = (1 << (ffs(asize) - 1)) << 20;
670*4882a593Smuzhiyun 		if (asize > (1 << 30)) {
671*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Invalid aperture size "
672*4882a593Smuzhiyun 				"[%d]\n", asize);
673*4882a593Smuzhiyun 			return -EINVAL;
674*4882a593Smuzhiyun 		}
675*4882a593Smuzhiyun 	}
676*4882a593Smuzhiyun 
677*4882a593Smuzhiyun 	printk(KERN_INFO PMC551_VERSION);
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	/*
680*4882a593Smuzhiyun 	 * PCU-bus chipset probe.
681*4882a593Smuzhiyun 	 */
682*4882a593Smuzhiyun 	for (;;) {
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 		if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
685*4882a593Smuzhiyun 						  PCI_DEVICE_ID_V3_SEMI_V370PDC,
686*4882a593Smuzhiyun 						  PCI_Device)) == NULL) {
687*4882a593Smuzhiyun 			break;
688*4882a593Smuzhiyun 		}
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 		printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
691*4882a593Smuzhiyun 			(unsigned long long)pci_resource_start(PCI_Device, 0));
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 		/*
694*4882a593Smuzhiyun 		 * The PMC551 device acts VERY weird if you don't init it
695*4882a593Smuzhiyun 		 * first.  i.e. it will not correctly report devsel.  If for
696*4882a593Smuzhiyun 		 * some reason the sdram is in a wrote-protected state the
697*4882a593Smuzhiyun 		 * device will DEVSEL when it is written to causing problems
698*4882a593Smuzhiyun 		 * with the oldproc.c driver in
699*4882a593Smuzhiyun 		 * some kernels (2.2.*)
700*4882a593Smuzhiyun 		 */
701*4882a593Smuzhiyun 		if ((length = fixup_pmc551(PCI_Device)) <= 0) {
702*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
703*4882a593Smuzhiyun 			break;
704*4882a593Smuzhiyun 		}
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 		/*
707*4882a593Smuzhiyun 		 * This is needed until the driver is capable of reading the
708*4882a593Smuzhiyun 		 * onboard I2C SROM to discover the "real" memory size.
709*4882a593Smuzhiyun 		 */
710*4882a593Smuzhiyun 		if (msize) {
711*4882a593Smuzhiyun 			length = msize;
712*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Using specified memory "
713*4882a593Smuzhiyun 				"size 0x%x\n", length);
714*4882a593Smuzhiyun 		} else {
715*4882a593Smuzhiyun 			msize = length;
716*4882a593Smuzhiyun 		}
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 		mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
719*4882a593Smuzhiyun 		if (!mtd)
720*4882a593Smuzhiyun 			break;
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 		priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
723*4882a593Smuzhiyun 		if (!priv) {
724*4882a593Smuzhiyun 			kfree(mtd);
725*4882a593Smuzhiyun 			break;
726*4882a593Smuzhiyun 		}
727*4882a593Smuzhiyun 		mtd->priv = priv;
728*4882a593Smuzhiyun 		priv->dev = PCI_Device;
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 		if (asize > length) {
731*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: reducing aperture size to "
732*4882a593Smuzhiyun 				"fit %dM\n", length >> 20);
733*4882a593Smuzhiyun 			priv->asize = asize = length;
734*4882a593Smuzhiyun 		} else if (asize == 0 || asize == length) {
735*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Using existing aperture "
736*4882a593Smuzhiyun 				"size %dM\n", length >> 20);
737*4882a593Smuzhiyun 			priv->asize = asize = length;
738*4882a593Smuzhiyun 		} else {
739*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Using specified aperture "
740*4882a593Smuzhiyun 				"size %dM\n", asize >> 20);
741*4882a593Smuzhiyun 			priv->asize = asize;
742*4882a593Smuzhiyun 		}
743*4882a593Smuzhiyun 		priv->start = pci_iomap(PCI_Device, 0, priv->asize);
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 		if (!priv->start) {
746*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
747*4882a593Smuzhiyun 			kfree(mtd->priv);
748*4882a593Smuzhiyun 			kfree(mtd);
749*4882a593Smuzhiyun 			break;
750*4882a593Smuzhiyun 		}
751*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
752*4882a593Smuzhiyun 		printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
753*4882a593Smuzhiyun 			ffs(priv->asize >> 20) - 1);
754*4882a593Smuzhiyun #endif
755*4882a593Smuzhiyun 
756*4882a593Smuzhiyun 		priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
757*4882a593Smuzhiyun 				   | PMC551_PCI_MEM_MAP_ENABLE
758*4882a593Smuzhiyun 				   | (ffs(priv->asize >> 20) - 1) << 4);
759*4882a593Smuzhiyun 		priv->curr_map0 = priv->base_map0;
760*4882a593Smuzhiyun 		pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
761*4882a593Smuzhiyun 					priv->curr_map0);
762*4882a593Smuzhiyun 
763*4882a593Smuzhiyun #ifdef CONFIG_MTD_PMC551_DEBUG
764*4882a593Smuzhiyun 		printk(KERN_DEBUG "pmc551: aperture set to %d\n",
765*4882a593Smuzhiyun 			(priv->base_map0 & 0xF0) >> 4);
766*4882a593Smuzhiyun #endif
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 		mtd->size = msize;
769*4882a593Smuzhiyun 		mtd->flags = MTD_CAP_RAM;
770*4882a593Smuzhiyun 		mtd->_erase = pmc551_erase;
771*4882a593Smuzhiyun 		mtd->_read = pmc551_read;
772*4882a593Smuzhiyun 		mtd->_write = pmc551_write;
773*4882a593Smuzhiyun 		mtd->_point = pmc551_point;
774*4882a593Smuzhiyun 		mtd->_unpoint = pmc551_unpoint;
775*4882a593Smuzhiyun 		mtd->type = MTD_RAM;
776*4882a593Smuzhiyun 		mtd->name = "PMC551 RAM board";
777*4882a593Smuzhiyun 		mtd->erasesize = 0x10000;
778*4882a593Smuzhiyun 		mtd->writesize = 1;
779*4882a593Smuzhiyun 		mtd->owner = THIS_MODULE;
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 		if (mtd_device_register(mtd, NULL, 0)) {
782*4882a593Smuzhiyun 			printk(KERN_NOTICE "pmc551: Failed to register new device\n");
783*4882a593Smuzhiyun 			pci_iounmap(PCI_Device, priv->start);
784*4882a593Smuzhiyun 			kfree(mtd->priv);
785*4882a593Smuzhiyun 			kfree(mtd);
786*4882a593Smuzhiyun 			break;
787*4882a593Smuzhiyun 		}
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 		/* Keep a reference as the mtd_device_register worked */
790*4882a593Smuzhiyun 		pci_dev_get(PCI_Device);
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun 		printk(KERN_NOTICE "Registered pmc551 memory device.\n");
793*4882a593Smuzhiyun 		printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
794*4882a593Smuzhiyun 			priv->asize >> 20,
795*4882a593Smuzhiyun 			priv->start, priv->start + priv->asize);
796*4882a593Smuzhiyun 		printk(KERN_NOTICE "Total memory is %d%sB\n",
797*4882a593Smuzhiyun 			(length < 1024) ? length :
798*4882a593Smuzhiyun 			(length < 1048576) ? length >> 10 : length >> 20,
799*4882a593Smuzhiyun 			(length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
800*4882a593Smuzhiyun 		priv->nextpmc551 = pmc551list;
801*4882a593Smuzhiyun 		pmc551list = mtd;
802*4882a593Smuzhiyun 		found++;
803*4882a593Smuzhiyun 	}
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	/* Exited early, reference left over */
806*4882a593Smuzhiyun 	pci_dev_put(PCI_Device);
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	if (!pmc551list) {
809*4882a593Smuzhiyun 		printk(KERN_NOTICE "pmc551: not detected\n");
810*4882a593Smuzhiyun 		return -ENODEV;
811*4882a593Smuzhiyun 	} else {
812*4882a593Smuzhiyun 		printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
813*4882a593Smuzhiyun 		return 0;
814*4882a593Smuzhiyun 	}
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun /*
818*4882a593Smuzhiyun  * PMC551 Card Cleanup
819*4882a593Smuzhiyun  */
cleanup_pmc551(void)820*4882a593Smuzhiyun static void __exit cleanup_pmc551(void)
821*4882a593Smuzhiyun {
822*4882a593Smuzhiyun 	int found = 0;
823*4882a593Smuzhiyun 	struct mtd_info *mtd;
824*4882a593Smuzhiyun 	struct mypriv *priv;
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	while ((mtd = pmc551list)) {
827*4882a593Smuzhiyun 		priv = mtd->priv;
828*4882a593Smuzhiyun 		pmc551list = priv->nextpmc551;
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 		if (priv->start) {
831*4882a593Smuzhiyun 			printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
832*4882a593Smuzhiyun 				"0x%p\n", priv->asize >> 20, priv->start);
833*4882a593Smuzhiyun 			pci_iounmap(priv->dev, priv->start);
834*4882a593Smuzhiyun 		}
835*4882a593Smuzhiyun 		pci_dev_put(priv->dev);
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 		kfree(mtd->priv);
838*4882a593Smuzhiyun 		mtd_device_unregister(mtd);
839*4882a593Smuzhiyun 		kfree(mtd);
840*4882a593Smuzhiyun 		found++;
841*4882a593Smuzhiyun 	}
842*4882a593Smuzhiyun 
843*4882a593Smuzhiyun 	printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
844*4882a593Smuzhiyun }
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun module_init(init_pmc551);
847*4882a593Smuzhiyun module_exit(cleanup_pmc551);
848