xref: /OK3568_Linux_fs/kernel/drivers/mtd/devices/docg3.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Handles the M-Systems DiskOnChip G3 chip
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2011 Robert Jarzmik
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/kernel.h>
9*4882a593Smuzhiyun #include <linux/module.h>
10*4882a593Smuzhiyun #include <linux/errno.h>
11*4882a593Smuzhiyun #include <linux/of.h>
12*4882a593Smuzhiyun #include <linux/platform_device.h>
13*4882a593Smuzhiyun #include <linux/string.h>
14*4882a593Smuzhiyun #include <linux/slab.h>
15*4882a593Smuzhiyun #include <linux/io.h>
16*4882a593Smuzhiyun #include <linux/delay.h>
17*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
18*4882a593Smuzhiyun #include <linux/mtd/partitions.h>
19*4882a593Smuzhiyun #include <linux/bitmap.h>
20*4882a593Smuzhiyun #include <linux/bitrev.h>
21*4882a593Smuzhiyun #include <linux/bch.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include <linux/debugfs.h>
24*4882a593Smuzhiyun #include <linux/seq_file.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define CREATE_TRACE_POINTS
27*4882a593Smuzhiyun #include "docg3.h"
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /*
30*4882a593Smuzhiyun  * This driver handles the DiskOnChip G3 flash memory.
31*4882a593Smuzhiyun  *
32*4882a593Smuzhiyun  * As no specification is available from M-Systems/Sandisk, this drivers lacks
33*4882a593Smuzhiyun  * several functions available on the chip, as :
34*4882a593Smuzhiyun  *  - IPL write
35*4882a593Smuzhiyun  *
36*4882a593Smuzhiyun  * The bus data width (8bits versus 16bits) is not handled (if_cfg flag), and
37*4882a593Smuzhiyun  * the driver assumes a 16bits data bus.
38*4882a593Smuzhiyun  *
39*4882a593Smuzhiyun  * DocG3 relies on 2 ECC algorithms, which are handled in hardware :
40*4882a593Smuzhiyun  *  - a 1 byte Hamming code stored in the OOB for each page
41*4882a593Smuzhiyun  *  - a 7 bytes BCH code stored in the OOB for each page
42*4882a593Smuzhiyun  * The BCH ECC is :
43*4882a593Smuzhiyun  *  - BCH is in GF(2^14)
44*4882a593Smuzhiyun  *  - BCH is over data of 520 bytes (512 page + 7 page_info bytes
45*4882a593Smuzhiyun  *                                   + 1 hamming byte)
46*4882a593Smuzhiyun  *  - BCH can correct up to 4 bits (t = 4)
47*4882a593Smuzhiyun  *  - BCH syndroms are calculated in hardware, and checked in hardware as well
48*4882a593Smuzhiyun  *
49*4882a593Smuzhiyun  */
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static unsigned int reliable_mode;
52*4882a593Smuzhiyun module_param(reliable_mode, uint, 0);
53*4882a593Smuzhiyun MODULE_PARM_DESC(reliable_mode, "Set the docg3 mode (0=normal MLC, 1=fast, "
54*4882a593Smuzhiyun 		 "2=reliable) : MLC normal operations are in normal mode");
55*4882a593Smuzhiyun 
docg3_ooblayout_ecc(struct mtd_info * mtd,int section,struct mtd_oob_region * oobregion)56*4882a593Smuzhiyun static int docg3_ooblayout_ecc(struct mtd_info *mtd, int section,
57*4882a593Smuzhiyun 			       struct mtd_oob_region *oobregion)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun 	if (section)
60*4882a593Smuzhiyun 		return -ERANGE;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	/* byte 7 is Hamming ECC, byte 8-14 are BCH ECC */
63*4882a593Smuzhiyun 	oobregion->offset = 7;
64*4882a593Smuzhiyun 	oobregion->length = 8;
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	return 0;
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun 
docg3_ooblayout_free(struct mtd_info * mtd,int section,struct mtd_oob_region * oobregion)69*4882a593Smuzhiyun static int docg3_ooblayout_free(struct mtd_info *mtd, int section,
70*4882a593Smuzhiyun 				struct mtd_oob_region *oobregion)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	if (section > 1)
73*4882a593Smuzhiyun 		return -ERANGE;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	/* free bytes: byte 0 until byte 6, byte 15 */
76*4882a593Smuzhiyun 	if (!section) {
77*4882a593Smuzhiyun 		oobregion->offset = 0;
78*4882a593Smuzhiyun 		oobregion->length = 7;
79*4882a593Smuzhiyun 	} else {
80*4882a593Smuzhiyun 		oobregion->offset = 15;
81*4882a593Smuzhiyun 		oobregion->length = 1;
82*4882a593Smuzhiyun 	}
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun static const struct mtd_ooblayout_ops nand_ooblayout_docg3_ops = {
88*4882a593Smuzhiyun 	.ecc = docg3_ooblayout_ecc,
89*4882a593Smuzhiyun 	.free = docg3_ooblayout_free,
90*4882a593Smuzhiyun };
91*4882a593Smuzhiyun 
doc_readb(struct docg3 * docg3,u16 reg)92*4882a593Smuzhiyun static inline u8 doc_readb(struct docg3 *docg3, u16 reg)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	u8 val = readb(docg3->cascade->base + reg);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	trace_docg3_io(0, 8, reg, (int)val);
97*4882a593Smuzhiyun 	return val;
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
doc_readw(struct docg3 * docg3,u16 reg)100*4882a593Smuzhiyun static inline u16 doc_readw(struct docg3 *docg3, u16 reg)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	u16 val = readw(docg3->cascade->base + reg);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	trace_docg3_io(0, 16, reg, (int)val);
105*4882a593Smuzhiyun 	return val;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun 
doc_writeb(struct docg3 * docg3,u8 val,u16 reg)108*4882a593Smuzhiyun static inline void doc_writeb(struct docg3 *docg3, u8 val, u16 reg)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	writeb(val, docg3->cascade->base + reg);
111*4882a593Smuzhiyun 	trace_docg3_io(1, 8, reg, val);
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun 
doc_writew(struct docg3 * docg3,u16 val,u16 reg)114*4882a593Smuzhiyun static inline void doc_writew(struct docg3 *docg3, u16 val, u16 reg)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	writew(val, docg3->cascade->base + reg);
117*4882a593Smuzhiyun 	trace_docg3_io(1, 16, reg, val);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
doc_flash_command(struct docg3 * docg3,u8 cmd)120*4882a593Smuzhiyun static inline void doc_flash_command(struct docg3 *docg3, u8 cmd)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	doc_writeb(docg3, cmd, DOC_FLASHCOMMAND);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
doc_flash_sequence(struct docg3 * docg3,u8 seq)125*4882a593Smuzhiyun static inline void doc_flash_sequence(struct docg3 *docg3, u8 seq)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	doc_writeb(docg3, seq, DOC_FLASHSEQUENCE);
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
doc_flash_address(struct docg3 * docg3,u8 addr)130*4882a593Smuzhiyun static inline void doc_flash_address(struct docg3 *docg3, u8 addr)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	doc_writeb(docg3, addr, DOC_FLASHADDRESS);
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun static char const * const part_probes[] = { "cmdlinepart", "saftlpart", NULL };
136*4882a593Smuzhiyun 
doc_register_readb(struct docg3 * docg3,int reg)137*4882a593Smuzhiyun static int doc_register_readb(struct docg3 *docg3, int reg)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	u8 val;
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	doc_writew(docg3, reg, DOC_READADDRESS);
142*4882a593Smuzhiyun 	val = doc_readb(docg3, reg);
143*4882a593Smuzhiyun 	doc_vdbg("Read register %04x : %02x\n", reg, val);
144*4882a593Smuzhiyun 	return val;
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun 
doc_register_readw(struct docg3 * docg3,int reg)147*4882a593Smuzhiyun static int doc_register_readw(struct docg3 *docg3, int reg)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	u16 val;
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	doc_writew(docg3, reg, DOC_READADDRESS);
152*4882a593Smuzhiyun 	val = doc_readw(docg3, reg);
153*4882a593Smuzhiyun 	doc_vdbg("Read register %04x : %04x\n", reg, val);
154*4882a593Smuzhiyun 	return val;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun /**
158*4882a593Smuzhiyun  * doc_delay - delay docg3 operations
159*4882a593Smuzhiyun  * @docg3: the device
160*4882a593Smuzhiyun  * @nbNOPs: the number of NOPs to issue
161*4882a593Smuzhiyun  *
162*4882a593Smuzhiyun  * As no specification is available, the right timings between chip commands are
163*4882a593Smuzhiyun  * unknown. The only available piece of information are the observed nops on a
164*4882a593Smuzhiyun  * working docg3 chip.
165*4882a593Smuzhiyun  * Therefore, doc_delay relies on a busy loop of NOPs, instead of scheduler
166*4882a593Smuzhiyun  * friendlier msleep() functions or blocking mdelay().
167*4882a593Smuzhiyun  */
doc_delay(struct docg3 * docg3,int nbNOPs)168*4882a593Smuzhiyun static void doc_delay(struct docg3 *docg3, int nbNOPs)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun 	int i;
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun 	doc_vdbg("NOP x %d\n", nbNOPs);
173*4882a593Smuzhiyun 	for (i = 0; i < nbNOPs; i++)
174*4882a593Smuzhiyun 		doc_writeb(docg3, 0, DOC_NOP);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
is_prot_seq_error(struct docg3 * docg3)177*4882a593Smuzhiyun static int is_prot_seq_error(struct docg3 *docg3)
178*4882a593Smuzhiyun {
179*4882a593Smuzhiyun 	int ctrl;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
182*4882a593Smuzhiyun 	return ctrl & (DOC_CTRL_PROTECTION_ERROR | DOC_CTRL_SEQUENCE_ERROR);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
doc_is_ready(struct docg3 * docg3)185*4882a593Smuzhiyun static int doc_is_ready(struct docg3 *docg3)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	int ctrl;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
190*4882a593Smuzhiyun 	return ctrl & DOC_CTRL_FLASHREADY;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
doc_wait_ready(struct docg3 * docg3)193*4882a593Smuzhiyun static int doc_wait_ready(struct docg3 *docg3)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun 	int maxWaitCycles = 100;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	do {
198*4882a593Smuzhiyun 		doc_delay(docg3, 4);
199*4882a593Smuzhiyun 		cpu_relax();
200*4882a593Smuzhiyun 	} while (!doc_is_ready(docg3) && maxWaitCycles--);
201*4882a593Smuzhiyun 	doc_delay(docg3, 2);
202*4882a593Smuzhiyun 	if (maxWaitCycles > 0)
203*4882a593Smuzhiyun 		return 0;
204*4882a593Smuzhiyun 	else
205*4882a593Smuzhiyun 		return -EIO;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun 
doc_reset_seq(struct docg3 * docg3)208*4882a593Smuzhiyun static int doc_reset_seq(struct docg3 *docg3)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun 	int ret;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	doc_writeb(docg3, 0x10, DOC_FLASHCONTROL);
213*4882a593Smuzhiyun 	doc_flash_sequence(docg3, DOC_SEQ_RESET);
214*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_RESET);
215*4882a593Smuzhiyun 	doc_delay(docg3, 2);
216*4882a593Smuzhiyun 	ret = doc_wait_ready(docg3);
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun 	doc_dbg("doc_reset_seq() -> isReady=%s\n", ret ? "false" : "true");
219*4882a593Smuzhiyun 	return ret;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun /**
223*4882a593Smuzhiyun  * doc_read_data_area - Read data from data area
224*4882a593Smuzhiyun  * @docg3: the device
225*4882a593Smuzhiyun  * @buf: the buffer to fill in (might be NULL is dummy reads)
226*4882a593Smuzhiyun  * @len: the length to read
227*4882a593Smuzhiyun  * @first: first time read, DOC_READADDRESS should be set
228*4882a593Smuzhiyun  *
229*4882a593Smuzhiyun  * Reads bytes from flash data. Handles the single byte / even bytes reads.
230*4882a593Smuzhiyun  */
doc_read_data_area(struct docg3 * docg3,void * buf,int len,int first)231*4882a593Smuzhiyun static void doc_read_data_area(struct docg3 *docg3, void *buf, int len,
232*4882a593Smuzhiyun 			       int first)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun 	int i, cdr, len4;
235*4882a593Smuzhiyun 	u16 data16, *dst16;
236*4882a593Smuzhiyun 	u8 data8, *dst8;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	doc_dbg("doc_read_data_area(buf=%p, len=%d)\n", buf, len);
239*4882a593Smuzhiyun 	cdr = len & 0x1;
240*4882a593Smuzhiyun 	len4 = len - cdr;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	if (first)
243*4882a593Smuzhiyun 		doc_writew(docg3, DOC_IOSPACE_DATA, DOC_READADDRESS);
244*4882a593Smuzhiyun 	dst16 = buf;
245*4882a593Smuzhiyun 	for (i = 0; i < len4; i += 2) {
246*4882a593Smuzhiyun 		data16 = doc_readw(docg3, DOC_IOSPACE_DATA);
247*4882a593Smuzhiyun 		if (dst16) {
248*4882a593Smuzhiyun 			*dst16 = data16;
249*4882a593Smuzhiyun 			dst16++;
250*4882a593Smuzhiyun 		}
251*4882a593Smuzhiyun 	}
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (cdr) {
254*4882a593Smuzhiyun 		doc_writew(docg3, DOC_IOSPACE_DATA | DOC_READADDR_ONE_BYTE,
255*4882a593Smuzhiyun 			   DOC_READADDRESS);
256*4882a593Smuzhiyun 		doc_delay(docg3, 1);
257*4882a593Smuzhiyun 		dst8 = (u8 *)dst16;
258*4882a593Smuzhiyun 		for (i = 0; i < cdr; i++) {
259*4882a593Smuzhiyun 			data8 = doc_readb(docg3, DOC_IOSPACE_DATA);
260*4882a593Smuzhiyun 			if (dst8) {
261*4882a593Smuzhiyun 				*dst8 = data8;
262*4882a593Smuzhiyun 				dst8++;
263*4882a593Smuzhiyun 			}
264*4882a593Smuzhiyun 		}
265*4882a593Smuzhiyun 	}
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun /**
269*4882a593Smuzhiyun  * doc_write_data_area - Write data into data area
270*4882a593Smuzhiyun  * @docg3: the device
271*4882a593Smuzhiyun  * @buf: the buffer to get input bytes from
272*4882a593Smuzhiyun  * @len: the length to write
273*4882a593Smuzhiyun  *
274*4882a593Smuzhiyun  * Writes bytes into flash data. Handles the single byte / even bytes writes.
275*4882a593Smuzhiyun  */
doc_write_data_area(struct docg3 * docg3,const void * buf,int len)276*4882a593Smuzhiyun static void doc_write_data_area(struct docg3 *docg3, const void *buf, int len)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun 	int i, cdr, len4;
279*4882a593Smuzhiyun 	u16 *src16;
280*4882a593Smuzhiyun 	u8 *src8;
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	doc_dbg("doc_write_data_area(buf=%p, len=%d)\n", buf, len);
283*4882a593Smuzhiyun 	cdr = len & 0x3;
284*4882a593Smuzhiyun 	len4 = len - cdr;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	doc_writew(docg3, DOC_IOSPACE_DATA, DOC_READADDRESS);
287*4882a593Smuzhiyun 	src16 = (u16 *)buf;
288*4882a593Smuzhiyun 	for (i = 0; i < len4; i += 2) {
289*4882a593Smuzhiyun 		doc_writew(docg3, *src16, DOC_IOSPACE_DATA);
290*4882a593Smuzhiyun 		src16++;
291*4882a593Smuzhiyun 	}
292*4882a593Smuzhiyun 
293*4882a593Smuzhiyun 	src8 = (u8 *)src16;
294*4882a593Smuzhiyun 	for (i = 0; i < cdr; i++) {
295*4882a593Smuzhiyun 		doc_writew(docg3, DOC_IOSPACE_DATA | DOC_READADDR_ONE_BYTE,
296*4882a593Smuzhiyun 			   DOC_READADDRESS);
297*4882a593Smuzhiyun 		doc_writeb(docg3, *src8, DOC_IOSPACE_DATA);
298*4882a593Smuzhiyun 		src8++;
299*4882a593Smuzhiyun 	}
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun /**
303*4882a593Smuzhiyun  * doc_set_data_mode - Sets the flash to normal or reliable data mode
304*4882a593Smuzhiyun  * @docg3: the device
305*4882a593Smuzhiyun  *
306*4882a593Smuzhiyun  * The reliable data mode is a bit slower than the fast mode, but less errors
307*4882a593Smuzhiyun  * occur.  Entering the reliable mode cannot be done without entering the fast
308*4882a593Smuzhiyun  * mode first.
309*4882a593Smuzhiyun  *
310*4882a593Smuzhiyun  * In reliable mode, pages 2*n and 2*n+1 are clones. Writing to page 0 of blocks
311*4882a593Smuzhiyun  * (4,5) make the hardware write also to page 1 of blocks blocks(4,5). Reading
312*4882a593Smuzhiyun  * from page 0 of blocks (4,5) or from page 1 of blocks (4,5) gives the same
313*4882a593Smuzhiyun  * result, which is a logical and between bytes from page 0 and page 1 (which is
314*4882a593Smuzhiyun  * consistent with the fact that writing to a page is _clearing_ bits of that
315*4882a593Smuzhiyun  * page).
316*4882a593Smuzhiyun  */
doc_set_reliable_mode(struct docg3 * docg3)317*4882a593Smuzhiyun static void doc_set_reliable_mode(struct docg3 *docg3)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun 	static char *strmode[] = { "normal", "fast", "reliable", "invalid" };
320*4882a593Smuzhiyun 
321*4882a593Smuzhiyun 	doc_dbg("doc_set_reliable_mode(%s)\n", strmode[docg3->reliable]);
322*4882a593Smuzhiyun 	switch (docg3->reliable) {
323*4882a593Smuzhiyun 	case 0:
324*4882a593Smuzhiyun 		break;
325*4882a593Smuzhiyun 	case 1:
326*4882a593Smuzhiyun 		doc_flash_sequence(docg3, DOC_SEQ_SET_FASTMODE);
327*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_FAST_MODE);
328*4882a593Smuzhiyun 		break;
329*4882a593Smuzhiyun 	case 2:
330*4882a593Smuzhiyun 		doc_flash_sequence(docg3, DOC_SEQ_SET_RELIABLEMODE);
331*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_FAST_MODE);
332*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_RELIABLE_MODE);
333*4882a593Smuzhiyun 		break;
334*4882a593Smuzhiyun 	default:
335*4882a593Smuzhiyun 		doc_err("doc_set_reliable_mode(): invalid mode\n");
336*4882a593Smuzhiyun 		break;
337*4882a593Smuzhiyun 	}
338*4882a593Smuzhiyun 	doc_delay(docg3, 2);
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun /**
342*4882a593Smuzhiyun  * doc_set_asic_mode - Set the ASIC mode
343*4882a593Smuzhiyun  * @docg3: the device
344*4882a593Smuzhiyun  * @mode: the mode
345*4882a593Smuzhiyun  *
346*4882a593Smuzhiyun  * The ASIC can work in 3 modes :
347*4882a593Smuzhiyun  *  - RESET: all registers are zeroed
348*4882a593Smuzhiyun  *  - NORMAL: receives and handles commands
349*4882a593Smuzhiyun  *  - POWERDOWN: minimal poweruse, flash parts shut off
350*4882a593Smuzhiyun  */
doc_set_asic_mode(struct docg3 * docg3,u8 mode)351*4882a593Smuzhiyun static void doc_set_asic_mode(struct docg3 *docg3, u8 mode)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun 	int i;
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun 	for (i = 0; i < 12; i++)
356*4882a593Smuzhiyun 		doc_readb(docg3, DOC_IOSPACE_IPL);
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun 	mode |= DOC_ASICMODE_MDWREN;
359*4882a593Smuzhiyun 	doc_dbg("doc_set_asic_mode(%02x)\n", mode);
360*4882a593Smuzhiyun 	doc_writeb(docg3, mode, DOC_ASICMODE);
361*4882a593Smuzhiyun 	doc_writeb(docg3, ~mode, DOC_ASICMODECONFIRM);
362*4882a593Smuzhiyun 	doc_delay(docg3, 1);
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun /**
366*4882a593Smuzhiyun  * doc_set_device_id - Sets the devices id for cascaded G3 chips
367*4882a593Smuzhiyun  * @docg3: the device
368*4882a593Smuzhiyun  * @id: the chip to select (amongst 0, 1, 2, 3)
369*4882a593Smuzhiyun  *
370*4882a593Smuzhiyun  * There can be 4 cascaded G3 chips. This function selects the one which will
371*4882a593Smuzhiyun  * should be the active one.
372*4882a593Smuzhiyun  */
doc_set_device_id(struct docg3 * docg3,int id)373*4882a593Smuzhiyun static void doc_set_device_id(struct docg3 *docg3, int id)
374*4882a593Smuzhiyun {
375*4882a593Smuzhiyun 	u8 ctrl;
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun 	doc_dbg("doc_set_device_id(%d)\n", id);
378*4882a593Smuzhiyun 	doc_writeb(docg3, id, DOC_DEVICESELECT);
379*4882a593Smuzhiyun 	ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	ctrl &= ~DOC_CTRL_VIOLATION;
382*4882a593Smuzhiyun 	ctrl |= DOC_CTRL_CE;
383*4882a593Smuzhiyun 	doc_writeb(docg3, ctrl, DOC_FLASHCONTROL);
384*4882a593Smuzhiyun }
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun /**
387*4882a593Smuzhiyun  * doc_set_extra_page_mode - Change flash page layout
388*4882a593Smuzhiyun  * @docg3: the device
389*4882a593Smuzhiyun  *
390*4882a593Smuzhiyun  * Normally, the flash page is split into the data (512 bytes) and the out of
391*4882a593Smuzhiyun  * band data (16 bytes). For each, 4 more bytes can be accessed, where the wear
392*4882a593Smuzhiyun  * leveling counters are stored.  To access this last area of 4 bytes, a special
393*4882a593Smuzhiyun  * mode must be input to the flash ASIC.
394*4882a593Smuzhiyun  *
395*4882a593Smuzhiyun  * Returns 0 if no error occurred, -EIO else.
396*4882a593Smuzhiyun  */
doc_set_extra_page_mode(struct docg3 * docg3)397*4882a593Smuzhiyun static int doc_set_extra_page_mode(struct docg3 *docg3)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun 	int fctrl;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	doc_dbg("doc_set_extra_page_mode()\n");
402*4882a593Smuzhiyun 	doc_flash_sequence(docg3, DOC_SEQ_PAGE_SIZE_532);
403*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PAGE_SIZE_532);
404*4882a593Smuzhiyun 	doc_delay(docg3, 2);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	fctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
407*4882a593Smuzhiyun 	if (fctrl & (DOC_CTRL_PROTECTION_ERROR | DOC_CTRL_SEQUENCE_ERROR))
408*4882a593Smuzhiyun 		return -EIO;
409*4882a593Smuzhiyun 	else
410*4882a593Smuzhiyun 		return 0;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun /**
414*4882a593Smuzhiyun  * doc_setup_addr_sector - Setup blocks/page/ofs address for one plane
415*4882a593Smuzhiyun  * @docg3: the device
416*4882a593Smuzhiyun  * @sector: the sector
417*4882a593Smuzhiyun  */
doc_setup_addr_sector(struct docg3 * docg3,int sector)418*4882a593Smuzhiyun static void doc_setup_addr_sector(struct docg3 *docg3, int sector)
419*4882a593Smuzhiyun {
420*4882a593Smuzhiyun 	doc_delay(docg3, 1);
421*4882a593Smuzhiyun 	doc_flash_address(docg3, sector & 0xff);
422*4882a593Smuzhiyun 	doc_flash_address(docg3, (sector >> 8) & 0xff);
423*4882a593Smuzhiyun 	doc_flash_address(docg3, (sector >> 16) & 0xff);
424*4882a593Smuzhiyun 	doc_delay(docg3, 1);
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun /**
428*4882a593Smuzhiyun  * doc_setup_writeaddr_sector - Setup blocks/page/ofs address for one plane
429*4882a593Smuzhiyun  * @docg3: the device
430*4882a593Smuzhiyun  * @sector: the sector
431*4882a593Smuzhiyun  * @ofs: the offset in the page, between 0 and (512 + 16 + 512)
432*4882a593Smuzhiyun  */
doc_setup_writeaddr_sector(struct docg3 * docg3,int sector,int ofs)433*4882a593Smuzhiyun static void doc_setup_writeaddr_sector(struct docg3 *docg3, int sector, int ofs)
434*4882a593Smuzhiyun {
435*4882a593Smuzhiyun 	ofs = ofs >> 2;
436*4882a593Smuzhiyun 	doc_delay(docg3, 1);
437*4882a593Smuzhiyun 	doc_flash_address(docg3, ofs & 0xff);
438*4882a593Smuzhiyun 	doc_flash_address(docg3, sector & 0xff);
439*4882a593Smuzhiyun 	doc_flash_address(docg3, (sector >> 8) & 0xff);
440*4882a593Smuzhiyun 	doc_flash_address(docg3, (sector >> 16) & 0xff);
441*4882a593Smuzhiyun 	doc_delay(docg3, 1);
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun /**
445*4882a593Smuzhiyun  * doc_seek - Set both flash planes to the specified block, page for reading
446*4882a593Smuzhiyun  * @docg3: the device
447*4882a593Smuzhiyun  * @block0: the first plane block index
448*4882a593Smuzhiyun  * @block1: the second plane block index
449*4882a593Smuzhiyun  * @page: the page index within the block
450*4882a593Smuzhiyun  * @wear: if true, read will occur on the 4 extra bytes of the wear area
451*4882a593Smuzhiyun  * @ofs: offset in page to read
452*4882a593Smuzhiyun  *
453*4882a593Smuzhiyun  * Programs the flash even and odd planes to the specific block and page.
454*4882a593Smuzhiyun  * Alternatively, programs the flash to the wear area of the specified page.
455*4882a593Smuzhiyun  */
doc_read_seek(struct docg3 * docg3,int block0,int block1,int page,int wear,int ofs)456*4882a593Smuzhiyun static int doc_read_seek(struct docg3 *docg3, int block0, int block1, int page,
457*4882a593Smuzhiyun 			 int wear, int ofs)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun 	int sector, ret = 0;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	doc_dbg("doc_seek(blocks=(%d,%d), page=%d, ofs=%d, wear=%d)\n",
462*4882a593Smuzhiyun 		block0, block1, page, ofs, wear);
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	if (!wear && (ofs < 2 * DOC_LAYOUT_PAGE_SIZE)) {
465*4882a593Smuzhiyun 		doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE1);
466*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_READ_PLANE1);
467*4882a593Smuzhiyun 		doc_delay(docg3, 2);
468*4882a593Smuzhiyun 	} else {
469*4882a593Smuzhiyun 		doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE2);
470*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_READ_PLANE2);
471*4882a593Smuzhiyun 		doc_delay(docg3, 2);
472*4882a593Smuzhiyun 	}
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	doc_set_reliable_mode(docg3);
475*4882a593Smuzhiyun 	if (wear)
476*4882a593Smuzhiyun 		ret = doc_set_extra_page_mode(docg3);
477*4882a593Smuzhiyun 	if (ret)
478*4882a593Smuzhiyun 		goto out;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	doc_flash_sequence(docg3, DOC_SEQ_READ);
481*4882a593Smuzhiyun 	sector = (block0 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
482*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
483*4882a593Smuzhiyun 	doc_setup_addr_sector(docg3, sector);
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	sector = (block1 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
486*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
487*4882a593Smuzhiyun 	doc_setup_addr_sector(docg3, sector);
488*4882a593Smuzhiyun 	doc_delay(docg3, 1);
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun out:
491*4882a593Smuzhiyun 	return ret;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun 
494*4882a593Smuzhiyun /**
495*4882a593Smuzhiyun  * doc_write_seek - Set both flash planes to the specified block, page for writing
496*4882a593Smuzhiyun  * @docg3: the device
497*4882a593Smuzhiyun  * @block0: the first plane block index
498*4882a593Smuzhiyun  * @block1: the second plane block index
499*4882a593Smuzhiyun  * @page: the page index within the block
500*4882a593Smuzhiyun  * @ofs: offset in page to write
501*4882a593Smuzhiyun  *
502*4882a593Smuzhiyun  * Programs the flash even and odd planes to the specific block and page.
503*4882a593Smuzhiyun  * Alternatively, programs the flash to the wear area of the specified page.
504*4882a593Smuzhiyun  */
doc_write_seek(struct docg3 * docg3,int block0,int block1,int page,int ofs)505*4882a593Smuzhiyun static int doc_write_seek(struct docg3 *docg3, int block0, int block1, int page,
506*4882a593Smuzhiyun 			 int ofs)
507*4882a593Smuzhiyun {
508*4882a593Smuzhiyun 	int ret = 0, sector;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	doc_dbg("doc_write_seek(blocks=(%d,%d), page=%d, ofs=%d)\n",
511*4882a593Smuzhiyun 		block0, block1, page, ofs);
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	doc_set_reliable_mode(docg3);
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	if (ofs < 2 * DOC_LAYOUT_PAGE_SIZE) {
516*4882a593Smuzhiyun 		doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE1);
517*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_READ_PLANE1);
518*4882a593Smuzhiyun 		doc_delay(docg3, 2);
519*4882a593Smuzhiyun 	} else {
520*4882a593Smuzhiyun 		doc_flash_sequence(docg3, DOC_SEQ_SET_PLANE2);
521*4882a593Smuzhiyun 		doc_flash_command(docg3, DOC_CMD_READ_PLANE2);
522*4882a593Smuzhiyun 		doc_delay(docg3, 2);
523*4882a593Smuzhiyun 	}
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	doc_flash_sequence(docg3, DOC_SEQ_PAGE_SETUP);
526*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_CYCLE1);
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	sector = (block0 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
529*4882a593Smuzhiyun 	doc_setup_writeaddr_sector(docg3, sector, ofs);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_CYCLE3);
532*4882a593Smuzhiyun 	doc_delay(docg3, 2);
533*4882a593Smuzhiyun 	ret = doc_wait_ready(docg3);
534*4882a593Smuzhiyun 	if (ret)
535*4882a593Smuzhiyun 		goto out;
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_CYCLE1);
538*4882a593Smuzhiyun 	sector = (block1 << DOC_ADDR_BLOCK_SHIFT) + (page & DOC_ADDR_PAGE_MASK);
539*4882a593Smuzhiyun 	doc_setup_writeaddr_sector(docg3, sector, ofs);
540*4882a593Smuzhiyun 	doc_delay(docg3, 1);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun out:
543*4882a593Smuzhiyun 	return ret;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 
547*4882a593Smuzhiyun /**
548*4882a593Smuzhiyun  * doc_read_page_ecc_init - Initialize hardware ECC engine
549*4882a593Smuzhiyun  * @docg3: the device
550*4882a593Smuzhiyun  * @len: the number of bytes covered by the ECC (BCH covered)
551*4882a593Smuzhiyun  *
552*4882a593Smuzhiyun  * The function does initialize the hardware ECC engine to compute the Hamming
553*4882a593Smuzhiyun  * ECC (on 1 byte) and the BCH hardware ECC (on 7 bytes).
554*4882a593Smuzhiyun  *
555*4882a593Smuzhiyun  * Return 0 if succeeded, -EIO on error
556*4882a593Smuzhiyun  */
doc_read_page_ecc_init(struct docg3 * docg3,int len)557*4882a593Smuzhiyun static int doc_read_page_ecc_init(struct docg3 *docg3, int len)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun 	doc_writew(docg3, DOC_ECCCONF0_READ_MODE
560*4882a593Smuzhiyun 		   | DOC_ECCCONF0_BCH_ENABLE | DOC_ECCCONF0_HAMMING_ENABLE
561*4882a593Smuzhiyun 		   | (len & DOC_ECCCONF0_DATA_BYTES_MASK),
562*4882a593Smuzhiyun 		   DOC_ECCCONF0);
563*4882a593Smuzhiyun 	doc_delay(docg3, 4);
564*4882a593Smuzhiyun 	doc_register_readb(docg3, DOC_FLASHCONTROL);
565*4882a593Smuzhiyun 	return doc_wait_ready(docg3);
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun /**
569*4882a593Smuzhiyun  * doc_write_page_ecc_init - Initialize hardware BCH ECC engine
570*4882a593Smuzhiyun  * @docg3: the device
571*4882a593Smuzhiyun  * @len: the number of bytes covered by the ECC (BCH covered)
572*4882a593Smuzhiyun  *
573*4882a593Smuzhiyun  * The function does initialize the hardware ECC engine to compute the Hamming
574*4882a593Smuzhiyun  * ECC (on 1 byte) and the BCH hardware ECC (on 7 bytes).
575*4882a593Smuzhiyun  *
576*4882a593Smuzhiyun  * Return 0 if succeeded, -EIO on error
577*4882a593Smuzhiyun  */
doc_write_page_ecc_init(struct docg3 * docg3,int len)578*4882a593Smuzhiyun static int doc_write_page_ecc_init(struct docg3 *docg3, int len)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun 	doc_writew(docg3, DOC_ECCCONF0_WRITE_MODE
581*4882a593Smuzhiyun 		   | DOC_ECCCONF0_BCH_ENABLE | DOC_ECCCONF0_HAMMING_ENABLE
582*4882a593Smuzhiyun 		   | (len & DOC_ECCCONF0_DATA_BYTES_MASK),
583*4882a593Smuzhiyun 		   DOC_ECCCONF0);
584*4882a593Smuzhiyun 	doc_delay(docg3, 4);
585*4882a593Smuzhiyun 	doc_register_readb(docg3, DOC_FLASHCONTROL);
586*4882a593Smuzhiyun 	return doc_wait_ready(docg3);
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun /**
590*4882a593Smuzhiyun  * doc_ecc_disable - Disable Hamming and BCH ECC hardware calculator
591*4882a593Smuzhiyun  * @docg3: the device
592*4882a593Smuzhiyun  *
593*4882a593Smuzhiyun  * Disables the hardware ECC generator and checker, for unchecked reads (as when
594*4882a593Smuzhiyun  * reading OOB only or write status byte).
595*4882a593Smuzhiyun  */
doc_ecc_disable(struct docg3 * docg3)596*4882a593Smuzhiyun static void doc_ecc_disable(struct docg3 *docg3)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun 	doc_writew(docg3, DOC_ECCCONF0_READ_MODE, DOC_ECCCONF0);
599*4882a593Smuzhiyun 	doc_delay(docg3, 4);
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun /**
603*4882a593Smuzhiyun  * doc_hamming_ecc_init - Initialize hardware Hamming ECC engine
604*4882a593Smuzhiyun  * @docg3: the device
605*4882a593Smuzhiyun  * @nb_bytes: the number of bytes covered by the ECC (Hamming covered)
606*4882a593Smuzhiyun  *
607*4882a593Smuzhiyun  * This function programs the ECC hardware to compute the hamming code on the
608*4882a593Smuzhiyun  * last provided N bytes to the hardware generator.
609*4882a593Smuzhiyun  */
doc_hamming_ecc_init(struct docg3 * docg3,int nb_bytes)610*4882a593Smuzhiyun static void doc_hamming_ecc_init(struct docg3 *docg3, int nb_bytes)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun 	u8 ecc_conf1;
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	ecc_conf1 = doc_register_readb(docg3, DOC_ECCCONF1);
615*4882a593Smuzhiyun 	ecc_conf1 &= ~DOC_ECCCONF1_HAMMING_BITS_MASK;
616*4882a593Smuzhiyun 	ecc_conf1 |= (nb_bytes & DOC_ECCCONF1_HAMMING_BITS_MASK);
617*4882a593Smuzhiyun 	doc_writeb(docg3, ecc_conf1, DOC_ECCCONF1);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun /**
621*4882a593Smuzhiyun  * doc_ecc_bch_fix_data - Fix if need be read data from flash
622*4882a593Smuzhiyun  * @docg3: the device
623*4882a593Smuzhiyun  * @buf: the buffer of read data (512 + 7 + 1 bytes)
624*4882a593Smuzhiyun  * @hwecc: the hardware calculated ECC.
625*4882a593Smuzhiyun  *         It's in fact recv_ecc ^ calc_ecc, where recv_ecc was read from OOB
626*4882a593Smuzhiyun  *         area data, and calc_ecc the ECC calculated by the hardware generator.
627*4882a593Smuzhiyun  *
628*4882a593Smuzhiyun  * Checks if the received data matches the ECC, and if an error is detected,
629*4882a593Smuzhiyun  * tries to fix the bit flips (at most 4) in the buffer buf.  As the docg3
630*4882a593Smuzhiyun  * understands the (data, ecc, syndroms) in an inverted order in comparison to
631*4882a593Smuzhiyun  * the BCH library, the function reverses the order of bits (ie. bit7 and bit0,
632*4882a593Smuzhiyun  * bit6 and bit 1, ...) for all ECC data.
633*4882a593Smuzhiyun  *
634*4882a593Smuzhiyun  * The hardware ecc unit produces oob_ecc ^ calc_ecc.  The kernel's bch
635*4882a593Smuzhiyun  * algorithm is used to decode this.  However the hw operates on page
636*4882a593Smuzhiyun  * data in a bit order that is the reverse of that of the bch alg,
637*4882a593Smuzhiyun  * requiring that the bits be reversed on the result.  Thanks to Ivan
638*4882a593Smuzhiyun  * Djelic for his analysis.
639*4882a593Smuzhiyun  *
640*4882a593Smuzhiyun  * Returns number of fixed bits (0, 1, 2, 3, 4) or -EBADMSG if too many bit
641*4882a593Smuzhiyun  * errors were detected and cannot be fixed.
642*4882a593Smuzhiyun  */
doc_ecc_bch_fix_data(struct docg3 * docg3,void * buf,u8 * hwecc)643*4882a593Smuzhiyun static int doc_ecc_bch_fix_data(struct docg3 *docg3, void *buf, u8 *hwecc)
644*4882a593Smuzhiyun {
645*4882a593Smuzhiyun 	u8 ecc[DOC_ECC_BCH_SIZE];
646*4882a593Smuzhiyun 	int errorpos[DOC_ECC_BCH_T], i, numerrs;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
649*4882a593Smuzhiyun 		ecc[i] = bitrev8(hwecc[i]);
650*4882a593Smuzhiyun 	numerrs = bch_decode(docg3->cascade->bch, NULL,
651*4882a593Smuzhiyun 			     DOC_ECC_BCH_COVERED_BYTES,
652*4882a593Smuzhiyun 			     NULL, ecc, NULL, errorpos);
653*4882a593Smuzhiyun 	BUG_ON(numerrs == -EINVAL);
654*4882a593Smuzhiyun 	if (numerrs < 0)
655*4882a593Smuzhiyun 		goto out;
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	for (i = 0; i < numerrs; i++)
658*4882a593Smuzhiyun 		errorpos[i] = (errorpos[i] & ~7) | (7 - (errorpos[i] & 7));
659*4882a593Smuzhiyun 	for (i = 0; i < numerrs; i++)
660*4882a593Smuzhiyun 		if (errorpos[i] < DOC_ECC_BCH_COVERED_BYTES*8)
661*4882a593Smuzhiyun 			/* error is located in data, correct it */
662*4882a593Smuzhiyun 			change_bit(errorpos[i], buf);
663*4882a593Smuzhiyun out:
664*4882a593Smuzhiyun 	doc_dbg("doc_ecc_bch_fix_data: flipped %d bits\n", numerrs);
665*4882a593Smuzhiyun 	return numerrs;
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 
669*4882a593Smuzhiyun /**
670*4882a593Smuzhiyun  * doc_read_page_prepare - Prepares reading data from a flash page
671*4882a593Smuzhiyun  * @docg3: the device
672*4882a593Smuzhiyun  * @block0: the first plane block index on flash memory
673*4882a593Smuzhiyun  * @block1: the second plane block index on flash memory
674*4882a593Smuzhiyun  * @page: the page index in the block
675*4882a593Smuzhiyun  * @offset: the offset in the page (must be a multiple of 4)
676*4882a593Smuzhiyun  *
677*4882a593Smuzhiyun  * Prepares the page to be read in the flash memory :
678*4882a593Smuzhiyun  *   - tell ASIC to map the flash pages
679*4882a593Smuzhiyun  *   - tell ASIC to be in read mode
680*4882a593Smuzhiyun  *
681*4882a593Smuzhiyun  * After a call to this method, a call to doc_read_page_finish is mandatory,
682*4882a593Smuzhiyun  * to end the read cycle of the flash.
683*4882a593Smuzhiyun  *
684*4882a593Smuzhiyun  * Read data from a flash page. The length to be read must be between 0 and
685*4882a593Smuzhiyun  * (page_size + oob_size + wear_size), ie. 532, and a multiple of 4 (because
686*4882a593Smuzhiyun  * the extra bytes reading is not implemented).
687*4882a593Smuzhiyun  *
688*4882a593Smuzhiyun  * As pages are grouped by 2 (in 2 planes), reading from a page must be done
689*4882a593Smuzhiyun  * in two steps:
690*4882a593Smuzhiyun  *  - one read of 512 bytes at offset 0
691*4882a593Smuzhiyun  *  - one read of 512 bytes at offset 512 + 16
692*4882a593Smuzhiyun  *
693*4882a593Smuzhiyun  * Returns 0 if successful, -EIO if a read error occurred.
694*4882a593Smuzhiyun  */
doc_read_page_prepare(struct docg3 * docg3,int block0,int block1,int page,int offset)695*4882a593Smuzhiyun static int doc_read_page_prepare(struct docg3 *docg3, int block0, int block1,
696*4882a593Smuzhiyun 				 int page, int offset)
697*4882a593Smuzhiyun {
698*4882a593Smuzhiyun 	int wear_area = 0, ret = 0;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	doc_dbg("doc_read_page_prepare(blocks=(%d,%d), page=%d, ofsInPage=%d)\n",
701*4882a593Smuzhiyun 		block0, block1, page, offset);
702*4882a593Smuzhiyun 	if (offset >= DOC_LAYOUT_WEAR_OFFSET)
703*4882a593Smuzhiyun 		wear_area = 1;
704*4882a593Smuzhiyun 	if (!wear_area && offset > (DOC_LAYOUT_PAGE_OOB_SIZE * 2))
705*4882a593Smuzhiyun 		return -EINVAL;
706*4882a593Smuzhiyun 
707*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
708*4882a593Smuzhiyun 	ret = doc_reset_seq(docg3);
709*4882a593Smuzhiyun 	if (ret)
710*4882a593Smuzhiyun 		goto err;
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 	/* Program the flash address block and page */
713*4882a593Smuzhiyun 	ret = doc_read_seek(docg3, block0, block1, page, wear_area, offset);
714*4882a593Smuzhiyun 	if (ret)
715*4882a593Smuzhiyun 		goto err;
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_READ_ALL_PLANES);
718*4882a593Smuzhiyun 	doc_delay(docg3, 2);
719*4882a593Smuzhiyun 	doc_wait_ready(docg3);
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_SET_ADDR_READ);
722*4882a593Smuzhiyun 	doc_delay(docg3, 1);
723*4882a593Smuzhiyun 	if (offset >= DOC_LAYOUT_PAGE_SIZE * 2)
724*4882a593Smuzhiyun 		offset -= 2 * DOC_LAYOUT_PAGE_SIZE;
725*4882a593Smuzhiyun 	doc_flash_address(docg3, offset >> 2);
726*4882a593Smuzhiyun 	doc_delay(docg3, 1);
727*4882a593Smuzhiyun 	doc_wait_ready(docg3);
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_READ_FLASH);
730*4882a593Smuzhiyun 
731*4882a593Smuzhiyun 	return 0;
732*4882a593Smuzhiyun err:
733*4882a593Smuzhiyun 	doc_writeb(docg3, 0, DOC_DATAEND);
734*4882a593Smuzhiyun 	doc_delay(docg3, 2);
735*4882a593Smuzhiyun 	return -EIO;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun /**
739*4882a593Smuzhiyun  * doc_read_page_getbytes - Reads bytes from a prepared page
740*4882a593Smuzhiyun  * @docg3: the device
741*4882a593Smuzhiyun  * @len: the number of bytes to be read (must be a multiple of 4)
742*4882a593Smuzhiyun  * @buf: the buffer to be filled in (or NULL is forget bytes)
743*4882a593Smuzhiyun  * @first: 1 if first time read, DOC_READADDRESS should be set
744*4882a593Smuzhiyun  * @last_odd: 1 if last read ended up on an odd byte
745*4882a593Smuzhiyun  *
746*4882a593Smuzhiyun  * Reads bytes from a prepared page. There is a trickery here : if the last read
747*4882a593Smuzhiyun  * ended up on an odd offset in the 1024 bytes double page, ie. between the 2
748*4882a593Smuzhiyun  * planes, the first byte must be read apart. If a word (16bit) read was used,
749*4882a593Smuzhiyun  * the read would return the byte of plane 2 as low *and* high endian, which
750*4882a593Smuzhiyun  * will mess the read.
751*4882a593Smuzhiyun  *
752*4882a593Smuzhiyun  */
doc_read_page_getbytes(struct docg3 * docg3,int len,u_char * buf,int first,int last_odd)753*4882a593Smuzhiyun static int doc_read_page_getbytes(struct docg3 *docg3, int len, u_char *buf,
754*4882a593Smuzhiyun 				  int first, int last_odd)
755*4882a593Smuzhiyun {
756*4882a593Smuzhiyun 	if (last_odd && len > 0) {
757*4882a593Smuzhiyun 		doc_read_data_area(docg3, buf, 1, first);
758*4882a593Smuzhiyun 		doc_read_data_area(docg3, buf ? buf + 1 : buf, len - 1, 0);
759*4882a593Smuzhiyun 	} else {
760*4882a593Smuzhiyun 		doc_read_data_area(docg3, buf, len, first);
761*4882a593Smuzhiyun 	}
762*4882a593Smuzhiyun 	doc_delay(docg3, 2);
763*4882a593Smuzhiyun 	return len;
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun /**
767*4882a593Smuzhiyun  * doc_write_page_putbytes - Writes bytes into a prepared page
768*4882a593Smuzhiyun  * @docg3: the device
769*4882a593Smuzhiyun  * @len: the number of bytes to be written
770*4882a593Smuzhiyun  * @buf: the buffer of input bytes
771*4882a593Smuzhiyun  *
772*4882a593Smuzhiyun  */
doc_write_page_putbytes(struct docg3 * docg3,int len,const u_char * buf)773*4882a593Smuzhiyun static void doc_write_page_putbytes(struct docg3 *docg3, int len,
774*4882a593Smuzhiyun 				    const u_char *buf)
775*4882a593Smuzhiyun {
776*4882a593Smuzhiyun 	doc_write_data_area(docg3, buf, len);
777*4882a593Smuzhiyun 	doc_delay(docg3, 2);
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun /**
781*4882a593Smuzhiyun  * doc_get_bch_hw_ecc - Get hardware calculated BCH ECC
782*4882a593Smuzhiyun  * @docg3: the device
783*4882a593Smuzhiyun  * @hwecc:  the array of 7 integers where the hardware ecc will be stored
784*4882a593Smuzhiyun  */
doc_get_bch_hw_ecc(struct docg3 * docg3,u8 * hwecc)785*4882a593Smuzhiyun static void doc_get_bch_hw_ecc(struct docg3 *docg3, u8 *hwecc)
786*4882a593Smuzhiyun {
787*4882a593Smuzhiyun 	int i;
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	for (i = 0; i < DOC_ECC_BCH_SIZE; i++)
790*4882a593Smuzhiyun 		hwecc[i] = doc_register_readb(docg3, DOC_BCH_HW_ECC(i));
791*4882a593Smuzhiyun }
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun /**
794*4882a593Smuzhiyun  * doc_page_finish - Ends reading/writing of a flash page
795*4882a593Smuzhiyun  * @docg3: the device
796*4882a593Smuzhiyun  */
doc_page_finish(struct docg3 * docg3)797*4882a593Smuzhiyun static void doc_page_finish(struct docg3 *docg3)
798*4882a593Smuzhiyun {
799*4882a593Smuzhiyun 	doc_writeb(docg3, 0, DOC_DATAEND);
800*4882a593Smuzhiyun 	doc_delay(docg3, 2);
801*4882a593Smuzhiyun }
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun /**
804*4882a593Smuzhiyun  * doc_read_page_finish - Ends reading of a flash page
805*4882a593Smuzhiyun  * @docg3: the device
806*4882a593Smuzhiyun  *
807*4882a593Smuzhiyun  * As a side effect, resets the chip selector to 0. This ensures that after each
808*4882a593Smuzhiyun  * read operation, the floor 0 is selected. Therefore, if the systems halts, the
809*4882a593Smuzhiyun  * reboot will boot on floor 0, where the IPL is.
810*4882a593Smuzhiyun  */
doc_read_page_finish(struct docg3 * docg3)811*4882a593Smuzhiyun static void doc_read_page_finish(struct docg3 *docg3)
812*4882a593Smuzhiyun {
813*4882a593Smuzhiyun 	doc_page_finish(docg3);
814*4882a593Smuzhiyun 	doc_set_device_id(docg3, 0);
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun /**
818*4882a593Smuzhiyun  * calc_block_sector - Calculate blocks, pages and ofs.
819*4882a593Smuzhiyun 
820*4882a593Smuzhiyun  * @from: offset in flash
821*4882a593Smuzhiyun  * @block0: first plane block index calculated
822*4882a593Smuzhiyun  * @block1: second plane block index calculated
823*4882a593Smuzhiyun  * @page: page calculated
824*4882a593Smuzhiyun  * @ofs: offset in page
825*4882a593Smuzhiyun  * @reliable: 0 if docg3 in normal mode, 1 if docg3 in fast mode, 2 if docg3 in
826*4882a593Smuzhiyun  * reliable mode.
827*4882a593Smuzhiyun  *
828*4882a593Smuzhiyun  * The calculation is based on the reliable/normal mode. In normal mode, the 64
829*4882a593Smuzhiyun  * pages of a block are available. In reliable mode, as pages 2*n and 2*n+1 are
830*4882a593Smuzhiyun  * clones, only 32 pages per block are available.
831*4882a593Smuzhiyun  */
calc_block_sector(loff_t from,int * block0,int * block1,int * page,int * ofs,int reliable)832*4882a593Smuzhiyun static void calc_block_sector(loff_t from, int *block0, int *block1, int *page,
833*4882a593Smuzhiyun 			      int *ofs, int reliable)
834*4882a593Smuzhiyun {
835*4882a593Smuzhiyun 	uint sector, pages_biblock;
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	pages_biblock = DOC_LAYOUT_PAGES_PER_BLOCK * DOC_LAYOUT_NBPLANES;
838*4882a593Smuzhiyun 	if (reliable == 1 || reliable == 2)
839*4882a593Smuzhiyun 		pages_biblock /= 2;
840*4882a593Smuzhiyun 
841*4882a593Smuzhiyun 	sector = from / DOC_LAYOUT_PAGE_SIZE;
842*4882a593Smuzhiyun 	*block0 = sector / pages_biblock * DOC_LAYOUT_NBPLANES;
843*4882a593Smuzhiyun 	*block1 = *block0 + 1;
844*4882a593Smuzhiyun 	*page = sector % pages_biblock;
845*4882a593Smuzhiyun 	*page /= DOC_LAYOUT_NBPLANES;
846*4882a593Smuzhiyun 	if (reliable == 1 || reliable == 2)
847*4882a593Smuzhiyun 		*page *= 2;
848*4882a593Smuzhiyun 	if (sector % 2)
849*4882a593Smuzhiyun 		*ofs = DOC_LAYOUT_PAGE_OOB_SIZE;
850*4882a593Smuzhiyun 	else
851*4882a593Smuzhiyun 		*ofs = 0;
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun /**
855*4882a593Smuzhiyun  * doc_read_oob - Read out of band bytes from flash
856*4882a593Smuzhiyun  * @mtd: the device
857*4882a593Smuzhiyun  * @from: the offset from first block and first page, in bytes, aligned on page
858*4882a593Smuzhiyun  *        size
859*4882a593Smuzhiyun  * @ops: the mtd oob structure
860*4882a593Smuzhiyun  *
861*4882a593Smuzhiyun  * Reads flash memory OOB area of pages.
862*4882a593Smuzhiyun  *
863*4882a593Smuzhiyun  * Returns 0 if read successful, of -EIO, -EINVAL if an error occurred
864*4882a593Smuzhiyun  */
doc_read_oob(struct mtd_info * mtd,loff_t from,struct mtd_oob_ops * ops)865*4882a593Smuzhiyun static int doc_read_oob(struct mtd_info *mtd, loff_t from,
866*4882a593Smuzhiyun 			struct mtd_oob_ops *ops)
867*4882a593Smuzhiyun {
868*4882a593Smuzhiyun 	struct docg3 *docg3 = mtd->priv;
869*4882a593Smuzhiyun 	int block0, block1, page, ret, skip, ofs = 0;
870*4882a593Smuzhiyun 	u8 *oobbuf = ops->oobbuf;
871*4882a593Smuzhiyun 	u8 *buf = ops->datbuf;
872*4882a593Smuzhiyun 	size_t len, ooblen, nbdata, nboob;
873*4882a593Smuzhiyun 	u8 hwecc[DOC_ECC_BCH_SIZE], eccconf1;
874*4882a593Smuzhiyun 	int max_bitflips = 0;
875*4882a593Smuzhiyun 
876*4882a593Smuzhiyun 	if (buf)
877*4882a593Smuzhiyun 		len = ops->len;
878*4882a593Smuzhiyun 	else
879*4882a593Smuzhiyun 		len = 0;
880*4882a593Smuzhiyun 	if (oobbuf)
881*4882a593Smuzhiyun 		ooblen = ops->ooblen;
882*4882a593Smuzhiyun 	else
883*4882a593Smuzhiyun 		ooblen = 0;
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	if (oobbuf && ops->mode == MTD_OPS_PLACE_OOB)
886*4882a593Smuzhiyun 		oobbuf += ops->ooboffs;
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 	doc_dbg("doc_read_oob(from=%lld, mode=%d, data=(%p:%zu), oob=(%p:%zu))\n",
889*4882a593Smuzhiyun 		from, ops->mode, buf, len, oobbuf, ooblen);
890*4882a593Smuzhiyun 	if (ooblen % DOC_LAYOUT_OOB_SIZE)
891*4882a593Smuzhiyun 		return -EINVAL;
892*4882a593Smuzhiyun 
893*4882a593Smuzhiyun 	ops->oobretlen = 0;
894*4882a593Smuzhiyun 	ops->retlen = 0;
895*4882a593Smuzhiyun 	ret = 0;
896*4882a593Smuzhiyun 	skip = from % DOC_LAYOUT_PAGE_SIZE;
897*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
898*4882a593Smuzhiyun 	while (ret >= 0 && (len > 0 || ooblen > 0)) {
899*4882a593Smuzhiyun 		calc_block_sector(from - skip, &block0, &block1, &page, &ofs,
900*4882a593Smuzhiyun 			docg3->reliable);
901*4882a593Smuzhiyun 		nbdata = min_t(size_t, len, DOC_LAYOUT_PAGE_SIZE - skip);
902*4882a593Smuzhiyun 		nboob = min_t(size_t, ooblen, (size_t)DOC_LAYOUT_OOB_SIZE);
903*4882a593Smuzhiyun 		ret = doc_read_page_prepare(docg3, block0, block1, page, ofs);
904*4882a593Smuzhiyun 		if (ret < 0)
905*4882a593Smuzhiyun 			goto out;
906*4882a593Smuzhiyun 		ret = doc_read_page_ecc_init(docg3, DOC_ECC_BCH_TOTAL_BYTES);
907*4882a593Smuzhiyun 		if (ret < 0)
908*4882a593Smuzhiyun 			goto err_in_read;
909*4882a593Smuzhiyun 		ret = doc_read_page_getbytes(docg3, skip, NULL, 1, 0);
910*4882a593Smuzhiyun 		if (ret < skip)
911*4882a593Smuzhiyun 			goto err_in_read;
912*4882a593Smuzhiyun 		ret = doc_read_page_getbytes(docg3, nbdata, buf, 0, skip % 2);
913*4882a593Smuzhiyun 		if (ret < nbdata)
914*4882a593Smuzhiyun 			goto err_in_read;
915*4882a593Smuzhiyun 		doc_read_page_getbytes(docg3,
916*4882a593Smuzhiyun 				       DOC_LAYOUT_PAGE_SIZE - nbdata - skip,
917*4882a593Smuzhiyun 				       NULL, 0, (skip + nbdata) % 2);
918*4882a593Smuzhiyun 		ret = doc_read_page_getbytes(docg3, nboob, oobbuf, 0, 0);
919*4882a593Smuzhiyun 		if (ret < nboob)
920*4882a593Smuzhiyun 			goto err_in_read;
921*4882a593Smuzhiyun 		doc_read_page_getbytes(docg3, DOC_LAYOUT_OOB_SIZE - nboob,
922*4882a593Smuzhiyun 				       NULL, 0, nboob % 2);
923*4882a593Smuzhiyun 
924*4882a593Smuzhiyun 		doc_get_bch_hw_ecc(docg3, hwecc);
925*4882a593Smuzhiyun 		eccconf1 = doc_register_readb(docg3, DOC_ECCCONF1);
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun 		if (nboob >= DOC_LAYOUT_OOB_SIZE) {
928*4882a593Smuzhiyun 			doc_dbg("OOB - INFO: %*phC\n", 7, oobbuf);
929*4882a593Smuzhiyun 			doc_dbg("OOB - HAMMING: %02x\n", oobbuf[7]);
930*4882a593Smuzhiyun 			doc_dbg("OOB - BCH_ECC: %*phC\n", 7, oobbuf + 8);
931*4882a593Smuzhiyun 			doc_dbg("OOB - UNUSED: %02x\n", oobbuf[15]);
932*4882a593Smuzhiyun 		}
933*4882a593Smuzhiyun 		doc_dbg("ECC checks: ECCConf1=%x\n", eccconf1);
934*4882a593Smuzhiyun 		doc_dbg("ECC HW_ECC: %*phC\n", 7, hwecc);
935*4882a593Smuzhiyun 
936*4882a593Smuzhiyun 		ret = -EIO;
937*4882a593Smuzhiyun 		if (is_prot_seq_error(docg3))
938*4882a593Smuzhiyun 			goto err_in_read;
939*4882a593Smuzhiyun 		ret = 0;
940*4882a593Smuzhiyun 		if ((block0 >= DOC_LAYOUT_BLOCK_FIRST_DATA) &&
941*4882a593Smuzhiyun 		    (eccconf1 & DOC_ECCCONF1_BCH_SYNDROM_ERR) &&
942*4882a593Smuzhiyun 		    (eccconf1 & DOC_ECCCONF1_PAGE_IS_WRITTEN) &&
943*4882a593Smuzhiyun 		    (ops->mode != MTD_OPS_RAW) &&
944*4882a593Smuzhiyun 		    (nbdata == DOC_LAYOUT_PAGE_SIZE)) {
945*4882a593Smuzhiyun 			ret = doc_ecc_bch_fix_data(docg3, buf, hwecc);
946*4882a593Smuzhiyun 			if (ret < 0) {
947*4882a593Smuzhiyun 				mtd->ecc_stats.failed++;
948*4882a593Smuzhiyun 				ret = -EBADMSG;
949*4882a593Smuzhiyun 			}
950*4882a593Smuzhiyun 			if (ret > 0) {
951*4882a593Smuzhiyun 				mtd->ecc_stats.corrected += ret;
952*4882a593Smuzhiyun 				max_bitflips = max(max_bitflips, ret);
953*4882a593Smuzhiyun 				ret = max_bitflips;
954*4882a593Smuzhiyun 			}
955*4882a593Smuzhiyun 		}
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 		doc_read_page_finish(docg3);
958*4882a593Smuzhiyun 		ops->retlen += nbdata;
959*4882a593Smuzhiyun 		ops->oobretlen += nboob;
960*4882a593Smuzhiyun 		buf += nbdata;
961*4882a593Smuzhiyun 		oobbuf += nboob;
962*4882a593Smuzhiyun 		len -= nbdata;
963*4882a593Smuzhiyun 		ooblen -= nboob;
964*4882a593Smuzhiyun 		from += DOC_LAYOUT_PAGE_SIZE;
965*4882a593Smuzhiyun 		skip = 0;
966*4882a593Smuzhiyun 	}
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun out:
969*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
970*4882a593Smuzhiyun 	return ret;
971*4882a593Smuzhiyun err_in_read:
972*4882a593Smuzhiyun 	doc_read_page_finish(docg3);
973*4882a593Smuzhiyun 	goto out;
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun 
doc_reload_bbt(struct docg3 * docg3)976*4882a593Smuzhiyun static int doc_reload_bbt(struct docg3 *docg3)
977*4882a593Smuzhiyun {
978*4882a593Smuzhiyun 	int block = DOC_LAYOUT_BLOCK_BBT;
979*4882a593Smuzhiyun 	int ret = 0, nbpages, page;
980*4882a593Smuzhiyun 	u_char *buf = docg3->bbt;
981*4882a593Smuzhiyun 
982*4882a593Smuzhiyun 	nbpages = DIV_ROUND_UP(docg3->max_block + 1, 8 * DOC_LAYOUT_PAGE_SIZE);
983*4882a593Smuzhiyun 	for (page = 0; !ret && (page < nbpages); page++) {
984*4882a593Smuzhiyun 		ret = doc_read_page_prepare(docg3, block, block + 1,
985*4882a593Smuzhiyun 					    page + DOC_LAYOUT_PAGE_BBT, 0);
986*4882a593Smuzhiyun 		if (!ret)
987*4882a593Smuzhiyun 			ret = doc_read_page_ecc_init(docg3,
988*4882a593Smuzhiyun 						     DOC_LAYOUT_PAGE_SIZE);
989*4882a593Smuzhiyun 		if (!ret)
990*4882a593Smuzhiyun 			doc_read_page_getbytes(docg3, DOC_LAYOUT_PAGE_SIZE,
991*4882a593Smuzhiyun 					       buf, 1, 0);
992*4882a593Smuzhiyun 		buf += DOC_LAYOUT_PAGE_SIZE;
993*4882a593Smuzhiyun 	}
994*4882a593Smuzhiyun 	doc_read_page_finish(docg3);
995*4882a593Smuzhiyun 	return ret;
996*4882a593Smuzhiyun }
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun /**
999*4882a593Smuzhiyun  * doc_block_isbad - Checks whether a block is good or not
1000*4882a593Smuzhiyun  * @mtd: the device
1001*4882a593Smuzhiyun  * @from: the offset to find the correct block
1002*4882a593Smuzhiyun  *
1003*4882a593Smuzhiyun  * Returns 1 if block is bad, 0 if block is good
1004*4882a593Smuzhiyun  */
doc_block_isbad(struct mtd_info * mtd,loff_t from)1005*4882a593Smuzhiyun static int doc_block_isbad(struct mtd_info *mtd, loff_t from)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun 	struct docg3 *docg3 = mtd->priv;
1008*4882a593Smuzhiyun 	int block0, block1, page, ofs, is_good;
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	calc_block_sector(from, &block0, &block1, &page, &ofs,
1011*4882a593Smuzhiyun 		docg3->reliable);
1012*4882a593Smuzhiyun 	doc_dbg("doc_block_isbad(from=%lld) => block=(%d,%d), page=%d, ofs=%d\n",
1013*4882a593Smuzhiyun 		from, block0, block1, page, ofs);
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 	if (block0 < DOC_LAYOUT_BLOCK_FIRST_DATA)
1016*4882a593Smuzhiyun 		return 0;
1017*4882a593Smuzhiyun 	if (block1 > docg3->max_block)
1018*4882a593Smuzhiyun 		return -EINVAL;
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	is_good = docg3->bbt[block0 >> 3] & (1 << (block0 & 0x7));
1021*4882a593Smuzhiyun 	return !is_good;
1022*4882a593Smuzhiyun }
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun #if 0
1025*4882a593Smuzhiyun /**
1026*4882a593Smuzhiyun  * doc_get_erase_count - Get block erase count
1027*4882a593Smuzhiyun  * @docg3: the device
1028*4882a593Smuzhiyun  * @from: the offset in which the block is.
1029*4882a593Smuzhiyun  *
1030*4882a593Smuzhiyun  * Get the number of times a block was erased. The number is the maximum of
1031*4882a593Smuzhiyun  * erase times between first and second plane (which should be equal normally).
1032*4882a593Smuzhiyun  *
1033*4882a593Smuzhiyun  * Returns The number of erases, or -EINVAL or -EIO on error.
1034*4882a593Smuzhiyun  */
1035*4882a593Smuzhiyun static int doc_get_erase_count(struct docg3 *docg3, loff_t from)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun 	u8 buf[DOC_LAYOUT_WEAR_SIZE];
1038*4882a593Smuzhiyun 	int ret, plane1_erase_count, plane2_erase_count;
1039*4882a593Smuzhiyun 	int block0, block1, page, ofs;
1040*4882a593Smuzhiyun 
1041*4882a593Smuzhiyun 	doc_dbg("doc_get_erase_count(from=%lld, buf=%p)\n", from, buf);
1042*4882a593Smuzhiyun 	if (from % DOC_LAYOUT_PAGE_SIZE)
1043*4882a593Smuzhiyun 		return -EINVAL;
1044*4882a593Smuzhiyun 	calc_block_sector(from, &block0, &block1, &page, &ofs, docg3->reliable);
1045*4882a593Smuzhiyun 	if (block1 > docg3->max_block)
1046*4882a593Smuzhiyun 		return -EINVAL;
1047*4882a593Smuzhiyun 
1048*4882a593Smuzhiyun 	ret = doc_reset_seq(docg3);
1049*4882a593Smuzhiyun 	if (!ret)
1050*4882a593Smuzhiyun 		ret = doc_read_page_prepare(docg3, block0, block1, page,
1051*4882a593Smuzhiyun 					    ofs + DOC_LAYOUT_WEAR_OFFSET, 0);
1052*4882a593Smuzhiyun 	if (!ret)
1053*4882a593Smuzhiyun 		ret = doc_read_page_getbytes(docg3, DOC_LAYOUT_WEAR_SIZE,
1054*4882a593Smuzhiyun 					     buf, 1, 0);
1055*4882a593Smuzhiyun 	doc_read_page_finish(docg3);
1056*4882a593Smuzhiyun 
1057*4882a593Smuzhiyun 	if (ret || (buf[0] != DOC_ERASE_MARK) || (buf[2] != DOC_ERASE_MARK))
1058*4882a593Smuzhiyun 		return -EIO;
1059*4882a593Smuzhiyun 	plane1_erase_count = (u8)(~buf[1]) | ((u8)(~buf[4]) << 8)
1060*4882a593Smuzhiyun 		| ((u8)(~buf[5]) << 16);
1061*4882a593Smuzhiyun 	plane2_erase_count = (u8)(~buf[3]) | ((u8)(~buf[6]) << 8)
1062*4882a593Smuzhiyun 		| ((u8)(~buf[7]) << 16);
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	return max(plane1_erase_count, plane2_erase_count);
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun #endif
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun /**
1069*4882a593Smuzhiyun  * doc_get_op_status - get erase/write operation status
1070*4882a593Smuzhiyun  * @docg3: the device
1071*4882a593Smuzhiyun  *
1072*4882a593Smuzhiyun  * Queries the status from the chip, and returns it
1073*4882a593Smuzhiyun  *
1074*4882a593Smuzhiyun  * Returns the status (bits DOC_PLANES_STATUS_*)
1075*4882a593Smuzhiyun  */
doc_get_op_status(struct docg3 * docg3)1076*4882a593Smuzhiyun static int doc_get_op_status(struct docg3 *docg3)
1077*4882a593Smuzhiyun {
1078*4882a593Smuzhiyun 	u8 status;
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	doc_flash_sequence(docg3, DOC_SEQ_PLANES_STATUS);
1081*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PLANES_STATUS);
1082*4882a593Smuzhiyun 	doc_delay(docg3, 5);
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	doc_ecc_disable(docg3);
1085*4882a593Smuzhiyun 	doc_read_data_area(docg3, &status, 1, 1);
1086*4882a593Smuzhiyun 	return status;
1087*4882a593Smuzhiyun }
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun /**
1090*4882a593Smuzhiyun  * doc_write_erase_wait_status - wait for write or erase completion
1091*4882a593Smuzhiyun  * @docg3: the device
1092*4882a593Smuzhiyun  *
1093*4882a593Smuzhiyun  * Wait for the chip to be ready again after erase or write operation, and check
1094*4882a593Smuzhiyun  * erase/write status.
1095*4882a593Smuzhiyun  *
1096*4882a593Smuzhiyun  * Returns 0 if erase successful, -EIO if erase/write issue, -ETIMEOUT if
1097*4882a593Smuzhiyun  * timeout
1098*4882a593Smuzhiyun  */
doc_write_erase_wait_status(struct docg3 * docg3)1099*4882a593Smuzhiyun static int doc_write_erase_wait_status(struct docg3 *docg3)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	int i, status, ret = 0;
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	for (i = 0; !doc_is_ready(docg3) && i < 5; i++)
1104*4882a593Smuzhiyun 		msleep(20);
1105*4882a593Smuzhiyun 	if (!doc_is_ready(docg3)) {
1106*4882a593Smuzhiyun 		doc_dbg("Timeout reached and the chip is still not ready\n");
1107*4882a593Smuzhiyun 		ret = -EAGAIN;
1108*4882a593Smuzhiyun 		goto out;
1109*4882a593Smuzhiyun 	}
1110*4882a593Smuzhiyun 
1111*4882a593Smuzhiyun 	status = doc_get_op_status(docg3);
1112*4882a593Smuzhiyun 	if (status & DOC_PLANES_STATUS_FAIL) {
1113*4882a593Smuzhiyun 		doc_dbg("Erase/Write failed on (a) plane(s), status = %x\n",
1114*4882a593Smuzhiyun 			status);
1115*4882a593Smuzhiyun 		ret = -EIO;
1116*4882a593Smuzhiyun 	}
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun out:
1119*4882a593Smuzhiyun 	doc_page_finish(docg3);
1120*4882a593Smuzhiyun 	return ret;
1121*4882a593Smuzhiyun }
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun /**
1124*4882a593Smuzhiyun  * doc_erase_block - Erase a couple of blocks
1125*4882a593Smuzhiyun  * @docg3: the device
1126*4882a593Smuzhiyun  * @block0: the first block to erase (leftmost plane)
1127*4882a593Smuzhiyun  * @block1: the second block to erase (rightmost plane)
1128*4882a593Smuzhiyun  *
1129*4882a593Smuzhiyun  * Erase both blocks, and return operation status
1130*4882a593Smuzhiyun  *
1131*4882a593Smuzhiyun  * Returns 0 if erase successful, -EIO if erase issue, -ETIMEOUT if chip not
1132*4882a593Smuzhiyun  * ready for too long
1133*4882a593Smuzhiyun  */
doc_erase_block(struct docg3 * docg3,int block0,int block1)1134*4882a593Smuzhiyun static int doc_erase_block(struct docg3 *docg3, int block0, int block1)
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun 	int ret, sector;
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun 	doc_dbg("doc_erase_block(blocks=(%d,%d))\n", block0, block1);
1139*4882a593Smuzhiyun 	ret = doc_reset_seq(docg3);
1140*4882a593Smuzhiyun 	if (ret)
1141*4882a593Smuzhiyun 		return -EIO;
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	doc_set_reliable_mode(docg3);
1144*4882a593Smuzhiyun 	doc_flash_sequence(docg3, DOC_SEQ_ERASE);
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun 	sector = block0 << DOC_ADDR_BLOCK_SHIFT;
1147*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
1148*4882a593Smuzhiyun 	doc_setup_addr_sector(docg3, sector);
1149*4882a593Smuzhiyun 	sector = block1 << DOC_ADDR_BLOCK_SHIFT;
1150*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_BLOCK_ADDR);
1151*4882a593Smuzhiyun 	doc_setup_addr_sector(docg3, sector);
1152*4882a593Smuzhiyun 	doc_delay(docg3, 1);
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_ERASECYCLE2);
1155*4882a593Smuzhiyun 	doc_delay(docg3, 2);
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 	if (is_prot_seq_error(docg3)) {
1158*4882a593Smuzhiyun 		doc_err("Erase blocks %d,%d error\n", block0, block1);
1159*4882a593Smuzhiyun 		return -EIO;
1160*4882a593Smuzhiyun 	}
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun 	return doc_write_erase_wait_status(docg3);
1163*4882a593Smuzhiyun }
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun /**
1166*4882a593Smuzhiyun  * doc_erase - Erase a portion of the chip
1167*4882a593Smuzhiyun  * @mtd: the device
1168*4882a593Smuzhiyun  * @info: the erase info
1169*4882a593Smuzhiyun  *
1170*4882a593Smuzhiyun  * Erase a bunch of contiguous blocks, by pairs, as a "mtd" page of 1024 is
1171*4882a593Smuzhiyun  * split into 2 pages of 512 bytes on 2 contiguous blocks.
1172*4882a593Smuzhiyun  *
1173*4882a593Smuzhiyun  * Returns 0 if erase successful, -EINVAL if addressing error, -EIO if erase
1174*4882a593Smuzhiyun  * issue
1175*4882a593Smuzhiyun  */
doc_erase(struct mtd_info * mtd,struct erase_info * info)1176*4882a593Smuzhiyun static int doc_erase(struct mtd_info *mtd, struct erase_info *info)
1177*4882a593Smuzhiyun {
1178*4882a593Smuzhiyun 	struct docg3 *docg3 = mtd->priv;
1179*4882a593Smuzhiyun 	uint64_t len;
1180*4882a593Smuzhiyun 	int block0, block1, page, ret = 0, ofs = 0;
1181*4882a593Smuzhiyun 
1182*4882a593Smuzhiyun 	doc_dbg("doc_erase(from=%lld, len=%lld\n", info->addr, info->len);
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	calc_block_sector(info->addr + info->len, &block0, &block1, &page,
1185*4882a593Smuzhiyun 			  &ofs, docg3->reliable);
1186*4882a593Smuzhiyun 	if (info->addr + info->len > mtd->size || page || ofs)
1187*4882a593Smuzhiyun 		return -EINVAL;
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 	calc_block_sector(info->addr, &block0, &block1, &page, &ofs,
1190*4882a593Smuzhiyun 			  docg3->reliable);
1191*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1192*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1193*4882a593Smuzhiyun 	doc_set_reliable_mode(docg3);
1194*4882a593Smuzhiyun 	for (len = info->len; !ret && len > 0; len -= mtd->erasesize) {
1195*4882a593Smuzhiyun 		ret = doc_erase_block(docg3, block0, block1);
1196*4882a593Smuzhiyun 		block0 += 2;
1197*4882a593Smuzhiyun 		block1 += 2;
1198*4882a593Smuzhiyun 	}
1199*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1200*4882a593Smuzhiyun 
1201*4882a593Smuzhiyun 	return ret;
1202*4882a593Smuzhiyun }
1203*4882a593Smuzhiyun 
1204*4882a593Smuzhiyun /**
1205*4882a593Smuzhiyun  * doc_write_page - Write a single page to the chip
1206*4882a593Smuzhiyun  * @docg3: the device
1207*4882a593Smuzhiyun  * @to: the offset from first block and first page, in bytes, aligned on page
1208*4882a593Smuzhiyun  *      size
1209*4882a593Smuzhiyun  * @buf: buffer to get bytes from
1210*4882a593Smuzhiyun  * @oob: buffer to get out of band bytes from (can be NULL if no OOB should be
1211*4882a593Smuzhiyun  *       written)
1212*4882a593Smuzhiyun  * @autoecc: if 0, all 16 bytes from OOB are taken, regardless of HW Hamming or
1213*4882a593Smuzhiyun  *           BCH computations. If 1, only bytes 0-7 and byte 15 are taken,
1214*4882a593Smuzhiyun  *           remaining ones are filled with hardware Hamming and BCH
1215*4882a593Smuzhiyun  *           computations. Its value is not meaningfull is oob == NULL.
1216*4882a593Smuzhiyun  *
1217*4882a593Smuzhiyun  * Write one full page (ie. 1 page split on two planes), of 512 bytes, with the
1218*4882a593Smuzhiyun  * OOB data. The OOB ECC is automatically computed by the hardware Hamming and
1219*4882a593Smuzhiyun  * BCH generator if autoecc is not null.
1220*4882a593Smuzhiyun  *
1221*4882a593Smuzhiyun  * Returns 0 if write successful, -EIO if write error, -EAGAIN if timeout
1222*4882a593Smuzhiyun  */
doc_write_page(struct docg3 * docg3,loff_t to,const u_char * buf,const u_char * oob,int autoecc)1223*4882a593Smuzhiyun static int doc_write_page(struct docg3 *docg3, loff_t to, const u_char *buf,
1224*4882a593Smuzhiyun 			  const u_char *oob, int autoecc)
1225*4882a593Smuzhiyun {
1226*4882a593Smuzhiyun 	int block0, block1, page, ret, ofs = 0;
1227*4882a593Smuzhiyun 	u8 hwecc[DOC_ECC_BCH_SIZE], hamming;
1228*4882a593Smuzhiyun 
1229*4882a593Smuzhiyun 	doc_dbg("doc_write_page(to=%lld)\n", to);
1230*4882a593Smuzhiyun 	calc_block_sector(to, &block0, &block1, &page, &ofs, docg3->reliable);
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1233*4882a593Smuzhiyun 	ret = doc_reset_seq(docg3);
1234*4882a593Smuzhiyun 	if (ret)
1235*4882a593Smuzhiyun 		goto err;
1236*4882a593Smuzhiyun 
1237*4882a593Smuzhiyun 	/* Program the flash address block and page */
1238*4882a593Smuzhiyun 	ret = doc_write_seek(docg3, block0, block1, page, ofs);
1239*4882a593Smuzhiyun 	if (ret)
1240*4882a593Smuzhiyun 		goto err;
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 	doc_write_page_ecc_init(docg3, DOC_ECC_BCH_TOTAL_BYTES);
1243*4882a593Smuzhiyun 	doc_delay(docg3, 2);
1244*4882a593Smuzhiyun 	doc_write_page_putbytes(docg3, DOC_LAYOUT_PAGE_SIZE, buf);
1245*4882a593Smuzhiyun 
1246*4882a593Smuzhiyun 	if (oob && autoecc) {
1247*4882a593Smuzhiyun 		doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_PAGEINFO_SZ, oob);
1248*4882a593Smuzhiyun 		doc_delay(docg3, 2);
1249*4882a593Smuzhiyun 		oob += DOC_LAYOUT_OOB_UNUSED_OFS;
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 		hamming = doc_register_readb(docg3, DOC_HAMMINGPARITY);
1252*4882a593Smuzhiyun 		doc_delay(docg3, 2);
1253*4882a593Smuzhiyun 		doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_HAMMING_SZ,
1254*4882a593Smuzhiyun 					&hamming);
1255*4882a593Smuzhiyun 		doc_delay(docg3, 2);
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun 		doc_get_bch_hw_ecc(docg3, hwecc);
1258*4882a593Smuzhiyun 		doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_BCH_SZ, hwecc);
1259*4882a593Smuzhiyun 		doc_delay(docg3, 2);
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun 		doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_UNUSED_SZ, oob);
1262*4882a593Smuzhiyun 	}
1263*4882a593Smuzhiyun 	if (oob && !autoecc)
1264*4882a593Smuzhiyun 		doc_write_page_putbytes(docg3, DOC_LAYOUT_OOB_SIZE, oob);
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 	doc_delay(docg3, 2);
1267*4882a593Smuzhiyun 	doc_page_finish(docg3);
1268*4882a593Smuzhiyun 	doc_delay(docg3, 2);
1269*4882a593Smuzhiyun 	doc_flash_command(docg3, DOC_CMD_PROG_CYCLE2);
1270*4882a593Smuzhiyun 	doc_delay(docg3, 2);
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	/*
1273*4882a593Smuzhiyun 	 * The wait status will perform another doc_page_finish() call, but that
1274*4882a593Smuzhiyun 	 * seems to please the docg3, so leave it.
1275*4882a593Smuzhiyun 	 */
1276*4882a593Smuzhiyun 	ret = doc_write_erase_wait_status(docg3);
1277*4882a593Smuzhiyun 	return ret;
1278*4882a593Smuzhiyun err:
1279*4882a593Smuzhiyun 	doc_read_page_finish(docg3);
1280*4882a593Smuzhiyun 	return ret;
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun /**
1284*4882a593Smuzhiyun  * doc_guess_autoecc - Guess autoecc mode from mbd_oob_ops
1285*4882a593Smuzhiyun  * @ops: the oob operations
1286*4882a593Smuzhiyun  *
1287*4882a593Smuzhiyun  * Returns 0 or 1 if success, -EINVAL if invalid oob mode
1288*4882a593Smuzhiyun  */
doc_guess_autoecc(struct mtd_oob_ops * ops)1289*4882a593Smuzhiyun static int doc_guess_autoecc(struct mtd_oob_ops *ops)
1290*4882a593Smuzhiyun {
1291*4882a593Smuzhiyun 	int autoecc;
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun 	switch (ops->mode) {
1294*4882a593Smuzhiyun 	case MTD_OPS_PLACE_OOB:
1295*4882a593Smuzhiyun 	case MTD_OPS_AUTO_OOB:
1296*4882a593Smuzhiyun 		autoecc = 1;
1297*4882a593Smuzhiyun 		break;
1298*4882a593Smuzhiyun 	case MTD_OPS_RAW:
1299*4882a593Smuzhiyun 		autoecc = 0;
1300*4882a593Smuzhiyun 		break;
1301*4882a593Smuzhiyun 	default:
1302*4882a593Smuzhiyun 		autoecc = -EINVAL;
1303*4882a593Smuzhiyun 	}
1304*4882a593Smuzhiyun 	return autoecc;
1305*4882a593Smuzhiyun }
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun /**
1308*4882a593Smuzhiyun  * doc_fill_autooob - Fill a 16 bytes OOB from 8 non-ECC bytes
1309*4882a593Smuzhiyun  * @dst: the target 16 bytes OOB buffer
1310*4882a593Smuzhiyun  * @oobsrc: the source 8 bytes non-ECC OOB buffer
1311*4882a593Smuzhiyun  *
1312*4882a593Smuzhiyun  */
doc_fill_autooob(u8 * dst,u8 * oobsrc)1313*4882a593Smuzhiyun static void doc_fill_autooob(u8 *dst, u8 *oobsrc)
1314*4882a593Smuzhiyun {
1315*4882a593Smuzhiyun 	memcpy(dst, oobsrc, DOC_LAYOUT_OOB_PAGEINFO_SZ);
1316*4882a593Smuzhiyun 	dst[DOC_LAYOUT_OOB_UNUSED_OFS] = oobsrc[DOC_LAYOUT_OOB_PAGEINFO_SZ];
1317*4882a593Smuzhiyun }
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun /**
1320*4882a593Smuzhiyun  * doc_backup_oob - Backup OOB into docg3 structure
1321*4882a593Smuzhiyun  * @docg3: the device
1322*4882a593Smuzhiyun  * @to: the page offset in the chip
1323*4882a593Smuzhiyun  * @ops: the OOB size and buffer
1324*4882a593Smuzhiyun  *
1325*4882a593Smuzhiyun  * As the docg3 should write a page with its OOB in one pass, and some userland
1326*4882a593Smuzhiyun  * applications do write_oob() to setup the OOB and then write(), store the OOB
1327*4882a593Smuzhiyun  * into a temporary storage. This is very dangerous, as 2 concurrent
1328*4882a593Smuzhiyun  * applications could store an OOB, and then write their pages (which will
1329*4882a593Smuzhiyun  * result into one having its OOB corrupted).
1330*4882a593Smuzhiyun  *
1331*4882a593Smuzhiyun  * The only reliable way would be for userland to call doc_write_oob() with both
1332*4882a593Smuzhiyun  * the page data _and_ the OOB area.
1333*4882a593Smuzhiyun  *
1334*4882a593Smuzhiyun  * Returns 0 if success, -EINVAL if ops content invalid
1335*4882a593Smuzhiyun  */
doc_backup_oob(struct docg3 * docg3,loff_t to,struct mtd_oob_ops * ops)1336*4882a593Smuzhiyun static int doc_backup_oob(struct docg3 *docg3, loff_t to,
1337*4882a593Smuzhiyun 			  struct mtd_oob_ops *ops)
1338*4882a593Smuzhiyun {
1339*4882a593Smuzhiyun 	int ooblen = ops->ooblen, autoecc;
1340*4882a593Smuzhiyun 
1341*4882a593Smuzhiyun 	if (ooblen != DOC_LAYOUT_OOB_SIZE)
1342*4882a593Smuzhiyun 		return -EINVAL;
1343*4882a593Smuzhiyun 	autoecc = doc_guess_autoecc(ops);
1344*4882a593Smuzhiyun 	if (autoecc < 0)
1345*4882a593Smuzhiyun 		return autoecc;
1346*4882a593Smuzhiyun 
1347*4882a593Smuzhiyun 	docg3->oob_write_ofs = to;
1348*4882a593Smuzhiyun 	docg3->oob_autoecc = autoecc;
1349*4882a593Smuzhiyun 	if (ops->mode == MTD_OPS_AUTO_OOB) {
1350*4882a593Smuzhiyun 		doc_fill_autooob(docg3->oob_write_buf, ops->oobbuf);
1351*4882a593Smuzhiyun 		ops->oobretlen = 8;
1352*4882a593Smuzhiyun 	} else {
1353*4882a593Smuzhiyun 		memcpy(docg3->oob_write_buf, ops->oobbuf, DOC_LAYOUT_OOB_SIZE);
1354*4882a593Smuzhiyun 		ops->oobretlen = DOC_LAYOUT_OOB_SIZE;
1355*4882a593Smuzhiyun 	}
1356*4882a593Smuzhiyun 	return 0;
1357*4882a593Smuzhiyun }
1358*4882a593Smuzhiyun 
1359*4882a593Smuzhiyun /**
1360*4882a593Smuzhiyun  * doc_write_oob - Write out of band bytes to flash
1361*4882a593Smuzhiyun  * @mtd: the device
1362*4882a593Smuzhiyun  * @ofs: the offset from first block and first page, in bytes, aligned on page
1363*4882a593Smuzhiyun  *       size
1364*4882a593Smuzhiyun  * @ops: the mtd oob structure
1365*4882a593Smuzhiyun  *
1366*4882a593Smuzhiyun  * Either write OOB data into a temporary buffer, for the subsequent write
1367*4882a593Smuzhiyun  * page. The provided OOB should be 16 bytes long. If a data buffer is provided
1368*4882a593Smuzhiyun  * as well, issue the page write.
1369*4882a593Smuzhiyun  * Or provide data without OOB, and then a all zeroed OOB will be used (ECC will
1370*4882a593Smuzhiyun  * still be filled in if asked for).
1371*4882a593Smuzhiyun  *
1372*4882a593Smuzhiyun  * Returns 0 is successful, EINVAL if length is not 14 bytes
1373*4882a593Smuzhiyun  */
doc_write_oob(struct mtd_info * mtd,loff_t ofs,struct mtd_oob_ops * ops)1374*4882a593Smuzhiyun static int doc_write_oob(struct mtd_info *mtd, loff_t ofs,
1375*4882a593Smuzhiyun 			 struct mtd_oob_ops *ops)
1376*4882a593Smuzhiyun {
1377*4882a593Smuzhiyun 	struct docg3 *docg3 = mtd->priv;
1378*4882a593Smuzhiyun 	int ret, autoecc, oobdelta;
1379*4882a593Smuzhiyun 	u8 *oobbuf = ops->oobbuf;
1380*4882a593Smuzhiyun 	u8 *buf = ops->datbuf;
1381*4882a593Smuzhiyun 	size_t len, ooblen;
1382*4882a593Smuzhiyun 	u8 oob[DOC_LAYOUT_OOB_SIZE];
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun 	if (buf)
1385*4882a593Smuzhiyun 		len = ops->len;
1386*4882a593Smuzhiyun 	else
1387*4882a593Smuzhiyun 		len = 0;
1388*4882a593Smuzhiyun 	if (oobbuf)
1389*4882a593Smuzhiyun 		ooblen = ops->ooblen;
1390*4882a593Smuzhiyun 	else
1391*4882a593Smuzhiyun 		ooblen = 0;
1392*4882a593Smuzhiyun 
1393*4882a593Smuzhiyun 	if (oobbuf && ops->mode == MTD_OPS_PLACE_OOB)
1394*4882a593Smuzhiyun 		oobbuf += ops->ooboffs;
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	doc_dbg("doc_write_oob(from=%lld, mode=%d, data=(%p:%zu), oob=(%p:%zu))\n",
1397*4882a593Smuzhiyun 		ofs, ops->mode, buf, len, oobbuf, ooblen);
1398*4882a593Smuzhiyun 	switch (ops->mode) {
1399*4882a593Smuzhiyun 	case MTD_OPS_PLACE_OOB:
1400*4882a593Smuzhiyun 	case MTD_OPS_RAW:
1401*4882a593Smuzhiyun 		oobdelta = mtd->oobsize;
1402*4882a593Smuzhiyun 		break;
1403*4882a593Smuzhiyun 	case MTD_OPS_AUTO_OOB:
1404*4882a593Smuzhiyun 		oobdelta = mtd->oobavail;
1405*4882a593Smuzhiyun 		break;
1406*4882a593Smuzhiyun 	default:
1407*4882a593Smuzhiyun 		return -EINVAL;
1408*4882a593Smuzhiyun 	}
1409*4882a593Smuzhiyun 	if ((len % DOC_LAYOUT_PAGE_SIZE) || (ooblen % oobdelta) ||
1410*4882a593Smuzhiyun 	    (ofs % DOC_LAYOUT_PAGE_SIZE))
1411*4882a593Smuzhiyun 		return -EINVAL;
1412*4882a593Smuzhiyun 	if (len && ooblen &&
1413*4882a593Smuzhiyun 	    (len / DOC_LAYOUT_PAGE_SIZE) != (ooblen / oobdelta))
1414*4882a593Smuzhiyun 		return -EINVAL;
1415*4882a593Smuzhiyun 
1416*4882a593Smuzhiyun 	ops->oobretlen = 0;
1417*4882a593Smuzhiyun 	ops->retlen = 0;
1418*4882a593Smuzhiyun 	ret = 0;
1419*4882a593Smuzhiyun 	if (len == 0 && ooblen == 0)
1420*4882a593Smuzhiyun 		return -EINVAL;
1421*4882a593Smuzhiyun 	if (len == 0 && ooblen > 0)
1422*4882a593Smuzhiyun 		return doc_backup_oob(docg3, ofs, ops);
1423*4882a593Smuzhiyun 
1424*4882a593Smuzhiyun 	autoecc = doc_guess_autoecc(ops);
1425*4882a593Smuzhiyun 	if (autoecc < 0)
1426*4882a593Smuzhiyun 		return autoecc;
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1429*4882a593Smuzhiyun 	while (!ret && len > 0) {
1430*4882a593Smuzhiyun 		memset(oob, 0, sizeof(oob));
1431*4882a593Smuzhiyun 		if (ofs == docg3->oob_write_ofs)
1432*4882a593Smuzhiyun 			memcpy(oob, docg3->oob_write_buf, DOC_LAYOUT_OOB_SIZE);
1433*4882a593Smuzhiyun 		else if (ooblen > 0 && ops->mode == MTD_OPS_AUTO_OOB)
1434*4882a593Smuzhiyun 			doc_fill_autooob(oob, oobbuf);
1435*4882a593Smuzhiyun 		else if (ooblen > 0)
1436*4882a593Smuzhiyun 			memcpy(oob, oobbuf, DOC_LAYOUT_OOB_SIZE);
1437*4882a593Smuzhiyun 		ret = doc_write_page(docg3, ofs, buf, oob, autoecc);
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun 		ofs += DOC_LAYOUT_PAGE_SIZE;
1440*4882a593Smuzhiyun 		len -= DOC_LAYOUT_PAGE_SIZE;
1441*4882a593Smuzhiyun 		buf += DOC_LAYOUT_PAGE_SIZE;
1442*4882a593Smuzhiyun 		if (ooblen) {
1443*4882a593Smuzhiyun 			oobbuf += oobdelta;
1444*4882a593Smuzhiyun 			ooblen -= oobdelta;
1445*4882a593Smuzhiyun 			ops->oobretlen += oobdelta;
1446*4882a593Smuzhiyun 		}
1447*4882a593Smuzhiyun 		ops->retlen += DOC_LAYOUT_PAGE_SIZE;
1448*4882a593Smuzhiyun 	}
1449*4882a593Smuzhiyun 
1450*4882a593Smuzhiyun 	doc_set_device_id(docg3, 0);
1451*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1452*4882a593Smuzhiyun 	return ret;
1453*4882a593Smuzhiyun }
1454*4882a593Smuzhiyun 
sysfs_dev2docg3(struct device * dev,struct device_attribute * attr)1455*4882a593Smuzhiyun static struct docg3 *sysfs_dev2docg3(struct device *dev,
1456*4882a593Smuzhiyun 				     struct device_attribute *attr)
1457*4882a593Smuzhiyun {
1458*4882a593Smuzhiyun 	int floor;
1459*4882a593Smuzhiyun 	struct mtd_info **docg3_floors = dev_get_drvdata(dev);
1460*4882a593Smuzhiyun 
1461*4882a593Smuzhiyun 	floor = attr->attr.name[1] - '0';
1462*4882a593Smuzhiyun 	if (floor < 0 || floor >= DOC_MAX_NBFLOORS)
1463*4882a593Smuzhiyun 		return NULL;
1464*4882a593Smuzhiyun 	else
1465*4882a593Smuzhiyun 		return docg3_floors[floor]->priv;
1466*4882a593Smuzhiyun }
1467*4882a593Smuzhiyun 
dps0_is_key_locked(struct device * dev,struct device_attribute * attr,char * buf)1468*4882a593Smuzhiyun static ssize_t dps0_is_key_locked(struct device *dev,
1469*4882a593Smuzhiyun 				  struct device_attribute *attr, char *buf)
1470*4882a593Smuzhiyun {
1471*4882a593Smuzhiyun 	struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1472*4882a593Smuzhiyun 	int dps0;
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1475*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1476*4882a593Smuzhiyun 	dps0 = doc_register_readb(docg3, DOC_DPS0_STATUS);
1477*4882a593Smuzhiyun 	doc_set_device_id(docg3, 0);
1478*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1479*4882a593Smuzhiyun 
1480*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", !(dps0 & DOC_DPS_KEY_OK));
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun 
dps1_is_key_locked(struct device * dev,struct device_attribute * attr,char * buf)1483*4882a593Smuzhiyun static ssize_t dps1_is_key_locked(struct device *dev,
1484*4882a593Smuzhiyun 				  struct device_attribute *attr, char *buf)
1485*4882a593Smuzhiyun {
1486*4882a593Smuzhiyun 	struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1487*4882a593Smuzhiyun 	int dps1;
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1490*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1491*4882a593Smuzhiyun 	dps1 = doc_register_readb(docg3, DOC_DPS1_STATUS);
1492*4882a593Smuzhiyun 	doc_set_device_id(docg3, 0);
1493*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1494*4882a593Smuzhiyun 
1495*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", !(dps1 & DOC_DPS_KEY_OK));
1496*4882a593Smuzhiyun }
1497*4882a593Smuzhiyun 
dps0_insert_key(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1498*4882a593Smuzhiyun static ssize_t dps0_insert_key(struct device *dev,
1499*4882a593Smuzhiyun 			       struct device_attribute *attr,
1500*4882a593Smuzhiyun 			       const char *buf, size_t count)
1501*4882a593Smuzhiyun {
1502*4882a593Smuzhiyun 	struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1503*4882a593Smuzhiyun 	int i;
1504*4882a593Smuzhiyun 
1505*4882a593Smuzhiyun 	if (count != DOC_LAYOUT_DPS_KEY_LENGTH)
1506*4882a593Smuzhiyun 		return -EINVAL;
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1509*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1510*4882a593Smuzhiyun 	for (i = 0; i < DOC_LAYOUT_DPS_KEY_LENGTH; i++)
1511*4882a593Smuzhiyun 		doc_writeb(docg3, buf[i], DOC_DPS0_KEY);
1512*4882a593Smuzhiyun 	doc_set_device_id(docg3, 0);
1513*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1514*4882a593Smuzhiyun 	return count;
1515*4882a593Smuzhiyun }
1516*4882a593Smuzhiyun 
dps1_insert_key(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)1517*4882a593Smuzhiyun static ssize_t dps1_insert_key(struct device *dev,
1518*4882a593Smuzhiyun 			       struct device_attribute *attr,
1519*4882a593Smuzhiyun 			       const char *buf, size_t count)
1520*4882a593Smuzhiyun {
1521*4882a593Smuzhiyun 	struct docg3 *docg3 = sysfs_dev2docg3(dev, attr);
1522*4882a593Smuzhiyun 	int i;
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun 	if (count != DOC_LAYOUT_DPS_KEY_LENGTH)
1525*4882a593Smuzhiyun 		return -EINVAL;
1526*4882a593Smuzhiyun 
1527*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1528*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1529*4882a593Smuzhiyun 	for (i = 0; i < DOC_LAYOUT_DPS_KEY_LENGTH; i++)
1530*4882a593Smuzhiyun 		doc_writeb(docg3, buf[i], DOC_DPS1_KEY);
1531*4882a593Smuzhiyun 	doc_set_device_id(docg3, 0);
1532*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1533*4882a593Smuzhiyun 	return count;
1534*4882a593Smuzhiyun }
1535*4882a593Smuzhiyun 
1536*4882a593Smuzhiyun #define FLOOR_SYSFS(id) { \
1537*4882a593Smuzhiyun 	__ATTR(f##id##_dps0_is_keylocked, S_IRUGO, dps0_is_key_locked, NULL), \
1538*4882a593Smuzhiyun 	__ATTR(f##id##_dps1_is_keylocked, S_IRUGO, dps1_is_key_locked, NULL), \
1539*4882a593Smuzhiyun 	__ATTR(f##id##_dps0_protection_key, S_IWUSR|S_IWGRP, NULL, dps0_insert_key), \
1540*4882a593Smuzhiyun 	__ATTR(f##id##_dps1_protection_key, S_IWUSR|S_IWGRP, NULL, dps1_insert_key), \
1541*4882a593Smuzhiyun }
1542*4882a593Smuzhiyun 
1543*4882a593Smuzhiyun static struct device_attribute doc_sys_attrs[DOC_MAX_NBFLOORS][4] = {
1544*4882a593Smuzhiyun 	FLOOR_SYSFS(0), FLOOR_SYSFS(1), FLOOR_SYSFS(2), FLOOR_SYSFS(3)
1545*4882a593Smuzhiyun };
1546*4882a593Smuzhiyun 
doc_register_sysfs(struct platform_device * pdev,struct docg3_cascade * cascade)1547*4882a593Smuzhiyun static int doc_register_sysfs(struct platform_device *pdev,
1548*4882a593Smuzhiyun 			      struct docg3_cascade *cascade)
1549*4882a593Smuzhiyun {
1550*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
1551*4882a593Smuzhiyun 	int floor;
1552*4882a593Smuzhiyun 	int ret;
1553*4882a593Smuzhiyun 	int i;
1554*4882a593Smuzhiyun 
1555*4882a593Smuzhiyun 	for (floor = 0;
1556*4882a593Smuzhiyun 	     floor < DOC_MAX_NBFLOORS && cascade->floors[floor];
1557*4882a593Smuzhiyun 	     floor++) {
1558*4882a593Smuzhiyun 		for (i = 0; i < 4; i++) {
1559*4882a593Smuzhiyun 			ret = device_create_file(dev, &doc_sys_attrs[floor][i]);
1560*4882a593Smuzhiyun 			if (ret)
1561*4882a593Smuzhiyun 				goto remove_files;
1562*4882a593Smuzhiyun 		}
1563*4882a593Smuzhiyun 	}
1564*4882a593Smuzhiyun 
1565*4882a593Smuzhiyun 	return 0;
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun remove_files:
1568*4882a593Smuzhiyun 	do {
1569*4882a593Smuzhiyun 		while (--i >= 0)
1570*4882a593Smuzhiyun 			device_remove_file(dev, &doc_sys_attrs[floor][i]);
1571*4882a593Smuzhiyun 		i = 4;
1572*4882a593Smuzhiyun 	} while (--floor >= 0);
1573*4882a593Smuzhiyun 
1574*4882a593Smuzhiyun 	return ret;
1575*4882a593Smuzhiyun }
1576*4882a593Smuzhiyun 
doc_unregister_sysfs(struct platform_device * pdev,struct docg3_cascade * cascade)1577*4882a593Smuzhiyun static void doc_unregister_sysfs(struct platform_device *pdev,
1578*4882a593Smuzhiyun 				 struct docg3_cascade *cascade)
1579*4882a593Smuzhiyun {
1580*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
1581*4882a593Smuzhiyun 	int floor, i;
1582*4882a593Smuzhiyun 
1583*4882a593Smuzhiyun 	for (floor = 0; floor < DOC_MAX_NBFLOORS && cascade->floors[floor];
1584*4882a593Smuzhiyun 	     floor++)
1585*4882a593Smuzhiyun 		for (i = 0; i < 4; i++)
1586*4882a593Smuzhiyun 			device_remove_file(dev, &doc_sys_attrs[floor][i]);
1587*4882a593Smuzhiyun }
1588*4882a593Smuzhiyun 
1589*4882a593Smuzhiyun /*
1590*4882a593Smuzhiyun  * Debug sysfs entries
1591*4882a593Smuzhiyun  */
flashcontrol_show(struct seq_file * s,void * p)1592*4882a593Smuzhiyun static int flashcontrol_show(struct seq_file *s, void *p)
1593*4882a593Smuzhiyun {
1594*4882a593Smuzhiyun 	struct docg3 *docg3 = (struct docg3 *)s->private;
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 	u8 fctrl;
1597*4882a593Smuzhiyun 
1598*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1599*4882a593Smuzhiyun 	fctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
1600*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1601*4882a593Smuzhiyun 
1602*4882a593Smuzhiyun 	seq_printf(s, "FlashControl : 0x%02x (%s,CE# %s,%s,%s,flash %s)\n",
1603*4882a593Smuzhiyun 		   fctrl,
1604*4882a593Smuzhiyun 		   fctrl & DOC_CTRL_VIOLATION ? "protocol violation" : "-",
1605*4882a593Smuzhiyun 		   fctrl & DOC_CTRL_CE ? "active" : "inactive",
1606*4882a593Smuzhiyun 		   fctrl & DOC_CTRL_PROTECTION_ERROR ? "protection error" : "-",
1607*4882a593Smuzhiyun 		   fctrl & DOC_CTRL_SEQUENCE_ERROR ? "sequence error" : "-",
1608*4882a593Smuzhiyun 		   fctrl & DOC_CTRL_FLASHREADY ? "ready" : "not ready");
1609*4882a593Smuzhiyun 
1610*4882a593Smuzhiyun 	return 0;
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(flashcontrol);
1613*4882a593Smuzhiyun 
asic_mode_show(struct seq_file * s,void * p)1614*4882a593Smuzhiyun static int asic_mode_show(struct seq_file *s, void *p)
1615*4882a593Smuzhiyun {
1616*4882a593Smuzhiyun 	struct docg3 *docg3 = (struct docg3 *)s->private;
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 	int pctrl, mode;
1619*4882a593Smuzhiyun 
1620*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1621*4882a593Smuzhiyun 	pctrl = doc_register_readb(docg3, DOC_ASICMODE);
1622*4882a593Smuzhiyun 	mode = pctrl & 0x03;
1623*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1624*4882a593Smuzhiyun 
1625*4882a593Smuzhiyun 	seq_printf(s,
1626*4882a593Smuzhiyun 		   "%04x : RAM_WE=%d,RSTIN_RESET=%d,BDETCT_RESET=%d,WRITE_ENABLE=%d,POWERDOWN=%d,MODE=%d%d (",
1627*4882a593Smuzhiyun 		   pctrl,
1628*4882a593Smuzhiyun 		   pctrl & DOC_ASICMODE_RAM_WE ? 1 : 0,
1629*4882a593Smuzhiyun 		   pctrl & DOC_ASICMODE_RSTIN_RESET ? 1 : 0,
1630*4882a593Smuzhiyun 		   pctrl & DOC_ASICMODE_BDETCT_RESET ? 1 : 0,
1631*4882a593Smuzhiyun 		   pctrl & DOC_ASICMODE_MDWREN ? 1 : 0,
1632*4882a593Smuzhiyun 		   pctrl & DOC_ASICMODE_POWERDOWN ? 1 : 0,
1633*4882a593Smuzhiyun 		   mode >> 1, mode & 0x1);
1634*4882a593Smuzhiyun 
1635*4882a593Smuzhiyun 	switch (mode) {
1636*4882a593Smuzhiyun 	case DOC_ASICMODE_RESET:
1637*4882a593Smuzhiyun 		seq_puts(s, "reset");
1638*4882a593Smuzhiyun 		break;
1639*4882a593Smuzhiyun 	case DOC_ASICMODE_NORMAL:
1640*4882a593Smuzhiyun 		seq_puts(s, "normal");
1641*4882a593Smuzhiyun 		break;
1642*4882a593Smuzhiyun 	case DOC_ASICMODE_POWERDOWN:
1643*4882a593Smuzhiyun 		seq_puts(s, "powerdown");
1644*4882a593Smuzhiyun 		break;
1645*4882a593Smuzhiyun 	}
1646*4882a593Smuzhiyun 	seq_puts(s, ")\n");
1647*4882a593Smuzhiyun 	return 0;
1648*4882a593Smuzhiyun }
1649*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(asic_mode);
1650*4882a593Smuzhiyun 
device_id_show(struct seq_file * s,void * p)1651*4882a593Smuzhiyun static int device_id_show(struct seq_file *s, void *p)
1652*4882a593Smuzhiyun {
1653*4882a593Smuzhiyun 	struct docg3 *docg3 = (struct docg3 *)s->private;
1654*4882a593Smuzhiyun 	int id;
1655*4882a593Smuzhiyun 
1656*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1657*4882a593Smuzhiyun 	id = doc_register_readb(docg3, DOC_DEVICESELECT);
1658*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1659*4882a593Smuzhiyun 
1660*4882a593Smuzhiyun 	seq_printf(s, "DeviceId = %d\n", id);
1661*4882a593Smuzhiyun 	return 0;
1662*4882a593Smuzhiyun }
1663*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(device_id);
1664*4882a593Smuzhiyun 
protection_show(struct seq_file * s,void * p)1665*4882a593Smuzhiyun static int protection_show(struct seq_file *s, void *p)
1666*4882a593Smuzhiyun {
1667*4882a593Smuzhiyun 	struct docg3 *docg3 = (struct docg3 *)s->private;
1668*4882a593Smuzhiyun 	int protect, dps0, dps0_low, dps0_high, dps1, dps1_low, dps1_high;
1669*4882a593Smuzhiyun 
1670*4882a593Smuzhiyun 	mutex_lock(&docg3->cascade->lock);
1671*4882a593Smuzhiyun 	protect = doc_register_readb(docg3, DOC_PROTECTION);
1672*4882a593Smuzhiyun 	dps0 = doc_register_readb(docg3, DOC_DPS0_STATUS);
1673*4882a593Smuzhiyun 	dps0_low = doc_register_readw(docg3, DOC_DPS0_ADDRLOW);
1674*4882a593Smuzhiyun 	dps0_high = doc_register_readw(docg3, DOC_DPS0_ADDRHIGH);
1675*4882a593Smuzhiyun 	dps1 = doc_register_readb(docg3, DOC_DPS1_STATUS);
1676*4882a593Smuzhiyun 	dps1_low = doc_register_readw(docg3, DOC_DPS1_ADDRLOW);
1677*4882a593Smuzhiyun 	dps1_high = doc_register_readw(docg3, DOC_DPS1_ADDRHIGH);
1678*4882a593Smuzhiyun 	mutex_unlock(&docg3->cascade->lock);
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	seq_printf(s, "Protection = 0x%02x (", protect);
1681*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_FOUNDRY_OTP_LOCK)
1682*4882a593Smuzhiyun 		seq_puts(s, "FOUNDRY_OTP_LOCK,");
1683*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_CUSTOMER_OTP_LOCK)
1684*4882a593Smuzhiyun 		seq_puts(s, "CUSTOMER_OTP_LOCK,");
1685*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_LOCK_INPUT)
1686*4882a593Smuzhiyun 		seq_puts(s, "LOCK_INPUT,");
1687*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_STICKY_LOCK)
1688*4882a593Smuzhiyun 		seq_puts(s, "STICKY_LOCK,");
1689*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_PROTECTION_ENABLED)
1690*4882a593Smuzhiyun 		seq_puts(s, "PROTECTION ON,");
1691*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_IPL_DOWNLOAD_LOCK)
1692*4882a593Smuzhiyun 		seq_puts(s, "IPL_DOWNLOAD_LOCK,");
1693*4882a593Smuzhiyun 	if (protect & DOC_PROTECT_PROTECTION_ERROR)
1694*4882a593Smuzhiyun 		seq_puts(s, "PROTECT_ERR,");
1695*4882a593Smuzhiyun 	else
1696*4882a593Smuzhiyun 		seq_puts(s, "NO_PROTECT_ERR");
1697*4882a593Smuzhiyun 	seq_puts(s, ")\n");
1698*4882a593Smuzhiyun 
1699*4882a593Smuzhiyun 	seq_printf(s, "DPS0 = 0x%02x : Protected area [0x%x - 0x%x] : OTP=%d, READ=%d, WRITE=%d, HW_LOCK=%d, KEY_OK=%d\n",
1700*4882a593Smuzhiyun 		   dps0, dps0_low, dps0_high,
1701*4882a593Smuzhiyun 		   !!(dps0 & DOC_DPS_OTP_PROTECTED),
1702*4882a593Smuzhiyun 		   !!(dps0 & DOC_DPS_READ_PROTECTED),
1703*4882a593Smuzhiyun 		   !!(dps0 & DOC_DPS_WRITE_PROTECTED),
1704*4882a593Smuzhiyun 		   !!(dps0 & DOC_DPS_HW_LOCK_ENABLED),
1705*4882a593Smuzhiyun 		   !!(dps0 & DOC_DPS_KEY_OK));
1706*4882a593Smuzhiyun 	seq_printf(s, "DPS1 = 0x%02x : Protected area [0x%x - 0x%x] : OTP=%d, READ=%d, WRITE=%d, HW_LOCK=%d, KEY_OK=%d\n",
1707*4882a593Smuzhiyun 		   dps1, dps1_low, dps1_high,
1708*4882a593Smuzhiyun 		   !!(dps1 & DOC_DPS_OTP_PROTECTED),
1709*4882a593Smuzhiyun 		   !!(dps1 & DOC_DPS_READ_PROTECTED),
1710*4882a593Smuzhiyun 		   !!(dps1 & DOC_DPS_WRITE_PROTECTED),
1711*4882a593Smuzhiyun 		   !!(dps1 & DOC_DPS_HW_LOCK_ENABLED),
1712*4882a593Smuzhiyun 		   !!(dps1 & DOC_DPS_KEY_OK));
1713*4882a593Smuzhiyun 	return 0;
1714*4882a593Smuzhiyun }
1715*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(protection);
1716*4882a593Smuzhiyun 
doc_dbg_register(struct mtd_info * floor)1717*4882a593Smuzhiyun static void __init doc_dbg_register(struct mtd_info *floor)
1718*4882a593Smuzhiyun {
1719*4882a593Smuzhiyun 	struct dentry *root = floor->dbg.dfs_dir;
1720*4882a593Smuzhiyun 	struct docg3 *docg3 = floor->priv;
1721*4882a593Smuzhiyun 
1722*4882a593Smuzhiyun 	if (IS_ERR_OR_NULL(root)) {
1723*4882a593Smuzhiyun 		if (IS_ENABLED(CONFIG_DEBUG_FS) &&
1724*4882a593Smuzhiyun 		    !IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER))
1725*4882a593Smuzhiyun 			dev_warn(floor->dev.parent,
1726*4882a593Smuzhiyun 				 "CONFIG_MTD_PARTITIONED_MASTER must be enabled to expose debugfs stuff\n");
1727*4882a593Smuzhiyun 		return;
1728*4882a593Smuzhiyun 	}
1729*4882a593Smuzhiyun 
1730*4882a593Smuzhiyun 	debugfs_create_file("docg3_flashcontrol", S_IRUSR, root, docg3,
1731*4882a593Smuzhiyun 			    &flashcontrol_fops);
1732*4882a593Smuzhiyun 	debugfs_create_file("docg3_asic_mode", S_IRUSR, root, docg3,
1733*4882a593Smuzhiyun 			    &asic_mode_fops);
1734*4882a593Smuzhiyun 	debugfs_create_file("docg3_device_id", S_IRUSR, root, docg3,
1735*4882a593Smuzhiyun 			    &device_id_fops);
1736*4882a593Smuzhiyun 	debugfs_create_file("docg3_protection", S_IRUSR, root, docg3,
1737*4882a593Smuzhiyun 			    &protection_fops);
1738*4882a593Smuzhiyun }
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun /**
1741*4882a593Smuzhiyun  * doc_set_driver_info - Fill the mtd_info structure and docg3 structure
1742*4882a593Smuzhiyun  * @chip_id: The chip ID of the supported chip
1743*4882a593Smuzhiyun  * @mtd: The structure to fill
1744*4882a593Smuzhiyun  */
doc_set_driver_info(int chip_id,struct mtd_info * mtd)1745*4882a593Smuzhiyun static int __init doc_set_driver_info(int chip_id, struct mtd_info *mtd)
1746*4882a593Smuzhiyun {
1747*4882a593Smuzhiyun 	struct docg3 *docg3 = mtd->priv;
1748*4882a593Smuzhiyun 	int cfg;
1749*4882a593Smuzhiyun 
1750*4882a593Smuzhiyun 	cfg = doc_register_readb(docg3, DOC_CONFIGURATION);
1751*4882a593Smuzhiyun 	docg3->if_cfg = (cfg & DOC_CONF_IF_CFG ? 1 : 0);
1752*4882a593Smuzhiyun 	docg3->reliable = reliable_mode;
1753*4882a593Smuzhiyun 
1754*4882a593Smuzhiyun 	switch (chip_id) {
1755*4882a593Smuzhiyun 	case DOC_CHIPID_G3:
1756*4882a593Smuzhiyun 		mtd->name = devm_kasprintf(docg3->dev, GFP_KERNEL, "docg3.%d",
1757*4882a593Smuzhiyun 					   docg3->device_id);
1758*4882a593Smuzhiyun 		if (!mtd->name)
1759*4882a593Smuzhiyun 			return -ENOMEM;
1760*4882a593Smuzhiyun 		docg3->max_block = 2047;
1761*4882a593Smuzhiyun 		break;
1762*4882a593Smuzhiyun 	}
1763*4882a593Smuzhiyun 	mtd->type = MTD_NANDFLASH;
1764*4882a593Smuzhiyun 	mtd->flags = MTD_CAP_NANDFLASH;
1765*4882a593Smuzhiyun 	mtd->size = (docg3->max_block + 1) * DOC_LAYOUT_BLOCK_SIZE;
1766*4882a593Smuzhiyun 	if (docg3->reliable == 2)
1767*4882a593Smuzhiyun 		mtd->size /= 2;
1768*4882a593Smuzhiyun 	mtd->erasesize = DOC_LAYOUT_BLOCK_SIZE * DOC_LAYOUT_NBPLANES;
1769*4882a593Smuzhiyun 	if (docg3->reliable == 2)
1770*4882a593Smuzhiyun 		mtd->erasesize /= 2;
1771*4882a593Smuzhiyun 	mtd->writebufsize = mtd->writesize = DOC_LAYOUT_PAGE_SIZE;
1772*4882a593Smuzhiyun 	mtd->oobsize = DOC_LAYOUT_OOB_SIZE;
1773*4882a593Smuzhiyun 	mtd->_erase = doc_erase;
1774*4882a593Smuzhiyun 	mtd->_read_oob = doc_read_oob;
1775*4882a593Smuzhiyun 	mtd->_write_oob = doc_write_oob;
1776*4882a593Smuzhiyun 	mtd->_block_isbad = doc_block_isbad;
1777*4882a593Smuzhiyun 	mtd_set_ooblayout(mtd, &nand_ooblayout_docg3_ops);
1778*4882a593Smuzhiyun 	mtd->oobavail = 8;
1779*4882a593Smuzhiyun 	mtd->ecc_strength = DOC_ECC_BCH_T;
1780*4882a593Smuzhiyun 
1781*4882a593Smuzhiyun 	return 0;
1782*4882a593Smuzhiyun }
1783*4882a593Smuzhiyun 
1784*4882a593Smuzhiyun /**
1785*4882a593Smuzhiyun  * doc_probe_device - Check if a device is available
1786*4882a593Smuzhiyun  * @base: the io space where the device is probed
1787*4882a593Smuzhiyun  * @floor: the floor of the probed device
1788*4882a593Smuzhiyun  * @dev: the device
1789*4882a593Smuzhiyun  * @cascade: the cascade of chips this devices will belong to
1790*4882a593Smuzhiyun  *
1791*4882a593Smuzhiyun  * Checks whether a device at the specified IO range, and floor is available.
1792*4882a593Smuzhiyun  *
1793*4882a593Smuzhiyun  * Returns a mtd_info struct if there is a device, ENODEV if none found, ENOMEM
1794*4882a593Smuzhiyun  * if a memory allocation failed. If floor 0 is checked, a reset of the ASIC is
1795*4882a593Smuzhiyun  * launched.
1796*4882a593Smuzhiyun  */
1797*4882a593Smuzhiyun static struct mtd_info * __init
doc_probe_device(struct docg3_cascade * cascade,int floor,struct device * dev)1798*4882a593Smuzhiyun doc_probe_device(struct docg3_cascade *cascade, int floor, struct device *dev)
1799*4882a593Smuzhiyun {
1800*4882a593Smuzhiyun 	int ret, bbt_nbpages;
1801*4882a593Smuzhiyun 	u16 chip_id, chip_id_inv;
1802*4882a593Smuzhiyun 	struct docg3 *docg3;
1803*4882a593Smuzhiyun 	struct mtd_info *mtd;
1804*4882a593Smuzhiyun 
1805*4882a593Smuzhiyun 	ret = -ENOMEM;
1806*4882a593Smuzhiyun 	docg3 = kzalloc(sizeof(struct docg3), GFP_KERNEL);
1807*4882a593Smuzhiyun 	if (!docg3)
1808*4882a593Smuzhiyun 		goto nomem1;
1809*4882a593Smuzhiyun 	mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
1810*4882a593Smuzhiyun 	if (!mtd)
1811*4882a593Smuzhiyun 		goto nomem2;
1812*4882a593Smuzhiyun 	mtd->priv = docg3;
1813*4882a593Smuzhiyun 	mtd->dev.parent = dev;
1814*4882a593Smuzhiyun 	bbt_nbpages = DIV_ROUND_UP(docg3->max_block + 1,
1815*4882a593Smuzhiyun 				   8 * DOC_LAYOUT_PAGE_SIZE);
1816*4882a593Smuzhiyun 	docg3->bbt = kcalloc(DOC_LAYOUT_PAGE_SIZE, bbt_nbpages, GFP_KERNEL);
1817*4882a593Smuzhiyun 	if (!docg3->bbt)
1818*4882a593Smuzhiyun 		goto nomem3;
1819*4882a593Smuzhiyun 
1820*4882a593Smuzhiyun 	docg3->dev = dev;
1821*4882a593Smuzhiyun 	docg3->device_id = floor;
1822*4882a593Smuzhiyun 	docg3->cascade = cascade;
1823*4882a593Smuzhiyun 	doc_set_device_id(docg3, docg3->device_id);
1824*4882a593Smuzhiyun 	if (!floor)
1825*4882a593Smuzhiyun 		doc_set_asic_mode(docg3, DOC_ASICMODE_RESET);
1826*4882a593Smuzhiyun 	doc_set_asic_mode(docg3, DOC_ASICMODE_NORMAL);
1827*4882a593Smuzhiyun 
1828*4882a593Smuzhiyun 	chip_id = doc_register_readw(docg3, DOC_CHIPID);
1829*4882a593Smuzhiyun 	chip_id_inv = doc_register_readw(docg3, DOC_CHIPID_INV);
1830*4882a593Smuzhiyun 
1831*4882a593Smuzhiyun 	ret = 0;
1832*4882a593Smuzhiyun 	if (chip_id != (u16)(~chip_id_inv)) {
1833*4882a593Smuzhiyun 		goto nomem4;
1834*4882a593Smuzhiyun 	}
1835*4882a593Smuzhiyun 
1836*4882a593Smuzhiyun 	switch (chip_id) {
1837*4882a593Smuzhiyun 	case DOC_CHIPID_G3:
1838*4882a593Smuzhiyun 		doc_info("Found a G3 DiskOnChip at addr %p, floor %d\n",
1839*4882a593Smuzhiyun 			 docg3->cascade->base, floor);
1840*4882a593Smuzhiyun 		break;
1841*4882a593Smuzhiyun 	default:
1842*4882a593Smuzhiyun 		doc_err("Chip id %04x is not a DiskOnChip G3 chip\n", chip_id);
1843*4882a593Smuzhiyun 		goto nomem4;
1844*4882a593Smuzhiyun 	}
1845*4882a593Smuzhiyun 
1846*4882a593Smuzhiyun 	ret = doc_set_driver_info(chip_id, mtd);
1847*4882a593Smuzhiyun 	if (ret)
1848*4882a593Smuzhiyun 		goto nomem4;
1849*4882a593Smuzhiyun 
1850*4882a593Smuzhiyun 	doc_hamming_ecc_init(docg3, DOC_LAYOUT_OOB_PAGEINFO_SZ);
1851*4882a593Smuzhiyun 	doc_reload_bbt(docg3);
1852*4882a593Smuzhiyun 	return mtd;
1853*4882a593Smuzhiyun 
1854*4882a593Smuzhiyun nomem4:
1855*4882a593Smuzhiyun 	kfree(docg3->bbt);
1856*4882a593Smuzhiyun nomem3:
1857*4882a593Smuzhiyun 	kfree(mtd);
1858*4882a593Smuzhiyun nomem2:
1859*4882a593Smuzhiyun 	kfree(docg3);
1860*4882a593Smuzhiyun nomem1:
1861*4882a593Smuzhiyun 	return ret ? ERR_PTR(ret) : NULL;
1862*4882a593Smuzhiyun }
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun /**
1865*4882a593Smuzhiyun  * doc_release_device - Release a docg3 floor
1866*4882a593Smuzhiyun  * @mtd: the device
1867*4882a593Smuzhiyun  */
doc_release_device(struct mtd_info * mtd)1868*4882a593Smuzhiyun static void doc_release_device(struct mtd_info *mtd)
1869*4882a593Smuzhiyun {
1870*4882a593Smuzhiyun 	struct docg3 *docg3 = mtd->priv;
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun 	mtd_device_unregister(mtd);
1873*4882a593Smuzhiyun 	kfree(docg3->bbt);
1874*4882a593Smuzhiyun 	kfree(docg3);
1875*4882a593Smuzhiyun 	kfree(mtd);
1876*4882a593Smuzhiyun }
1877*4882a593Smuzhiyun 
1878*4882a593Smuzhiyun /**
1879*4882a593Smuzhiyun  * docg3_resume - Awakens docg3 floor
1880*4882a593Smuzhiyun  * @pdev: platfrom device
1881*4882a593Smuzhiyun  *
1882*4882a593Smuzhiyun  * Returns 0 (always successful)
1883*4882a593Smuzhiyun  */
docg3_resume(struct platform_device * pdev)1884*4882a593Smuzhiyun static int docg3_resume(struct platform_device *pdev)
1885*4882a593Smuzhiyun {
1886*4882a593Smuzhiyun 	int i;
1887*4882a593Smuzhiyun 	struct docg3_cascade *cascade;
1888*4882a593Smuzhiyun 	struct mtd_info **docg3_floors, *mtd;
1889*4882a593Smuzhiyun 	struct docg3 *docg3;
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun 	cascade = platform_get_drvdata(pdev);
1892*4882a593Smuzhiyun 	docg3_floors = cascade->floors;
1893*4882a593Smuzhiyun 	mtd = docg3_floors[0];
1894*4882a593Smuzhiyun 	docg3 = mtd->priv;
1895*4882a593Smuzhiyun 
1896*4882a593Smuzhiyun 	doc_dbg("docg3_resume()\n");
1897*4882a593Smuzhiyun 	for (i = 0; i < 12; i++)
1898*4882a593Smuzhiyun 		doc_readb(docg3, DOC_IOSPACE_IPL);
1899*4882a593Smuzhiyun 	return 0;
1900*4882a593Smuzhiyun }
1901*4882a593Smuzhiyun 
1902*4882a593Smuzhiyun /**
1903*4882a593Smuzhiyun  * docg3_suspend - Put in low power mode the docg3 floor
1904*4882a593Smuzhiyun  * @pdev: platform device
1905*4882a593Smuzhiyun  * @state: power state
1906*4882a593Smuzhiyun  *
1907*4882a593Smuzhiyun  * Shuts off most of docg3 circuitery to lower power consumption.
1908*4882a593Smuzhiyun  *
1909*4882a593Smuzhiyun  * Returns 0 if suspend succeeded, -EIO if chip refused suspend
1910*4882a593Smuzhiyun  */
docg3_suspend(struct platform_device * pdev,pm_message_t state)1911*4882a593Smuzhiyun static int docg3_suspend(struct platform_device *pdev, pm_message_t state)
1912*4882a593Smuzhiyun {
1913*4882a593Smuzhiyun 	int floor, i;
1914*4882a593Smuzhiyun 	struct docg3_cascade *cascade;
1915*4882a593Smuzhiyun 	struct mtd_info **docg3_floors, *mtd;
1916*4882a593Smuzhiyun 	struct docg3 *docg3;
1917*4882a593Smuzhiyun 	u8 ctrl, pwr_down;
1918*4882a593Smuzhiyun 
1919*4882a593Smuzhiyun 	cascade = platform_get_drvdata(pdev);
1920*4882a593Smuzhiyun 	docg3_floors = cascade->floors;
1921*4882a593Smuzhiyun 	for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++) {
1922*4882a593Smuzhiyun 		mtd = docg3_floors[floor];
1923*4882a593Smuzhiyun 		if (!mtd)
1924*4882a593Smuzhiyun 			continue;
1925*4882a593Smuzhiyun 		docg3 = mtd->priv;
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 		doc_writeb(docg3, floor, DOC_DEVICESELECT);
1928*4882a593Smuzhiyun 		ctrl = doc_register_readb(docg3, DOC_FLASHCONTROL);
1929*4882a593Smuzhiyun 		ctrl &= ~DOC_CTRL_VIOLATION & ~DOC_CTRL_CE;
1930*4882a593Smuzhiyun 		doc_writeb(docg3, ctrl, DOC_FLASHCONTROL);
1931*4882a593Smuzhiyun 
1932*4882a593Smuzhiyun 		for (i = 0; i < 10; i++) {
1933*4882a593Smuzhiyun 			usleep_range(3000, 4000);
1934*4882a593Smuzhiyun 			pwr_down = doc_register_readb(docg3, DOC_POWERMODE);
1935*4882a593Smuzhiyun 			if (pwr_down & DOC_POWERDOWN_READY)
1936*4882a593Smuzhiyun 				break;
1937*4882a593Smuzhiyun 		}
1938*4882a593Smuzhiyun 		if (pwr_down & DOC_POWERDOWN_READY) {
1939*4882a593Smuzhiyun 			doc_dbg("docg3_suspend(): floor %d powerdown ok\n",
1940*4882a593Smuzhiyun 				floor);
1941*4882a593Smuzhiyun 		} else {
1942*4882a593Smuzhiyun 			doc_err("docg3_suspend(): floor %d powerdown failed\n",
1943*4882a593Smuzhiyun 				floor);
1944*4882a593Smuzhiyun 			return -EIO;
1945*4882a593Smuzhiyun 		}
1946*4882a593Smuzhiyun 	}
1947*4882a593Smuzhiyun 
1948*4882a593Smuzhiyun 	mtd = docg3_floors[0];
1949*4882a593Smuzhiyun 	docg3 = mtd->priv;
1950*4882a593Smuzhiyun 	doc_set_asic_mode(docg3, DOC_ASICMODE_POWERDOWN);
1951*4882a593Smuzhiyun 	return 0;
1952*4882a593Smuzhiyun }
1953*4882a593Smuzhiyun 
1954*4882a593Smuzhiyun /**
1955*4882a593Smuzhiyun  * doc_probe - Probe the IO space for a DiskOnChip G3 chip
1956*4882a593Smuzhiyun  * @pdev: platform device
1957*4882a593Smuzhiyun  *
1958*4882a593Smuzhiyun  * Probes for a G3 chip at the specified IO space in the platform data
1959*4882a593Smuzhiyun  * ressources. The floor 0 must be available.
1960*4882a593Smuzhiyun  *
1961*4882a593Smuzhiyun  * Returns 0 on success, -ENOMEM, -ENXIO on error
1962*4882a593Smuzhiyun  */
docg3_probe(struct platform_device * pdev)1963*4882a593Smuzhiyun static int __init docg3_probe(struct platform_device *pdev)
1964*4882a593Smuzhiyun {
1965*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
1966*4882a593Smuzhiyun 	struct mtd_info *mtd;
1967*4882a593Smuzhiyun 	struct resource *ress;
1968*4882a593Smuzhiyun 	void __iomem *base;
1969*4882a593Smuzhiyun 	int ret, floor;
1970*4882a593Smuzhiyun 	struct docg3_cascade *cascade;
1971*4882a593Smuzhiyun 
1972*4882a593Smuzhiyun 	ret = -ENXIO;
1973*4882a593Smuzhiyun 	ress = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1974*4882a593Smuzhiyun 	if (!ress) {
1975*4882a593Smuzhiyun 		dev_err(dev, "No I/O memory resource defined\n");
1976*4882a593Smuzhiyun 		return ret;
1977*4882a593Smuzhiyun 	}
1978*4882a593Smuzhiyun 
1979*4882a593Smuzhiyun 	ret = -ENOMEM;
1980*4882a593Smuzhiyun 	base = devm_ioremap(dev, ress->start, DOC_IOSPACE_SIZE);
1981*4882a593Smuzhiyun 	if (!base) {
1982*4882a593Smuzhiyun 		dev_err(dev, "devm_ioremap dev failed\n");
1983*4882a593Smuzhiyun 		return ret;
1984*4882a593Smuzhiyun 	}
1985*4882a593Smuzhiyun 
1986*4882a593Smuzhiyun 	cascade = devm_kcalloc(dev, DOC_MAX_NBFLOORS, sizeof(*cascade),
1987*4882a593Smuzhiyun 			       GFP_KERNEL);
1988*4882a593Smuzhiyun 	if (!cascade)
1989*4882a593Smuzhiyun 		return ret;
1990*4882a593Smuzhiyun 	cascade->base = base;
1991*4882a593Smuzhiyun 	mutex_init(&cascade->lock);
1992*4882a593Smuzhiyun 	cascade->bch = bch_init(DOC_ECC_BCH_M, DOC_ECC_BCH_T,
1993*4882a593Smuzhiyun 				DOC_ECC_BCH_PRIMPOLY, false);
1994*4882a593Smuzhiyun 	if (!cascade->bch)
1995*4882a593Smuzhiyun 		return ret;
1996*4882a593Smuzhiyun 
1997*4882a593Smuzhiyun 	for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++) {
1998*4882a593Smuzhiyun 		mtd = doc_probe_device(cascade, floor, dev);
1999*4882a593Smuzhiyun 		if (IS_ERR(mtd)) {
2000*4882a593Smuzhiyun 			ret = PTR_ERR(mtd);
2001*4882a593Smuzhiyun 			goto err_probe;
2002*4882a593Smuzhiyun 		}
2003*4882a593Smuzhiyun 		if (!mtd) {
2004*4882a593Smuzhiyun 			if (floor == 0)
2005*4882a593Smuzhiyun 				goto notfound;
2006*4882a593Smuzhiyun 			else
2007*4882a593Smuzhiyun 				continue;
2008*4882a593Smuzhiyun 		}
2009*4882a593Smuzhiyun 		cascade->floors[floor] = mtd;
2010*4882a593Smuzhiyun 		ret = mtd_device_parse_register(mtd, part_probes, NULL, NULL,
2011*4882a593Smuzhiyun 						0);
2012*4882a593Smuzhiyun 		if (ret)
2013*4882a593Smuzhiyun 			goto err_probe;
2014*4882a593Smuzhiyun 
2015*4882a593Smuzhiyun 		doc_dbg_register(cascade->floors[floor]);
2016*4882a593Smuzhiyun 	}
2017*4882a593Smuzhiyun 
2018*4882a593Smuzhiyun 	ret = doc_register_sysfs(pdev, cascade);
2019*4882a593Smuzhiyun 	if (ret)
2020*4882a593Smuzhiyun 		goto err_probe;
2021*4882a593Smuzhiyun 
2022*4882a593Smuzhiyun 	platform_set_drvdata(pdev, cascade);
2023*4882a593Smuzhiyun 	return 0;
2024*4882a593Smuzhiyun 
2025*4882a593Smuzhiyun notfound:
2026*4882a593Smuzhiyun 	ret = -ENODEV;
2027*4882a593Smuzhiyun 	dev_info(dev, "No supported DiskOnChip found\n");
2028*4882a593Smuzhiyun err_probe:
2029*4882a593Smuzhiyun 	bch_free(cascade->bch);
2030*4882a593Smuzhiyun 	for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++)
2031*4882a593Smuzhiyun 		if (cascade->floors[floor])
2032*4882a593Smuzhiyun 			doc_release_device(cascade->floors[floor]);
2033*4882a593Smuzhiyun 	return ret;
2034*4882a593Smuzhiyun }
2035*4882a593Smuzhiyun 
2036*4882a593Smuzhiyun /**
2037*4882a593Smuzhiyun  * docg3_release - Release the driver
2038*4882a593Smuzhiyun  * @pdev: the platform device
2039*4882a593Smuzhiyun  *
2040*4882a593Smuzhiyun  * Returns 0
2041*4882a593Smuzhiyun  */
docg3_release(struct platform_device * pdev)2042*4882a593Smuzhiyun static int docg3_release(struct platform_device *pdev)
2043*4882a593Smuzhiyun {
2044*4882a593Smuzhiyun 	struct docg3_cascade *cascade = platform_get_drvdata(pdev);
2045*4882a593Smuzhiyun 	struct docg3 *docg3 = cascade->floors[0]->priv;
2046*4882a593Smuzhiyun 	int floor;
2047*4882a593Smuzhiyun 
2048*4882a593Smuzhiyun 	doc_unregister_sysfs(pdev, cascade);
2049*4882a593Smuzhiyun 	for (floor = 0; floor < DOC_MAX_NBFLOORS; floor++)
2050*4882a593Smuzhiyun 		if (cascade->floors[floor])
2051*4882a593Smuzhiyun 			doc_release_device(cascade->floors[floor]);
2052*4882a593Smuzhiyun 
2053*4882a593Smuzhiyun 	bch_free(docg3->cascade->bch);
2054*4882a593Smuzhiyun 	return 0;
2055*4882a593Smuzhiyun }
2056*4882a593Smuzhiyun 
2057*4882a593Smuzhiyun #ifdef CONFIG_OF
2058*4882a593Smuzhiyun static const struct of_device_id docg3_dt_ids[] = {
2059*4882a593Smuzhiyun 	{ .compatible = "m-systems,diskonchip-g3" },
2060*4882a593Smuzhiyun 	{}
2061*4882a593Smuzhiyun };
2062*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, docg3_dt_ids);
2063*4882a593Smuzhiyun #endif
2064*4882a593Smuzhiyun 
2065*4882a593Smuzhiyun static struct platform_driver g3_driver = {
2066*4882a593Smuzhiyun 	.driver		= {
2067*4882a593Smuzhiyun 		.name	= "docg3",
2068*4882a593Smuzhiyun 		.of_match_table = of_match_ptr(docg3_dt_ids),
2069*4882a593Smuzhiyun 	},
2070*4882a593Smuzhiyun 	.suspend	= docg3_suspend,
2071*4882a593Smuzhiyun 	.resume		= docg3_resume,
2072*4882a593Smuzhiyun 	.remove		= docg3_release,
2073*4882a593Smuzhiyun };
2074*4882a593Smuzhiyun 
2075*4882a593Smuzhiyun module_platform_driver_probe(g3_driver, docg3_probe);
2076*4882a593Smuzhiyun 
2077*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2078*4882a593Smuzhiyun MODULE_AUTHOR("Robert Jarzmik <robert.jarzmik@free.fr>");
2079*4882a593Smuzhiyun MODULE_DESCRIPTION("MTD driver for DiskOnChip G3");
2080