1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun #include <linux/kernel.h>
3*4882a593Smuzhiyun #include <linux/module.h>
4*4882a593Smuzhiyun #include <linux/slab.h>
5*4882a593Smuzhiyun #include <linux/delay.h>
6*4882a593Smuzhiyun #include <linux/ioport.h>
7*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
8*4882a593Smuzhiyun #include <linux/platform_device.h>
9*4882a593Smuzhiyun #include <linux/bcma/bcma.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "bcm47xxsflash.h"
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun MODULE_LICENSE("GPL");
14*4882a593Smuzhiyun MODULE_DESCRIPTION("Serial flash driver for BCMA bus");
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun static const char * const probes[] = { "bcm47xxpart", NULL };
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /**************************************************
19*4882a593Smuzhiyun * Various helpers
20*4882a593Smuzhiyun **************************************************/
21*4882a593Smuzhiyun
bcm47xxsflash_cmd(struct bcm47xxsflash * b47s,u32 opcode)22*4882a593Smuzhiyun static void bcm47xxsflash_cmd(struct bcm47xxsflash *b47s, u32 opcode)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun int i;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHCTL, BCMA_CC_FLASHCTL_START | opcode);
27*4882a593Smuzhiyun for (i = 0; i < 1000; i++) {
28*4882a593Smuzhiyun if (!(b47s->cc_read(b47s, BCMA_CC_FLASHCTL) &
29*4882a593Smuzhiyun BCMA_CC_FLASHCTL_BUSY))
30*4882a593Smuzhiyun return;
31*4882a593Smuzhiyun cpu_relax();
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun pr_err("Control command failed (timeout)!\n");
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
bcm47xxsflash_poll(struct bcm47xxsflash * b47s,int timeout)36*4882a593Smuzhiyun static int bcm47xxsflash_poll(struct bcm47xxsflash *b47s, int timeout)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun unsigned long deadline = jiffies + timeout;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun do {
41*4882a593Smuzhiyun switch (b47s->type) {
42*4882a593Smuzhiyun case BCM47XXSFLASH_TYPE_ST:
43*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_RDSR);
44*4882a593Smuzhiyun if (!(b47s->cc_read(b47s, BCMA_CC_FLASHDATA) &
45*4882a593Smuzhiyun SR_ST_WIP))
46*4882a593Smuzhiyun return 0;
47*4882a593Smuzhiyun break;
48*4882a593Smuzhiyun case BCM47XXSFLASH_TYPE_ATMEL:
49*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_AT_STATUS);
50*4882a593Smuzhiyun if (b47s->cc_read(b47s, BCMA_CC_FLASHDATA) &
51*4882a593Smuzhiyun SR_AT_READY)
52*4882a593Smuzhiyun return 0;
53*4882a593Smuzhiyun break;
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun cpu_relax();
57*4882a593Smuzhiyun udelay(1);
58*4882a593Smuzhiyun } while (!time_after_eq(jiffies, deadline));
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun pr_err("Timeout waiting for flash to be ready!\n");
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return -EBUSY;
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun /**************************************************
66*4882a593Smuzhiyun * MTD ops
67*4882a593Smuzhiyun **************************************************/
68*4882a593Smuzhiyun
bcm47xxsflash_erase(struct mtd_info * mtd,struct erase_info * erase)69*4882a593Smuzhiyun static int bcm47xxsflash_erase(struct mtd_info *mtd, struct erase_info *erase)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun struct bcm47xxsflash *b47s = mtd->priv;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun switch (b47s->type) {
74*4882a593Smuzhiyun case BCM47XXSFLASH_TYPE_ST:
75*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_WREN);
76*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, erase->addr);
77*4882a593Smuzhiyun /* Newer flashes have "sub-sectors" which can be erased
78*4882a593Smuzhiyun * independently with a new command: ST_SSE. The ST_SE command
79*4882a593Smuzhiyun * erases 64KB just as before.
80*4882a593Smuzhiyun */
81*4882a593Smuzhiyun if (b47s->blocksize < (64 * 1024))
82*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_SSE);
83*4882a593Smuzhiyun else
84*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_SE);
85*4882a593Smuzhiyun break;
86*4882a593Smuzhiyun case BCM47XXSFLASH_TYPE_ATMEL:
87*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, erase->addr << 1);
88*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_AT_PAGE_ERASE);
89*4882a593Smuzhiyun break;
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun return bcm47xxsflash_poll(b47s, HZ);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
bcm47xxsflash_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)95*4882a593Smuzhiyun static int bcm47xxsflash_read(struct mtd_info *mtd, loff_t from, size_t len,
96*4882a593Smuzhiyun size_t *retlen, u_char *buf)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun struct bcm47xxsflash *b47s = mtd->priv;
99*4882a593Smuzhiyun size_t orig_len = len;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /* Check address range */
102*4882a593Smuzhiyun if ((from + len) > mtd->size)
103*4882a593Smuzhiyun return -EINVAL;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun /* Read as much as possible using fast MMIO window */
106*4882a593Smuzhiyun if (from < BCM47XXSFLASH_WINDOW_SZ) {
107*4882a593Smuzhiyun size_t memcpy_len;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun memcpy_len = min(len, (size_t)(BCM47XXSFLASH_WINDOW_SZ - from));
110*4882a593Smuzhiyun memcpy_fromio(buf, b47s->window + from, memcpy_len);
111*4882a593Smuzhiyun from += memcpy_len;
112*4882a593Smuzhiyun len -= memcpy_len;
113*4882a593Smuzhiyun buf += memcpy_len;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun /* Use indirect access for content out of the window */
117*4882a593Smuzhiyun for (; len; len--) {
118*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, from++);
119*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_READ4B);
120*4882a593Smuzhiyun *buf++ = b47s->cc_read(b47s, BCMA_CC_FLASHDATA);
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun *retlen = orig_len;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun return orig_len;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
bcm47xxsflash_write_st(struct mtd_info * mtd,u32 offset,size_t len,const u_char * buf)128*4882a593Smuzhiyun static int bcm47xxsflash_write_st(struct mtd_info *mtd, u32 offset, size_t len,
129*4882a593Smuzhiyun const u_char *buf)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun struct bcm47xxsflash *b47s = mtd->priv;
132*4882a593Smuzhiyun int written = 0;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun /* Enable writes */
135*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_WREN);
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /* Write first byte */
138*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, offset);
139*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHDATA, *buf++);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /* Program page */
142*4882a593Smuzhiyun if (b47s->bcma_cc->core->id.rev < 20) {
143*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_PP);
144*4882a593Smuzhiyun return 1; /* 1B written */
145*4882a593Smuzhiyun }
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun /* Program page and set CSA (on newer chips we can continue writing) */
148*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_CSA | OPCODE_ST_PP);
149*4882a593Smuzhiyun offset++;
150*4882a593Smuzhiyun len--;
151*4882a593Smuzhiyun written++;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun while (len > 0) {
154*4882a593Smuzhiyun /* Page boundary, another function call is needed */
155*4882a593Smuzhiyun if ((offset & 0xFF) == 0)
156*4882a593Smuzhiyun break;
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_ST_CSA | *buf++);
159*4882a593Smuzhiyun offset++;
160*4882a593Smuzhiyun len--;
161*4882a593Smuzhiyun written++;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun /* All done, drop CSA & poll */
165*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHCTL, 0);
166*4882a593Smuzhiyun udelay(1);
167*4882a593Smuzhiyun if (bcm47xxsflash_poll(b47s, HZ / 10))
168*4882a593Smuzhiyun pr_err("Flash rejected dropping CSA\n");
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun return written;
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
bcm47xxsflash_write_at(struct mtd_info * mtd,u32 offset,size_t len,const u_char * buf)173*4882a593Smuzhiyun static int bcm47xxsflash_write_at(struct mtd_info *mtd, u32 offset, size_t len,
174*4882a593Smuzhiyun const u_char *buf)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun struct bcm47xxsflash *b47s = mtd->priv;
177*4882a593Smuzhiyun u32 mask = b47s->blocksize - 1;
178*4882a593Smuzhiyun u32 page = (offset & ~mask) << 1;
179*4882a593Smuzhiyun u32 byte = offset & mask;
180*4882a593Smuzhiyun int written = 0;
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun /* If we don't overwrite whole page, read it to the buffer first */
183*4882a593Smuzhiyun if (byte || (len < b47s->blocksize)) {
184*4882a593Smuzhiyun int err;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, page);
187*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_LOAD);
188*4882a593Smuzhiyun /* 250 us for AT45DB321B */
189*4882a593Smuzhiyun err = bcm47xxsflash_poll(b47s, HZ / 1000);
190*4882a593Smuzhiyun if (err) {
191*4882a593Smuzhiyun pr_err("Timeout reading page 0x%X info buffer\n", page);
192*4882a593Smuzhiyun return err;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* Change buffer content with our data */
197*4882a593Smuzhiyun while (len > 0) {
198*4882a593Smuzhiyun /* Page boundary, another function call is needed */
199*4882a593Smuzhiyun if (byte == b47s->blocksize)
200*4882a593Smuzhiyun break;
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, byte++);
203*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHDATA, *buf++);
204*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_WRITE);
205*4882a593Smuzhiyun len--;
206*4882a593Smuzhiyun written++;
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* Program page with the buffer content */
210*4882a593Smuzhiyun b47s->cc_write(b47s, BCMA_CC_FLASHADDR, page);
211*4882a593Smuzhiyun bcm47xxsflash_cmd(b47s, OPCODE_AT_BUF1_PROGRAM);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun return written;
214*4882a593Smuzhiyun }
215*4882a593Smuzhiyun
bcm47xxsflash_write(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)216*4882a593Smuzhiyun static int bcm47xxsflash_write(struct mtd_info *mtd, loff_t to, size_t len,
217*4882a593Smuzhiyun size_t *retlen, const u_char *buf)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun struct bcm47xxsflash *b47s = mtd->priv;
220*4882a593Smuzhiyun int written;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* Writing functions can return without writing all passed data, for
223*4882a593Smuzhiyun * example when the hardware is too old or when we git page boundary.
224*4882a593Smuzhiyun */
225*4882a593Smuzhiyun while (len > 0) {
226*4882a593Smuzhiyun switch (b47s->type) {
227*4882a593Smuzhiyun case BCM47XXSFLASH_TYPE_ST:
228*4882a593Smuzhiyun written = bcm47xxsflash_write_st(mtd, to, len, buf);
229*4882a593Smuzhiyun break;
230*4882a593Smuzhiyun case BCM47XXSFLASH_TYPE_ATMEL:
231*4882a593Smuzhiyun written = bcm47xxsflash_write_at(mtd, to, len, buf);
232*4882a593Smuzhiyun break;
233*4882a593Smuzhiyun default:
234*4882a593Smuzhiyun BUG_ON(1);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun if (written < 0) {
237*4882a593Smuzhiyun pr_err("Error writing at offset 0x%llX\n", to);
238*4882a593Smuzhiyun return written;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun to += (loff_t)written;
241*4882a593Smuzhiyun len -= written;
242*4882a593Smuzhiyun *retlen += written;
243*4882a593Smuzhiyun buf += written;
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun return 0;
247*4882a593Smuzhiyun }
248*4882a593Smuzhiyun
bcm47xxsflash_fill_mtd(struct bcm47xxsflash * b47s,struct device * dev)249*4882a593Smuzhiyun static void bcm47xxsflash_fill_mtd(struct bcm47xxsflash *b47s,
250*4882a593Smuzhiyun struct device *dev)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun struct mtd_info *mtd = &b47s->mtd;
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun mtd->priv = b47s;
255*4882a593Smuzhiyun mtd->dev.parent = dev;
256*4882a593Smuzhiyun mtd->name = "bcm47xxsflash";
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun mtd->type = MTD_NORFLASH;
259*4882a593Smuzhiyun mtd->flags = MTD_CAP_NORFLASH;
260*4882a593Smuzhiyun mtd->size = b47s->size;
261*4882a593Smuzhiyun mtd->erasesize = b47s->blocksize;
262*4882a593Smuzhiyun mtd->writesize = 1;
263*4882a593Smuzhiyun mtd->writebufsize = 1;
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun mtd->_erase = bcm47xxsflash_erase;
266*4882a593Smuzhiyun mtd->_read = bcm47xxsflash_read;
267*4882a593Smuzhiyun mtd->_write = bcm47xxsflash_write;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /**************************************************
271*4882a593Smuzhiyun * BCMA
272*4882a593Smuzhiyun **************************************************/
273*4882a593Smuzhiyun
bcm47xxsflash_bcma_cc_read(struct bcm47xxsflash * b47s,u16 offset)274*4882a593Smuzhiyun static int bcm47xxsflash_bcma_cc_read(struct bcm47xxsflash *b47s, u16 offset)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun return bcma_cc_read32(b47s->bcma_cc, offset);
277*4882a593Smuzhiyun }
278*4882a593Smuzhiyun
bcm47xxsflash_bcma_cc_write(struct bcm47xxsflash * b47s,u16 offset,u32 value)279*4882a593Smuzhiyun static void bcm47xxsflash_bcma_cc_write(struct bcm47xxsflash *b47s, u16 offset,
280*4882a593Smuzhiyun u32 value)
281*4882a593Smuzhiyun {
282*4882a593Smuzhiyun bcma_cc_write32(b47s->bcma_cc, offset, value);
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun
bcm47xxsflash_bcma_probe(struct platform_device * pdev)285*4882a593Smuzhiyun static int bcm47xxsflash_bcma_probe(struct platform_device *pdev)
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun struct device *dev = &pdev->dev;
288*4882a593Smuzhiyun struct bcma_sflash *sflash = dev_get_platdata(dev);
289*4882a593Smuzhiyun struct bcm47xxsflash *b47s;
290*4882a593Smuzhiyun struct resource *res;
291*4882a593Smuzhiyun int err;
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun b47s = devm_kzalloc(dev, sizeof(*b47s), GFP_KERNEL);
294*4882a593Smuzhiyun if (!b47s)
295*4882a593Smuzhiyun return -ENOMEM;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
298*4882a593Smuzhiyun if (!res) {
299*4882a593Smuzhiyun dev_err(dev, "invalid resource\n");
300*4882a593Smuzhiyun return -EINVAL;
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun if (!devm_request_mem_region(dev, res->start, resource_size(res),
303*4882a593Smuzhiyun res->name)) {
304*4882a593Smuzhiyun dev_err(dev, "can't request region for resource %pR\n", res);
305*4882a593Smuzhiyun return -EBUSY;
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun b47s->bcma_cc = container_of(sflash, struct bcma_drv_cc, sflash);
309*4882a593Smuzhiyun b47s->cc_read = bcm47xxsflash_bcma_cc_read;
310*4882a593Smuzhiyun b47s->cc_write = bcm47xxsflash_bcma_cc_write;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun /*
313*4882a593Smuzhiyun * On old MIPS devices cache was magically invalidated when needed,
314*4882a593Smuzhiyun * allowing us to use cached access and gain some performance. Trying
315*4882a593Smuzhiyun * the same on ARM based BCM53573 results in flash corruptions, we need
316*4882a593Smuzhiyun * to use uncached access for it.
317*4882a593Smuzhiyun *
318*4882a593Smuzhiyun * It may be arch specific, but right now there is only 1 ARM SoC using
319*4882a593Smuzhiyun * this driver, so let's follow Broadcom's reference code and check
320*4882a593Smuzhiyun * ChipCommon revision.
321*4882a593Smuzhiyun */
322*4882a593Smuzhiyun if (b47s->bcma_cc->core->id.rev == 54)
323*4882a593Smuzhiyun b47s->window = ioremap(res->start, resource_size(res));
324*4882a593Smuzhiyun else
325*4882a593Smuzhiyun b47s->window = ioremap_cache(res->start, resource_size(res));
326*4882a593Smuzhiyun if (!b47s->window) {
327*4882a593Smuzhiyun dev_err(dev, "ioremap failed for resource %pR\n", res);
328*4882a593Smuzhiyun return -ENOMEM;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun switch (b47s->bcma_cc->capabilities & BCMA_CC_CAP_FLASHT) {
332*4882a593Smuzhiyun case BCMA_CC_FLASHT_STSER:
333*4882a593Smuzhiyun b47s->type = BCM47XXSFLASH_TYPE_ST;
334*4882a593Smuzhiyun break;
335*4882a593Smuzhiyun case BCMA_CC_FLASHT_ATSER:
336*4882a593Smuzhiyun b47s->type = BCM47XXSFLASH_TYPE_ATMEL;
337*4882a593Smuzhiyun break;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun b47s->blocksize = sflash->blocksize;
341*4882a593Smuzhiyun b47s->numblocks = sflash->numblocks;
342*4882a593Smuzhiyun b47s->size = sflash->size;
343*4882a593Smuzhiyun bcm47xxsflash_fill_mtd(b47s, &pdev->dev);
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun platform_set_drvdata(pdev, b47s);
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun err = mtd_device_parse_register(&b47s->mtd, probes, NULL, NULL, 0);
348*4882a593Smuzhiyun if (err) {
349*4882a593Smuzhiyun pr_err("Failed to register MTD device: %d\n", err);
350*4882a593Smuzhiyun iounmap(b47s->window);
351*4882a593Smuzhiyun return err;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun if (bcm47xxsflash_poll(b47s, HZ / 10))
355*4882a593Smuzhiyun pr_warn("Serial flash busy\n");
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun return 0;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
bcm47xxsflash_bcma_remove(struct platform_device * pdev)360*4882a593Smuzhiyun static int bcm47xxsflash_bcma_remove(struct platform_device *pdev)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun struct bcm47xxsflash *b47s = platform_get_drvdata(pdev);
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun mtd_device_unregister(&b47s->mtd);
365*4882a593Smuzhiyun iounmap(b47s->window);
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun return 0;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun static struct platform_driver bcma_sflash_driver = {
371*4882a593Smuzhiyun .probe = bcm47xxsflash_bcma_probe,
372*4882a593Smuzhiyun .remove = bcm47xxsflash_bcma_remove,
373*4882a593Smuzhiyun .driver = {
374*4882a593Smuzhiyun .name = "bcma_sflash",
375*4882a593Smuzhiyun },
376*4882a593Smuzhiyun };
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun /**************************************************
379*4882a593Smuzhiyun * Init
380*4882a593Smuzhiyun **************************************************/
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun module_platform_driver(bcma_sflash_driver);
383