1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Common Flash Interface support:
3*4882a593Smuzhiyun * ST Advanced Architecture Command Set (ID 0x0020)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) 2000 Red Hat. GPL'd
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * 10/10/2000 Nicolas Pitre <nico@fluxnic.net>
8*4882a593Smuzhiyun * - completely revamped method functions so they are aware and
9*4882a593Smuzhiyun * independent of the flash geometry (buswidth, interleave, etc.)
10*4882a593Smuzhiyun * - scalability vs code size is completely set at compile-time
11*4882a593Smuzhiyun * (see include/linux/mtd/cfi.h for selection)
12*4882a593Smuzhiyun * - optimized write buffer method
13*4882a593Smuzhiyun * 06/21/2002 Joern Engel <joern@wh.fh-wedel.de> and others
14*4882a593Smuzhiyun * - modified Intel Command Set 0x0001 to support ST Advanced Architecture
15*4882a593Smuzhiyun * (command set 0x0020)
16*4882a593Smuzhiyun * - added a writev function
17*4882a593Smuzhiyun * 07/13/2005 Joern Engel <joern@wh.fh-wedel.de>
18*4882a593Smuzhiyun * - Plugged memory leak in cfi_staa_writev().
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/module.h>
22*4882a593Smuzhiyun #include <linux/types.h>
23*4882a593Smuzhiyun #include <linux/kernel.h>
24*4882a593Smuzhiyun #include <linux/sched.h>
25*4882a593Smuzhiyun #include <asm/io.h>
26*4882a593Smuzhiyun #include <asm/byteorder.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #include <linux/errno.h>
29*4882a593Smuzhiyun #include <linux/slab.h>
30*4882a593Smuzhiyun #include <linux/delay.h>
31*4882a593Smuzhiyun #include <linux/interrupt.h>
32*4882a593Smuzhiyun #include <linux/mtd/map.h>
33*4882a593Smuzhiyun #include <linux/mtd/cfi.h>
34*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static int cfi_staa_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *);
38*4882a593Smuzhiyun static int cfi_staa_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
39*4882a593Smuzhiyun static int cfi_staa_writev(struct mtd_info *mtd, const struct kvec *vecs,
40*4882a593Smuzhiyun unsigned long count, loff_t to, size_t *retlen);
41*4882a593Smuzhiyun static int cfi_staa_erase_varsize(struct mtd_info *, struct erase_info *);
42*4882a593Smuzhiyun static void cfi_staa_sync (struct mtd_info *);
43*4882a593Smuzhiyun static int cfi_staa_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
44*4882a593Smuzhiyun static int cfi_staa_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
45*4882a593Smuzhiyun static int cfi_staa_suspend (struct mtd_info *);
46*4882a593Smuzhiyun static void cfi_staa_resume (struct mtd_info *);
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun static void cfi_staa_destroy(struct mtd_info *);
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun struct mtd_info *cfi_cmdset_0020(struct map_info *, int);
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun static struct mtd_info *cfi_staa_setup (struct map_info *);
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static struct mtd_chip_driver cfi_staa_chipdrv = {
55*4882a593Smuzhiyun .probe = NULL, /* Not usable directly */
56*4882a593Smuzhiyun .destroy = cfi_staa_destroy,
57*4882a593Smuzhiyun .name = "cfi_cmdset_0020",
58*4882a593Smuzhiyun .module = THIS_MODULE
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* #define DEBUG_LOCK_BITS */
62*4882a593Smuzhiyun //#define DEBUG_CFI_FEATURES
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
cfi_tell_features(struct cfi_pri_intelext * extp)65*4882a593Smuzhiyun static void cfi_tell_features(struct cfi_pri_intelext *extp)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun int i;
68*4882a593Smuzhiyun printk(" Feature/Command Support: %4.4X\n", extp->FeatureSupport);
69*4882a593Smuzhiyun printk(" - Chip Erase: %s\n", extp->FeatureSupport&1?"supported":"unsupported");
70*4882a593Smuzhiyun printk(" - Suspend Erase: %s\n", extp->FeatureSupport&2?"supported":"unsupported");
71*4882a593Smuzhiyun printk(" - Suspend Program: %s\n", extp->FeatureSupport&4?"supported":"unsupported");
72*4882a593Smuzhiyun printk(" - Legacy Lock/Unlock: %s\n", extp->FeatureSupport&8?"supported":"unsupported");
73*4882a593Smuzhiyun printk(" - Queued Erase: %s\n", extp->FeatureSupport&16?"supported":"unsupported");
74*4882a593Smuzhiyun printk(" - Instant block lock: %s\n", extp->FeatureSupport&32?"supported":"unsupported");
75*4882a593Smuzhiyun printk(" - Protection Bits: %s\n", extp->FeatureSupport&64?"supported":"unsupported");
76*4882a593Smuzhiyun printk(" - Page-mode read: %s\n", extp->FeatureSupport&128?"supported":"unsupported");
77*4882a593Smuzhiyun printk(" - Synchronous read: %s\n", extp->FeatureSupport&256?"supported":"unsupported");
78*4882a593Smuzhiyun for (i=9; i<32; i++) {
79*4882a593Smuzhiyun if (extp->FeatureSupport & (1<<i))
80*4882a593Smuzhiyun printk(" - Unknown Bit %X: supported\n", i);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun printk(" Supported functions after Suspend: %2.2X\n", extp->SuspendCmdSupport);
84*4882a593Smuzhiyun printk(" - Program after Erase Suspend: %s\n", extp->SuspendCmdSupport&1?"supported":"unsupported");
85*4882a593Smuzhiyun for (i=1; i<8; i++) {
86*4882a593Smuzhiyun if (extp->SuspendCmdSupport & (1<<i))
87*4882a593Smuzhiyun printk(" - Unknown Bit %X: supported\n", i);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun printk(" Block Status Register Mask: %4.4X\n", extp->BlkStatusRegMask);
91*4882a593Smuzhiyun printk(" - Lock Bit Active: %s\n", extp->BlkStatusRegMask&1?"yes":"no");
92*4882a593Smuzhiyun printk(" - Valid Bit Active: %s\n", extp->BlkStatusRegMask&2?"yes":"no");
93*4882a593Smuzhiyun for (i=2; i<16; i++) {
94*4882a593Smuzhiyun if (extp->BlkStatusRegMask & (1<<i))
95*4882a593Smuzhiyun printk(" - Unknown Bit %X Active: yes\n",i);
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun printk(" Vcc Logic Supply Optimum Program/Erase Voltage: %d.%d V\n",
99*4882a593Smuzhiyun extp->VccOptimal >> 8, extp->VccOptimal & 0xf);
100*4882a593Smuzhiyun if (extp->VppOptimal)
101*4882a593Smuzhiyun printk(" Vpp Programming Supply Optimum Program/Erase Voltage: %d.%d V\n",
102*4882a593Smuzhiyun extp->VppOptimal >> 8, extp->VppOptimal & 0xf);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun #endif
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* This routine is made available to other mtd code via
107*4882a593Smuzhiyun * inter_module_register. It must only be accessed through
108*4882a593Smuzhiyun * inter_module_get which will bump the use count of this module. The
109*4882a593Smuzhiyun * addresses passed back in cfi are valid as long as the use count of
110*4882a593Smuzhiyun * this module is non-zero, i.e. between inter_module_get and
111*4882a593Smuzhiyun * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
112*4882a593Smuzhiyun */
cfi_cmdset_0020(struct map_info * map,int primary)113*4882a593Smuzhiyun struct mtd_info *cfi_cmdset_0020(struct map_info *map, int primary)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
116*4882a593Smuzhiyun int i;
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun if (cfi->cfi_mode) {
119*4882a593Smuzhiyun /*
120*4882a593Smuzhiyun * It's a real CFI chip, not one for which the probe
121*4882a593Smuzhiyun * routine faked a CFI structure. So we read the feature
122*4882a593Smuzhiyun * table from it.
123*4882a593Smuzhiyun */
124*4882a593Smuzhiyun __u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
125*4882a593Smuzhiyun struct cfi_pri_intelext *extp;
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun extp = (struct cfi_pri_intelext*)cfi_read_pri(map, adr, sizeof(*extp), "ST Microelectronics");
128*4882a593Smuzhiyun if (!extp)
129*4882a593Smuzhiyun return NULL;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun if (extp->MajorVersion != '1' ||
132*4882a593Smuzhiyun (extp->MinorVersion < '0' || extp->MinorVersion > '3')) {
133*4882a593Smuzhiyun printk(KERN_ERR " Unknown ST Microelectronics"
134*4882a593Smuzhiyun " Extended Query version %c.%c.\n",
135*4882a593Smuzhiyun extp->MajorVersion, extp->MinorVersion);
136*4882a593Smuzhiyun kfree(extp);
137*4882a593Smuzhiyun return NULL;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun /* Do some byteswapping if necessary */
141*4882a593Smuzhiyun extp->FeatureSupport = cfi32_to_cpu(map, extp->FeatureSupport);
142*4882a593Smuzhiyun extp->BlkStatusRegMask = cfi32_to_cpu(map,
143*4882a593Smuzhiyun extp->BlkStatusRegMask);
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
146*4882a593Smuzhiyun /* Tell the user about it in lots of lovely detail */
147*4882a593Smuzhiyun cfi_tell_features(extp);
148*4882a593Smuzhiyun #endif
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* Install our own private info structure */
151*4882a593Smuzhiyun cfi->cmdset_priv = extp;
152*4882a593Smuzhiyun }
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun for (i=0; i< cfi->numchips; i++) {
155*4882a593Smuzhiyun cfi->chips[i].word_write_time = 128;
156*4882a593Smuzhiyun cfi->chips[i].buffer_write_time = 128;
157*4882a593Smuzhiyun cfi->chips[i].erase_time = 1024;
158*4882a593Smuzhiyun cfi->chips[i].ref_point_counter = 0;
159*4882a593Smuzhiyun init_waitqueue_head(&(cfi->chips[i].wq));
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun return cfi_staa_setup(map);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cfi_cmdset_0020);
165*4882a593Smuzhiyun
cfi_staa_setup(struct map_info * map)166*4882a593Smuzhiyun static struct mtd_info *cfi_staa_setup(struct map_info *map)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
169*4882a593Smuzhiyun struct mtd_info *mtd;
170*4882a593Smuzhiyun unsigned long offset = 0;
171*4882a593Smuzhiyun int i,j;
172*4882a593Smuzhiyun unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun mtd = kzalloc(sizeof(*mtd), GFP_KERNEL);
175*4882a593Smuzhiyun //printk(KERN_DEBUG "number of CFI chips: %d\n", cfi->numchips);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (!mtd) {
178*4882a593Smuzhiyun kfree(cfi->cmdset_priv);
179*4882a593Smuzhiyun return NULL;
180*4882a593Smuzhiyun }
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun mtd->priv = map;
183*4882a593Smuzhiyun mtd->type = MTD_NORFLASH;
184*4882a593Smuzhiyun mtd->size = devsize * cfi->numchips;
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
187*4882a593Smuzhiyun mtd->eraseregions = kmalloc_array(mtd->numeraseregions,
188*4882a593Smuzhiyun sizeof(struct mtd_erase_region_info),
189*4882a593Smuzhiyun GFP_KERNEL);
190*4882a593Smuzhiyun if (!mtd->eraseregions) {
191*4882a593Smuzhiyun kfree(cfi->cmdset_priv);
192*4882a593Smuzhiyun kfree(mtd);
193*4882a593Smuzhiyun return NULL;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
197*4882a593Smuzhiyun unsigned long ernum, ersize;
198*4882a593Smuzhiyun ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
199*4882a593Smuzhiyun ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (mtd->erasesize < ersize) {
202*4882a593Smuzhiyun mtd->erasesize = ersize;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun for (j=0; j<cfi->numchips; j++) {
205*4882a593Smuzhiyun mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
206*4882a593Smuzhiyun mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
207*4882a593Smuzhiyun mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun offset += (ersize * ernum);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun if (offset != devsize) {
213*4882a593Smuzhiyun /* Argh */
214*4882a593Smuzhiyun printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
215*4882a593Smuzhiyun kfree(mtd->eraseregions);
216*4882a593Smuzhiyun kfree(cfi->cmdset_priv);
217*4882a593Smuzhiyun kfree(mtd);
218*4882a593Smuzhiyun return NULL;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun for (i=0; i<mtd->numeraseregions;i++){
222*4882a593Smuzhiyun printk(KERN_DEBUG "%d: offset=0x%llx,size=0x%x,blocks=%d\n",
223*4882a593Smuzhiyun i, (unsigned long long)mtd->eraseregions[i].offset,
224*4882a593Smuzhiyun mtd->eraseregions[i].erasesize,
225*4882a593Smuzhiyun mtd->eraseregions[i].numblocks);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun /* Also select the correct geometry setup too */
229*4882a593Smuzhiyun mtd->_erase = cfi_staa_erase_varsize;
230*4882a593Smuzhiyun mtd->_read = cfi_staa_read;
231*4882a593Smuzhiyun mtd->_write = cfi_staa_write_buffers;
232*4882a593Smuzhiyun mtd->_writev = cfi_staa_writev;
233*4882a593Smuzhiyun mtd->_sync = cfi_staa_sync;
234*4882a593Smuzhiyun mtd->_lock = cfi_staa_lock;
235*4882a593Smuzhiyun mtd->_unlock = cfi_staa_unlock;
236*4882a593Smuzhiyun mtd->_suspend = cfi_staa_suspend;
237*4882a593Smuzhiyun mtd->_resume = cfi_staa_resume;
238*4882a593Smuzhiyun mtd->flags = MTD_CAP_NORFLASH & ~MTD_BIT_WRITEABLE;
239*4882a593Smuzhiyun mtd->writesize = 8; /* FIXME: Should be 0 for STMicro flashes w/out ECC */
240*4882a593Smuzhiyun mtd->writebufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
241*4882a593Smuzhiyun map->fldrv = &cfi_staa_chipdrv;
242*4882a593Smuzhiyun __module_get(THIS_MODULE);
243*4882a593Smuzhiyun mtd->name = map->name;
244*4882a593Smuzhiyun return mtd;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun
do_read_onechip(struct map_info * map,struct flchip * chip,loff_t adr,size_t len,u_char * buf)248*4882a593Smuzhiyun static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun map_word status, status_OK;
251*4882a593Smuzhiyun unsigned long timeo;
252*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
253*4882a593Smuzhiyun int suspended = 0;
254*4882a593Smuzhiyun unsigned long cmd_addr;
255*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun adr += chip->start;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun /* Ensure cmd read/writes are aligned. */
260*4882a593Smuzhiyun cmd_addr = adr & ~(map_bankwidth(map)-1);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /* Let's determine this according to the interleave only once */
263*4882a593Smuzhiyun status_OK = CMD(0x80);
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun timeo = jiffies + HZ;
266*4882a593Smuzhiyun retry:
267*4882a593Smuzhiyun mutex_lock(&chip->mutex);
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* Check that the chip's ready to talk to us.
270*4882a593Smuzhiyun * If it's in FL_ERASING state, suspend it and make it talk now.
271*4882a593Smuzhiyun */
272*4882a593Smuzhiyun switch (chip->state) {
273*4882a593Smuzhiyun case FL_ERASING:
274*4882a593Smuzhiyun if (!(((struct cfi_pri_intelext *)cfi->cmdset_priv)->FeatureSupport & 2))
275*4882a593Smuzhiyun goto sleep; /* We don't support erase suspend */
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun map_write (map, CMD(0xb0), cmd_addr);
278*4882a593Smuzhiyun /* If the flash has finished erasing, then 'erase suspend'
279*4882a593Smuzhiyun * appears to make some (28F320) flash devices switch to
280*4882a593Smuzhiyun * 'read' mode. Make sure that we switch to 'read status'
281*4882a593Smuzhiyun * mode so we get the right data. --rmk
282*4882a593Smuzhiyun */
283*4882a593Smuzhiyun map_write(map, CMD(0x70), cmd_addr);
284*4882a593Smuzhiyun chip->oldstate = FL_ERASING;
285*4882a593Smuzhiyun chip->state = FL_ERASE_SUSPENDING;
286*4882a593Smuzhiyun // printk("Erase suspending at 0x%lx\n", cmd_addr);
287*4882a593Smuzhiyun for (;;) {
288*4882a593Smuzhiyun status = map_read(map, cmd_addr);
289*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
290*4882a593Smuzhiyun break;
291*4882a593Smuzhiyun
292*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
293*4882a593Smuzhiyun /* Urgh */
294*4882a593Smuzhiyun map_write(map, CMD(0xd0), cmd_addr);
295*4882a593Smuzhiyun /* make sure we're in 'read status' mode */
296*4882a593Smuzhiyun map_write(map, CMD(0x70), cmd_addr);
297*4882a593Smuzhiyun chip->state = FL_ERASING;
298*4882a593Smuzhiyun wake_up(&chip->wq);
299*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
300*4882a593Smuzhiyun printk(KERN_ERR "Chip not ready after erase "
301*4882a593Smuzhiyun "suspended: status = 0x%lx\n", status.x[0]);
302*4882a593Smuzhiyun return -EIO;
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
306*4882a593Smuzhiyun cfi_udelay(1);
307*4882a593Smuzhiyun mutex_lock(&chip->mutex);
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun suspended = 1;
311*4882a593Smuzhiyun map_write(map, CMD(0xff), cmd_addr);
312*4882a593Smuzhiyun chip->state = FL_READY;
313*4882a593Smuzhiyun break;
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun #if 0
316*4882a593Smuzhiyun case FL_WRITING:
317*4882a593Smuzhiyun /* Not quite yet */
318*4882a593Smuzhiyun #endif
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun case FL_READY:
321*4882a593Smuzhiyun break;
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun case FL_CFI_QUERY:
324*4882a593Smuzhiyun case FL_JEDEC_QUERY:
325*4882a593Smuzhiyun map_write(map, CMD(0x70), cmd_addr);
326*4882a593Smuzhiyun chip->state = FL_STATUS;
327*4882a593Smuzhiyun fallthrough;
328*4882a593Smuzhiyun case FL_STATUS:
329*4882a593Smuzhiyun status = map_read(map, cmd_addr);
330*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK)) {
331*4882a593Smuzhiyun map_write(map, CMD(0xff), cmd_addr);
332*4882a593Smuzhiyun chip->state = FL_READY;
333*4882a593Smuzhiyun break;
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun /* Urgh. Chip not yet ready to talk to us. */
337*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
338*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
339*4882a593Smuzhiyun printk(KERN_ERR "waiting for chip to be ready timed out in read. WSM status = %lx\n", status.x[0]);
340*4882a593Smuzhiyun return -EIO;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
344*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
345*4882a593Smuzhiyun cfi_udelay(1);
346*4882a593Smuzhiyun goto retry;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun default:
349*4882a593Smuzhiyun sleep:
350*4882a593Smuzhiyun /* Stick ourselves on a wait queue to be woken when
351*4882a593Smuzhiyun someone changes the status */
352*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
353*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
354*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
355*4882a593Smuzhiyun schedule();
356*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
357*4882a593Smuzhiyun timeo = jiffies + HZ;
358*4882a593Smuzhiyun goto retry;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun map_copy_from(map, buf, adr, len);
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun if (suspended) {
364*4882a593Smuzhiyun chip->state = chip->oldstate;
365*4882a593Smuzhiyun /* What if one interleaved chip has finished and the
366*4882a593Smuzhiyun other hasn't? The old code would leave the finished
367*4882a593Smuzhiyun one in READY mode. That's bad, and caused -EROFS
368*4882a593Smuzhiyun errors to be returned from do_erase_oneblock because
369*4882a593Smuzhiyun that's the only bit it checked for at the time.
370*4882a593Smuzhiyun As the state machine appears to explicitly allow
371*4882a593Smuzhiyun sending the 0x70 (Read Status) command to an erasing
372*4882a593Smuzhiyun chip and expecting it to be ignored, that's what we
373*4882a593Smuzhiyun do. */
374*4882a593Smuzhiyun map_write(map, CMD(0xd0), cmd_addr);
375*4882a593Smuzhiyun map_write(map, CMD(0x70), cmd_addr);
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun wake_up(&chip->wq);
379*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
380*4882a593Smuzhiyun return 0;
381*4882a593Smuzhiyun }
382*4882a593Smuzhiyun
cfi_staa_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)383*4882a593Smuzhiyun static int cfi_staa_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun struct map_info *map = mtd->priv;
386*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
387*4882a593Smuzhiyun unsigned long ofs;
388*4882a593Smuzhiyun int chipnum;
389*4882a593Smuzhiyun int ret = 0;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /* ofs: offset within the first chip that the first read should start */
392*4882a593Smuzhiyun chipnum = (from >> cfi->chipshift);
393*4882a593Smuzhiyun ofs = from - (chipnum << cfi->chipshift);
394*4882a593Smuzhiyun
395*4882a593Smuzhiyun while (len) {
396*4882a593Smuzhiyun unsigned long thislen;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun if (chipnum >= cfi->numchips)
399*4882a593Smuzhiyun break;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun if ((len + ofs -1) >> cfi->chipshift)
402*4882a593Smuzhiyun thislen = (1<<cfi->chipshift) - ofs;
403*4882a593Smuzhiyun else
404*4882a593Smuzhiyun thislen = len;
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
407*4882a593Smuzhiyun if (ret)
408*4882a593Smuzhiyun break;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun *retlen += thislen;
411*4882a593Smuzhiyun len -= thislen;
412*4882a593Smuzhiyun buf += thislen;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun ofs = 0;
415*4882a593Smuzhiyun chipnum++;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun return ret;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
do_write_buffer(struct map_info * map,struct flchip * chip,unsigned long adr,const u_char * buf,int len)420*4882a593Smuzhiyun static int do_write_buffer(struct map_info *map, struct flchip *chip,
421*4882a593Smuzhiyun unsigned long adr, const u_char *buf, int len)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
424*4882a593Smuzhiyun map_word status, status_OK;
425*4882a593Smuzhiyun unsigned long cmd_adr, timeo;
426*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
427*4882a593Smuzhiyun int wbufsize, z;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun /* M58LW064A requires bus alignment for buffer wriets -- saw */
430*4882a593Smuzhiyun if (adr & (map_bankwidth(map)-1))
431*4882a593Smuzhiyun return -EINVAL;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
434*4882a593Smuzhiyun adr += chip->start;
435*4882a593Smuzhiyun cmd_adr = adr & ~(wbufsize-1);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* Let's determine this according to the interleave only once */
438*4882a593Smuzhiyun status_OK = CMD(0x80);
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun timeo = jiffies + HZ;
441*4882a593Smuzhiyun retry:
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
444*4882a593Smuzhiyun printk("%s: chip->state[%d]\n", __func__, chip->state);
445*4882a593Smuzhiyun #endif
446*4882a593Smuzhiyun mutex_lock(&chip->mutex);
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun /* Check that the chip's ready to talk to us.
449*4882a593Smuzhiyun * Later, we can actually think about interrupting it
450*4882a593Smuzhiyun * if it's in FL_ERASING state.
451*4882a593Smuzhiyun * Not just yet, though.
452*4882a593Smuzhiyun */
453*4882a593Smuzhiyun switch (chip->state) {
454*4882a593Smuzhiyun case FL_READY:
455*4882a593Smuzhiyun break;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun case FL_CFI_QUERY:
458*4882a593Smuzhiyun case FL_JEDEC_QUERY:
459*4882a593Smuzhiyun map_write(map, CMD(0x70), cmd_adr);
460*4882a593Smuzhiyun chip->state = FL_STATUS;
461*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
462*4882a593Smuzhiyun printk("%s: 1 status[%x]\n", __func__, map_read(map, cmd_adr));
463*4882a593Smuzhiyun #endif
464*4882a593Smuzhiyun fallthrough;
465*4882a593Smuzhiyun case FL_STATUS:
466*4882a593Smuzhiyun status = map_read(map, cmd_adr);
467*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
468*4882a593Smuzhiyun break;
469*4882a593Smuzhiyun /* Urgh. Chip not yet ready to talk to us. */
470*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
471*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
472*4882a593Smuzhiyun printk(KERN_ERR "waiting for chip to be ready timed out in buffer write Xstatus = %lx, status = %lx\n",
473*4882a593Smuzhiyun status.x[0], map_read(map, cmd_adr).x[0]);
474*4882a593Smuzhiyun return -EIO;
475*4882a593Smuzhiyun }
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
478*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
479*4882a593Smuzhiyun cfi_udelay(1);
480*4882a593Smuzhiyun goto retry;
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun default:
483*4882a593Smuzhiyun /* Stick ourselves on a wait queue to be woken when
484*4882a593Smuzhiyun someone changes the status */
485*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
486*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
487*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
488*4882a593Smuzhiyun schedule();
489*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
490*4882a593Smuzhiyun timeo = jiffies + HZ;
491*4882a593Smuzhiyun goto retry;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun ENABLE_VPP(map);
495*4882a593Smuzhiyun map_write(map, CMD(0xe8), cmd_adr);
496*4882a593Smuzhiyun chip->state = FL_WRITING_TO_BUFFER;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun z = 0;
499*4882a593Smuzhiyun for (;;) {
500*4882a593Smuzhiyun status = map_read(map, cmd_adr);
501*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
502*4882a593Smuzhiyun break;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
505*4882a593Smuzhiyun cfi_udelay(1);
506*4882a593Smuzhiyun mutex_lock(&chip->mutex);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun if (++z > 100) {
509*4882a593Smuzhiyun /* Argh. Not ready for write to buffer */
510*4882a593Smuzhiyun DISABLE_VPP(map);
511*4882a593Smuzhiyun map_write(map, CMD(0x70), cmd_adr);
512*4882a593Smuzhiyun chip->state = FL_STATUS;
513*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
514*4882a593Smuzhiyun printk(KERN_ERR "Chip not ready for buffer write. Xstatus = %lx\n", status.x[0]);
515*4882a593Smuzhiyun return -EIO;
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /* Write length of data to come */
520*4882a593Smuzhiyun map_write(map, CMD(len/map_bankwidth(map)-1), cmd_adr );
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun /* Write data */
523*4882a593Smuzhiyun for (z = 0; z < len;
524*4882a593Smuzhiyun z += map_bankwidth(map), buf += map_bankwidth(map)) {
525*4882a593Smuzhiyun map_word d;
526*4882a593Smuzhiyun d = map_word_load(map, buf);
527*4882a593Smuzhiyun map_write(map, d, adr+z);
528*4882a593Smuzhiyun }
529*4882a593Smuzhiyun /* GO GO GO */
530*4882a593Smuzhiyun map_write(map, CMD(0xd0), cmd_adr);
531*4882a593Smuzhiyun chip->state = FL_WRITING;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
534*4882a593Smuzhiyun cfi_udelay(chip->buffer_write_time);
535*4882a593Smuzhiyun mutex_lock(&chip->mutex);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun timeo = jiffies + (HZ/2);
538*4882a593Smuzhiyun z = 0;
539*4882a593Smuzhiyun for (;;) {
540*4882a593Smuzhiyun if (chip->state != FL_WRITING) {
541*4882a593Smuzhiyun /* Someone's suspended the write. Sleep */
542*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
543*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
544*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
545*4882a593Smuzhiyun schedule();
546*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
547*4882a593Smuzhiyun timeo = jiffies + (HZ / 2); /* FIXME */
548*4882a593Smuzhiyun mutex_lock(&chip->mutex);
549*4882a593Smuzhiyun continue;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun status = map_read(map, cmd_adr);
553*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
554*4882a593Smuzhiyun break;
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun /* OK Still waiting */
557*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
558*4882a593Smuzhiyun /* clear status */
559*4882a593Smuzhiyun map_write(map, CMD(0x50), cmd_adr);
560*4882a593Smuzhiyun /* put back into read status register mode */
561*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
562*4882a593Smuzhiyun chip->state = FL_STATUS;
563*4882a593Smuzhiyun DISABLE_VPP(map);
564*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
565*4882a593Smuzhiyun printk(KERN_ERR "waiting for chip to be ready timed out in bufwrite\n");
566*4882a593Smuzhiyun return -EIO;
567*4882a593Smuzhiyun }
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
570*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
571*4882a593Smuzhiyun cfi_udelay(1);
572*4882a593Smuzhiyun z++;
573*4882a593Smuzhiyun mutex_lock(&chip->mutex);
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun if (!z) {
576*4882a593Smuzhiyun chip->buffer_write_time--;
577*4882a593Smuzhiyun if (!chip->buffer_write_time)
578*4882a593Smuzhiyun chip->buffer_write_time++;
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun if (z > 1)
581*4882a593Smuzhiyun chip->buffer_write_time++;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun /* Done and happy. */
584*4882a593Smuzhiyun DISABLE_VPP(map);
585*4882a593Smuzhiyun chip->state = FL_STATUS;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun /* check for errors: 'lock bit', 'VPP', 'dead cell'/'unerased cell' or 'incorrect cmd' -- saw */
588*4882a593Smuzhiyun if (map_word_bitsset(map, status, CMD(0x3a))) {
589*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
590*4882a593Smuzhiyun printk("%s: 2 status[%lx]\n", __func__, status.x[0]);
591*4882a593Smuzhiyun #endif
592*4882a593Smuzhiyun /* clear status */
593*4882a593Smuzhiyun map_write(map, CMD(0x50), cmd_adr);
594*4882a593Smuzhiyun /* put back into read status register mode */
595*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
596*4882a593Smuzhiyun wake_up(&chip->wq);
597*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
598*4882a593Smuzhiyun return map_word_bitsset(map, status, CMD(0x02)) ? -EROFS : -EIO;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun wake_up(&chip->wq);
601*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun return 0;
604*4882a593Smuzhiyun }
605*4882a593Smuzhiyun
cfi_staa_write_buffers(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)606*4882a593Smuzhiyun static int cfi_staa_write_buffers (struct mtd_info *mtd, loff_t to,
607*4882a593Smuzhiyun size_t len, size_t *retlen, const u_char *buf)
608*4882a593Smuzhiyun {
609*4882a593Smuzhiyun struct map_info *map = mtd->priv;
610*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
611*4882a593Smuzhiyun int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
612*4882a593Smuzhiyun int ret;
613*4882a593Smuzhiyun int chipnum;
614*4882a593Smuzhiyun unsigned long ofs;
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun chipnum = to >> cfi->chipshift;
617*4882a593Smuzhiyun ofs = to - (chipnum << cfi->chipshift);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
620*4882a593Smuzhiyun printk("%s: map_bankwidth(map)[%x]\n", __func__, map_bankwidth(map));
621*4882a593Smuzhiyun printk("%s: chipnum[%x] wbufsize[%x]\n", __func__, chipnum, wbufsize);
622*4882a593Smuzhiyun printk("%s: ofs[%x] len[%x]\n", __func__, ofs, len);
623*4882a593Smuzhiyun #endif
624*4882a593Smuzhiyun
625*4882a593Smuzhiyun /* Write buffer is worth it only if more than one word to write... */
626*4882a593Smuzhiyun while (len > 0) {
627*4882a593Smuzhiyun /* We must not cross write block boundaries */
628*4882a593Smuzhiyun int size = wbufsize - (ofs & (wbufsize-1));
629*4882a593Smuzhiyun
630*4882a593Smuzhiyun if (size > len)
631*4882a593Smuzhiyun size = len;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun ret = do_write_buffer(map, &cfi->chips[chipnum],
634*4882a593Smuzhiyun ofs, buf, size);
635*4882a593Smuzhiyun if (ret)
636*4882a593Smuzhiyun return ret;
637*4882a593Smuzhiyun
638*4882a593Smuzhiyun ofs += size;
639*4882a593Smuzhiyun buf += size;
640*4882a593Smuzhiyun (*retlen) += size;
641*4882a593Smuzhiyun len -= size;
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun if (ofs >> cfi->chipshift) {
644*4882a593Smuzhiyun chipnum ++;
645*4882a593Smuzhiyun ofs = 0;
646*4882a593Smuzhiyun if (chipnum == cfi->numchips)
647*4882a593Smuzhiyun return 0;
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun
651*4882a593Smuzhiyun return 0;
652*4882a593Smuzhiyun }
653*4882a593Smuzhiyun
654*4882a593Smuzhiyun /*
655*4882a593Smuzhiyun * Writev for ECC-Flashes is a little more complicated. We need to maintain
656*4882a593Smuzhiyun * a small buffer for this.
657*4882a593Smuzhiyun * XXX: If the buffer size is not a multiple of 2, this will break
658*4882a593Smuzhiyun */
659*4882a593Smuzhiyun #define ECCBUF_SIZE (mtd->writesize)
660*4882a593Smuzhiyun #define ECCBUF_DIV(x) ((x) & ~(ECCBUF_SIZE - 1))
661*4882a593Smuzhiyun #define ECCBUF_MOD(x) ((x) & (ECCBUF_SIZE - 1))
662*4882a593Smuzhiyun static int
cfi_staa_writev(struct mtd_info * mtd,const struct kvec * vecs,unsigned long count,loff_t to,size_t * retlen)663*4882a593Smuzhiyun cfi_staa_writev(struct mtd_info *mtd, const struct kvec *vecs,
664*4882a593Smuzhiyun unsigned long count, loff_t to, size_t *retlen)
665*4882a593Smuzhiyun {
666*4882a593Smuzhiyun unsigned long i;
667*4882a593Smuzhiyun size_t totlen = 0, thislen;
668*4882a593Smuzhiyun int ret = 0;
669*4882a593Smuzhiyun size_t buflen = 0;
670*4882a593Smuzhiyun char *buffer;
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun if (!ECCBUF_SIZE) {
673*4882a593Smuzhiyun /* We should fall back to a general writev implementation.
674*4882a593Smuzhiyun * Until that is written, just break.
675*4882a593Smuzhiyun */
676*4882a593Smuzhiyun return -EIO;
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun buffer = kmalloc(ECCBUF_SIZE, GFP_KERNEL);
679*4882a593Smuzhiyun if (!buffer)
680*4882a593Smuzhiyun return -ENOMEM;
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun for (i=0; i<count; i++) {
683*4882a593Smuzhiyun size_t elem_len = vecs[i].iov_len;
684*4882a593Smuzhiyun void *elem_base = vecs[i].iov_base;
685*4882a593Smuzhiyun if (!elem_len) /* FIXME: Might be unnecessary. Check that */
686*4882a593Smuzhiyun continue;
687*4882a593Smuzhiyun if (buflen) { /* cut off head */
688*4882a593Smuzhiyun if (buflen + elem_len < ECCBUF_SIZE) { /* just accumulate */
689*4882a593Smuzhiyun memcpy(buffer+buflen, elem_base, elem_len);
690*4882a593Smuzhiyun buflen += elem_len;
691*4882a593Smuzhiyun continue;
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun memcpy(buffer+buflen, elem_base, ECCBUF_SIZE-buflen);
694*4882a593Smuzhiyun ret = mtd_write(mtd, to, ECCBUF_SIZE, &thislen,
695*4882a593Smuzhiyun buffer);
696*4882a593Smuzhiyun totlen += thislen;
697*4882a593Smuzhiyun if (ret || thislen != ECCBUF_SIZE)
698*4882a593Smuzhiyun goto write_error;
699*4882a593Smuzhiyun elem_len -= thislen-buflen;
700*4882a593Smuzhiyun elem_base += thislen-buflen;
701*4882a593Smuzhiyun to += ECCBUF_SIZE;
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun if (ECCBUF_DIV(elem_len)) { /* write clean aligned data */
704*4882a593Smuzhiyun ret = mtd_write(mtd, to, ECCBUF_DIV(elem_len),
705*4882a593Smuzhiyun &thislen, elem_base);
706*4882a593Smuzhiyun totlen += thislen;
707*4882a593Smuzhiyun if (ret || thislen != ECCBUF_DIV(elem_len))
708*4882a593Smuzhiyun goto write_error;
709*4882a593Smuzhiyun to += thislen;
710*4882a593Smuzhiyun }
711*4882a593Smuzhiyun buflen = ECCBUF_MOD(elem_len); /* cut off tail */
712*4882a593Smuzhiyun if (buflen) {
713*4882a593Smuzhiyun memset(buffer, 0xff, ECCBUF_SIZE);
714*4882a593Smuzhiyun memcpy(buffer, elem_base + thislen, buflen);
715*4882a593Smuzhiyun }
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun if (buflen) { /* flush last page, even if not full */
718*4882a593Smuzhiyun /* This is sometimes intended behaviour, really */
719*4882a593Smuzhiyun ret = mtd_write(mtd, to, buflen, &thislen, buffer);
720*4882a593Smuzhiyun totlen += thislen;
721*4882a593Smuzhiyun if (ret || thislen != ECCBUF_SIZE)
722*4882a593Smuzhiyun goto write_error;
723*4882a593Smuzhiyun }
724*4882a593Smuzhiyun write_error:
725*4882a593Smuzhiyun if (retlen)
726*4882a593Smuzhiyun *retlen = totlen;
727*4882a593Smuzhiyun kfree(buffer);
728*4882a593Smuzhiyun return ret;
729*4882a593Smuzhiyun }
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun
do_erase_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr)732*4882a593Smuzhiyun static inline int do_erase_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
733*4882a593Smuzhiyun {
734*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
735*4882a593Smuzhiyun map_word status, status_OK;
736*4882a593Smuzhiyun unsigned long timeo;
737*4882a593Smuzhiyun int retries = 3;
738*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
739*4882a593Smuzhiyun int ret = 0;
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun adr += chip->start;
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun /* Let's determine this according to the interleave only once */
744*4882a593Smuzhiyun status_OK = CMD(0x80);
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun timeo = jiffies + HZ;
747*4882a593Smuzhiyun retry:
748*4882a593Smuzhiyun mutex_lock(&chip->mutex);
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun /* Check that the chip's ready to talk to us. */
751*4882a593Smuzhiyun switch (chip->state) {
752*4882a593Smuzhiyun case FL_CFI_QUERY:
753*4882a593Smuzhiyun case FL_JEDEC_QUERY:
754*4882a593Smuzhiyun case FL_READY:
755*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
756*4882a593Smuzhiyun chip->state = FL_STATUS;
757*4882a593Smuzhiyun fallthrough;
758*4882a593Smuzhiyun case FL_STATUS:
759*4882a593Smuzhiyun status = map_read(map, adr);
760*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
761*4882a593Smuzhiyun break;
762*4882a593Smuzhiyun
763*4882a593Smuzhiyun /* Urgh. Chip not yet ready to talk to us. */
764*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
765*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
766*4882a593Smuzhiyun printk(KERN_ERR "waiting for chip to be ready timed out in erase\n");
767*4882a593Smuzhiyun return -EIO;
768*4882a593Smuzhiyun }
769*4882a593Smuzhiyun
770*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
771*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
772*4882a593Smuzhiyun cfi_udelay(1);
773*4882a593Smuzhiyun goto retry;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun default:
776*4882a593Smuzhiyun /* Stick ourselves on a wait queue to be woken when
777*4882a593Smuzhiyun someone changes the status */
778*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
779*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
780*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
781*4882a593Smuzhiyun schedule();
782*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
783*4882a593Smuzhiyun timeo = jiffies + HZ;
784*4882a593Smuzhiyun goto retry;
785*4882a593Smuzhiyun }
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun ENABLE_VPP(map);
788*4882a593Smuzhiyun /* Clear the status register first */
789*4882a593Smuzhiyun map_write(map, CMD(0x50), adr);
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun /* Now erase */
792*4882a593Smuzhiyun map_write(map, CMD(0x20), adr);
793*4882a593Smuzhiyun map_write(map, CMD(0xD0), adr);
794*4882a593Smuzhiyun chip->state = FL_ERASING;
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
797*4882a593Smuzhiyun msleep(1000);
798*4882a593Smuzhiyun mutex_lock(&chip->mutex);
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun /* FIXME. Use a timer to check this, and return immediately. */
801*4882a593Smuzhiyun /* Once the state machine's known to be working I'll do that */
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun timeo = jiffies + (HZ*20);
804*4882a593Smuzhiyun for (;;) {
805*4882a593Smuzhiyun if (chip->state != FL_ERASING) {
806*4882a593Smuzhiyun /* Someone's suspended the erase. Sleep */
807*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
808*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
809*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
810*4882a593Smuzhiyun schedule();
811*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
812*4882a593Smuzhiyun timeo = jiffies + (HZ*20); /* FIXME */
813*4882a593Smuzhiyun mutex_lock(&chip->mutex);
814*4882a593Smuzhiyun continue;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun
817*4882a593Smuzhiyun status = map_read(map, adr);
818*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
819*4882a593Smuzhiyun break;
820*4882a593Smuzhiyun
821*4882a593Smuzhiyun /* OK Still waiting */
822*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
823*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
824*4882a593Smuzhiyun chip->state = FL_STATUS;
825*4882a593Smuzhiyun printk(KERN_ERR "waiting for erase to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);
826*4882a593Smuzhiyun DISABLE_VPP(map);
827*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
828*4882a593Smuzhiyun return -EIO;
829*4882a593Smuzhiyun }
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
832*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
833*4882a593Smuzhiyun cfi_udelay(1);
834*4882a593Smuzhiyun mutex_lock(&chip->mutex);
835*4882a593Smuzhiyun }
836*4882a593Smuzhiyun
837*4882a593Smuzhiyun DISABLE_VPP(map);
838*4882a593Smuzhiyun ret = 0;
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun /* We've broken this before. It doesn't hurt to be safe */
841*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
842*4882a593Smuzhiyun chip->state = FL_STATUS;
843*4882a593Smuzhiyun status = map_read(map, adr);
844*4882a593Smuzhiyun
845*4882a593Smuzhiyun /* check for lock bit */
846*4882a593Smuzhiyun if (map_word_bitsset(map, status, CMD(0x3a))) {
847*4882a593Smuzhiyun unsigned char chipstatus = status.x[0];
848*4882a593Smuzhiyun if (!map_word_equal(map, status, CMD(chipstatus))) {
849*4882a593Smuzhiyun int i, w;
850*4882a593Smuzhiyun for (w=0; w<map_words(map); w++) {
851*4882a593Smuzhiyun for (i = 0; i<cfi_interleave(cfi); i++) {
852*4882a593Smuzhiyun chipstatus |= status.x[w] >> (cfi->device_type * 8);
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun printk(KERN_WARNING "Status is not identical for all chips: 0x%lx. Merging to give 0x%02x\n",
856*4882a593Smuzhiyun status.x[0], chipstatus);
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun /* Reset the error bits */
859*4882a593Smuzhiyun map_write(map, CMD(0x50), adr);
860*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun if ((chipstatus & 0x30) == 0x30) {
863*4882a593Smuzhiyun printk(KERN_NOTICE "Chip reports improper command sequence: status 0x%x\n", chipstatus);
864*4882a593Smuzhiyun ret = -EIO;
865*4882a593Smuzhiyun } else if (chipstatus & 0x02) {
866*4882a593Smuzhiyun /* Protection bit set */
867*4882a593Smuzhiyun ret = -EROFS;
868*4882a593Smuzhiyun } else if (chipstatus & 0x8) {
869*4882a593Smuzhiyun /* Voltage */
870*4882a593Smuzhiyun printk(KERN_WARNING "Chip reports voltage low on erase: status 0x%x\n", chipstatus);
871*4882a593Smuzhiyun ret = -EIO;
872*4882a593Smuzhiyun } else if (chipstatus & 0x20) {
873*4882a593Smuzhiyun if (retries--) {
874*4882a593Smuzhiyun printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x. Retrying...\n", adr, chipstatus);
875*4882a593Smuzhiyun timeo = jiffies + HZ;
876*4882a593Smuzhiyun chip->state = FL_STATUS;
877*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
878*4882a593Smuzhiyun goto retry;
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun printk(KERN_DEBUG "Chip erase failed at 0x%08lx: status 0x%x\n", adr, chipstatus);
881*4882a593Smuzhiyun ret = -EIO;
882*4882a593Smuzhiyun }
883*4882a593Smuzhiyun }
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun wake_up(&chip->wq);
886*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
887*4882a593Smuzhiyun return ret;
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun
cfi_staa_erase_varsize(struct mtd_info * mtd,struct erase_info * instr)890*4882a593Smuzhiyun static int cfi_staa_erase_varsize(struct mtd_info *mtd,
891*4882a593Smuzhiyun struct erase_info *instr)
892*4882a593Smuzhiyun { struct map_info *map = mtd->priv;
893*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
894*4882a593Smuzhiyun unsigned long adr, len;
895*4882a593Smuzhiyun int chipnum, ret;
896*4882a593Smuzhiyun int i, first;
897*4882a593Smuzhiyun struct mtd_erase_region_info *regions = mtd->eraseregions;
898*4882a593Smuzhiyun
899*4882a593Smuzhiyun /* Check that both start and end of the requested erase are
900*4882a593Smuzhiyun * aligned with the erasesize at the appropriate addresses.
901*4882a593Smuzhiyun */
902*4882a593Smuzhiyun
903*4882a593Smuzhiyun i = 0;
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun /* Skip all erase regions which are ended before the start of
906*4882a593Smuzhiyun the requested erase. Actually, to save on the calculations,
907*4882a593Smuzhiyun we skip to the first erase region which starts after the
908*4882a593Smuzhiyun start of the requested erase, and then go back one.
909*4882a593Smuzhiyun */
910*4882a593Smuzhiyun
911*4882a593Smuzhiyun while (i < mtd->numeraseregions && instr->addr >= regions[i].offset)
912*4882a593Smuzhiyun i++;
913*4882a593Smuzhiyun i--;
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun /* OK, now i is pointing at the erase region in which this
916*4882a593Smuzhiyun erase request starts. Check the start of the requested
917*4882a593Smuzhiyun erase range is aligned with the erase size which is in
918*4882a593Smuzhiyun effect here.
919*4882a593Smuzhiyun */
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun if (instr->addr & (regions[i].erasesize-1))
922*4882a593Smuzhiyun return -EINVAL;
923*4882a593Smuzhiyun
924*4882a593Smuzhiyun /* Remember the erase region we start on */
925*4882a593Smuzhiyun first = i;
926*4882a593Smuzhiyun
927*4882a593Smuzhiyun /* Next, check that the end of the requested erase is aligned
928*4882a593Smuzhiyun * with the erase region at that address.
929*4882a593Smuzhiyun */
930*4882a593Smuzhiyun
931*4882a593Smuzhiyun while (i<mtd->numeraseregions && (instr->addr + instr->len) >= regions[i].offset)
932*4882a593Smuzhiyun i++;
933*4882a593Smuzhiyun
934*4882a593Smuzhiyun /* As before, drop back one to point at the region in which
935*4882a593Smuzhiyun the address actually falls
936*4882a593Smuzhiyun */
937*4882a593Smuzhiyun i--;
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun if ((instr->addr + instr->len) & (regions[i].erasesize-1))
940*4882a593Smuzhiyun return -EINVAL;
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun chipnum = instr->addr >> cfi->chipshift;
943*4882a593Smuzhiyun adr = instr->addr - (chipnum << cfi->chipshift);
944*4882a593Smuzhiyun len = instr->len;
945*4882a593Smuzhiyun
946*4882a593Smuzhiyun i=first;
947*4882a593Smuzhiyun
948*4882a593Smuzhiyun while(len) {
949*4882a593Smuzhiyun ret = do_erase_oneblock(map, &cfi->chips[chipnum], adr);
950*4882a593Smuzhiyun
951*4882a593Smuzhiyun if (ret)
952*4882a593Smuzhiyun return ret;
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun adr += regions[i].erasesize;
955*4882a593Smuzhiyun len -= regions[i].erasesize;
956*4882a593Smuzhiyun
957*4882a593Smuzhiyun if (adr % (1<< cfi->chipshift) == (((unsigned long)regions[i].offset + (regions[i].erasesize * regions[i].numblocks)) %( 1<< cfi->chipshift)))
958*4882a593Smuzhiyun i++;
959*4882a593Smuzhiyun
960*4882a593Smuzhiyun if (adr >> cfi->chipshift) {
961*4882a593Smuzhiyun adr = 0;
962*4882a593Smuzhiyun chipnum++;
963*4882a593Smuzhiyun
964*4882a593Smuzhiyun if (chipnum >= cfi->numchips)
965*4882a593Smuzhiyun break;
966*4882a593Smuzhiyun }
967*4882a593Smuzhiyun }
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun return 0;
970*4882a593Smuzhiyun }
971*4882a593Smuzhiyun
cfi_staa_sync(struct mtd_info * mtd)972*4882a593Smuzhiyun static void cfi_staa_sync (struct mtd_info *mtd)
973*4882a593Smuzhiyun {
974*4882a593Smuzhiyun struct map_info *map = mtd->priv;
975*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
976*4882a593Smuzhiyun int i;
977*4882a593Smuzhiyun struct flchip *chip;
978*4882a593Smuzhiyun int ret = 0;
979*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
980*4882a593Smuzhiyun
981*4882a593Smuzhiyun for (i=0; !ret && i<cfi->numchips; i++) {
982*4882a593Smuzhiyun chip = &cfi->chips[i];
983*4882a593Smuzhiyun
984*4882a593Smuzhiyun retry:
985*4882a593Smuzhiyun mutex_lock(&chip->mutex);
986*4882a593Smuzhiyun
987*4882a593Smuzhiyun switch(chip->state) {
988*4882a593Smuzhiyun case FL_READY:
989*4882a593Smuzhiyun case FL_STATUS:
990*4882a593Smuzhiyun case FL_CFI_QUERY:
991*4882a593Smuzhiyun case FL_JEDEC_QUERY:
992*4882a593Smuzhiyun chip->oldstate = chip->state;
993*4882a593Smuzhiyun chip->state = FL_SYNCING;
994*4882a593Smuzhiyun /* No need to wake_up() on this state change -
995*4882a593Smuzhiyun * as the whole point is that nobody can do anything
996*4882a593Smuzhiyun * with the chip now anyway.
997*4882a593Smuzhiyun */
998*4882a593Smuzhiyun fallthrough;
999*4882a593Smuzhiyun case FL_SYNCING:
1000*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1001*4882a593Smuzhiyun break;
1002*4882a593Smuzhiyun
1003*4882a593Smuzhiyun default:
1004*4882a593Smuzhiyun /* Not an idle state */
1005*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
1006*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1009*4882a593Smuzhiyun schedule();
1010*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
1011*4882a593Smuzhiyun
1012*4882a593Smuzhiyun goto retry;
1013*4882a593Smuzhiyun }
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun /* Unlock the chips again */
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun for (i--; i >=0; i--) {
1019*4882a593Smuzhiyun chip = &cfi->chips[i];
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1022*4882a593Smuzhiyun
1023*4882a593Smuzhiyun if (chip->state == FL_SYNCING) {
1024*4882a593Smuzhiyun chip->state = chip->oldstate;
1025*4882a593Smuzhiyun wake_up(&chip->wq);
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
do_lock_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr)1031*4882a593Smuzhiyun static inline int do_lock_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1034*4882a593Smuzhiyun map_word status, status_OK;
1035*4882a593Smuzhiyun unsigned long timeo = jiffies + HZ;
1036*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
1037*4882a593Smuzhiyun
1038*4882a593Smuzhiyun adr += chip->start;
1039*4882a593Smuzhiyun
1040*4882a593Smuzhiyun /* Let's determine this according to the interleave only once */
1041*4882a593Smuzhiyun status_OK = CMD(0x80);
1042*4882a593Smuzhiyun
1043*4882a593Smuzhiyun timeo = jiffies + HZ;
1044*4882a593Smuzhiyun retry:
1045*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1046*4882a593Smuzhiyun
1047*4882a593Smuzhiyun /* Check that the chip's ready to talk to us. */
1048*4882a593Smuzhiyun switch (chip->state) {
1049*4882a593Smuzhiyun case FL_CFI_QUERY:
1050*4882a593Smuzhiyun case FL_JEDEC_QUERY:
1051*4882a593Smuzhiyun case FL_READY:
1052*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
1053*4882a593Smuzhiyun chip->state = FL_STATUS;
1054*4882a593Smuzhiyun fallthrough;
1055*4882a593Smuzhiyun case FL_STATUS:
1056*4882a593Smuzhiyun status = map_read(map, adr);
1057*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
1058*4882a593Smuzhiyun break;
1059*4882a593Smuzhiyun
1060*4882a593Smuzhiyun /* Urgh. Chip not yet ready to talk to us. */
1061*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
1062*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1063*4882a593Smuzhiyun printk(KERN_ERR "waiting for chip to be ready timed out in lock\n");
1064*4882a593Smuzhiyun return -EIO;
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
1068*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1069*4882a593Smuzhiyun cfi_udelay(1);
1070*4882a593Smuzhiyun goto retry;
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun default:
1073*4882a593Smuzhiyun /* Stick ourselves on a wait queue to be woken when
1074*4882a593Smuzhiyun someone changes the status */
1075*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
1076*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
1077*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1078*4882a593Smuzhiyun schedule();
1079*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
1080*4882a593Smuzhiyun timeo = jiffies + HZ;
1081*4882a593Smuzhiyun goto retry;
1082*4882a593Smuzhiyun }
1083*4882a593Smuzhiyun
1084*4882a593Smuzhiyun ENABLE_VPP(map);
1085*4882a593Smuzhiyun map_write(map, CMD(0x60), adr);
1086*4882a593Smuzhiyun map_write(map, CMD(0x01), adr);
1087*4882a593Smuzhiyun chip->state = FL_LOCKING;
1088*4882a593Smuzhiyun
1089*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1090*4882a593Smuzhiyun msleep(1000);
1091*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1092*4882a593Smuzhiyun
1093*4882a593Smuzhiyun /* FIXME. Use a timer to check this, and return immediately. */
1094*4882a593Smuzhiyun /* Once the state machine's known to be working I'll do that */
1095*4882a593Smuzhiyun
1096*4882a593Smuzhiyun timeo = jiffies + (HZ*2);
1097*4882a593Smuzhiyun for (;;) {
1098*4882a593Smuzhiyun
1099*4882a593Smuzhiyun status = map_read(map, adr);
1100*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
1101*4882a593Smuzhiyun break;
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun /* OK Still waiting */
1104*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
1105*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
1106*4882a593Smuzhiyun chip->state = FL_STATUS;
1107*4882a593Smuzhiyun printk(KERN_ERR "waiting for lock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);
1108*4882a593Smuzhiyun DISABLE_VPP(map);
1109*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1110*4882a593Smuzhiyun return -EIO;
1111*4882a593Smuzhiyun }
1112*4882a593Smuzhiyun
1113*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
1114*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1115*4882a593Smuzhiyun cfi_udelay(1);
1116*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun
1119*4882a593Smuzhiyun /* Done and happy. */
1120*4882a593Smuzhiyun chip->state = FL_STATUS;
1121*4882a593Smuzhiyun DISABLE_VPP(map);
1122*4882a593Smuzhiyun wake_up(&chip->wq);
1123*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1124*4882a593Smuzhiyun return 0;
1125*4882a593Smuzhiyun }
cfi_staa_lock(struct mtd_info * mtd,loff_t ofs,uint64_t len)1126*4882a593Smuzhiyun static int cfi_staa_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1127*4882a593Smuzhiyun {
1128*4882a593Smuzhiyun struct map_info *map = mtd->priv;
1129*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1130*4882a593Smuzhiyun unsigned long adr;
1131*4882a593Smuzhiyun int chipnum, ret;
1132*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
1133*4882a593Smuzhiyun int ofs_factor = cfi->interleave * cfi->device_type;
1134*4882a593Smuzhiyun #endif
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun if (ofs & (mtd->erasesize - 1))
1137*4882a593Smuzhiyun return -EINVAL;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun if (len & (mtd->erasesize -1))
1140*4882a593Smuzhiyun return -EINVAL;
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun chipnum = ofs >> cfi->chipshift;
1143*4882a593Smuzhiyun adr = ofs - (chipnum << cfi->chipshift);
1144*4882a593Smuzhiyun
1145*4882a593Smuzhiyun while(len) {
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
1148*4882a593Smuzhiyun cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1149*4882a593Smuzhiyun printk("before lock: block status register is %x\n",cfi_read_query(map, adr+(2*ofs_factor)));
1150*4882a593Smuzhiyun cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1151*4882a593Smuzhiyun #endif
1152*4882a593Smuzhiyun
1153*4882a593Smuzhiyun ret = do_lock_oneblock(map, &cfi->chips[chipnum], adr);
1154*4882a593Smuzhiyun
1155*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
1156*4882a593Smuzhiyun cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1157*4882a593Smuzhiyun printk("after lock: block status register is %x\n",cfi_read_query(map, adr+(2*ofs_factor)));
1158*4882a593Smuzhiyun cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1159*4882a593Smuzhiyun #endif
1160*4882a593Smuzhiyun
1161*4882a593Smuzhiyun if (ret)
1162*4882a593Smuzhiyun return ret;
1163*4882a593Smuzhiyun
1164*4882a593Smuzhiyun adr += mtd->erasesize;
1165*4882a593Smuzhiyun len -= mtd->erasesize;
1166*4882a593Smuzhiyun
1167*4882a593Smuzhiyun if (adr >> cfi->chipshift) {
1168*4882a593Smuzhiyun adr = 0;
1169*4882a593Smuzhiyun chipnum++;
1170*4882a593Smuzhiyun
1171*4882a593Smuzhiyun if (chipnum >= cfi->numchips)
1172*4882a593Smuzhiyun break;
1173*4882a593Smuzhiyun }
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun return 0;
1176*4882a593Smuzhiyun }
do_unlock_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr)1177*4882a593Smuzhiyun static inline int do_unlock_oneblock(struct map_info *map, struct flchip *chip, unsigned long adr)
1178*4882a593Smuzhiyun {
1179*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1180*4882a593Smuzhiyun map_word status, status_OK;
1181*4882a593Smuzhiyun unsigned long timeo = jiffies + HZ;
1182*4882a593Smuzhiyun DECLARE_WAITQUEUE(wait, current);
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun adr += chip->start;
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun /* Let's determine this according to the interleave only once */
1187*4882a593Smuzhiyun status_OK = CMD(0x80);
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun timeo = jiffies + HZ;
1190*4882a593Smuzhiyun retry:
1191*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun /* Check that the chip's ready to talk to us. */
1194*4882a593Smuzhiyun switch (chip->state) {
1195*4882a593Smuzhiyun case FL_CFI_QUERY:
1196*4882a593Smuzhiyun case FL_JEDEC_QUERY:
1197*4882a593Smuzhiyun case FL_READY:
1198*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
1199*4882a593Smuzhiyun chip->state = FL_STATUS;
1200*4882a593Smuzhiyun fallthrough;
1201*4882a593Smuzhiyun case FL_STATUS:
1202*4882a593Smuzhiyun status = map_read(map, adr);
1203*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
1204*4882a593Smuzhiyun break;
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun /* Urgh. Chip not yet ready to talk to us. */
1207*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
1208*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1209*4882a593Smuzhiyun printk(KERN_ERR "waiting for chip to be ready timed out in unlock\n");
1210*4882a593Smuzhiyun return -EIO;
1211*4882a593Smuzhiyun }
1212*4882a593Smuzhiyun
1213*4882a593Smuzhiyun /* Latency issues. Drop the lock, wait a while and retry */
1214*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1215*4882a593Smuzhiyun cfi_udelay(1);
1216*4882a593Smuzhiyun goto retry;
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun default:
1219*4882a593Smuzhiyun /* Stick ourselves on a wait queue to be woken when
1220*4882a593Smuzhiyun someone changes the status */
1221*4882a593Smuzhiyun set_current_state(TASK_UNINTERRUPTIBLE);
1222*4882a593Smuzhiyun add_wait_queue(&chip->wq, &wait);
1223*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1224*4882a593Smuzhiyun schedule();
1225*4882a593Smuzhiyun remove_wait_queue(&chip->wq, &wait);
1226*4882a593Smuzhiyun timeo = jiffies + HZ;
1227*4882a593Smuzhiyun goto retry;
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun ENABLE_VPP(map);
1231*4882a593Smuzhiyun map_write(map, CMD(0x60), adr);
1232*4882a593Smuzhiyun map_write(map, CMD(0xD0), adr);
1233*4882a593Smuzhiyun chip->state = FL_UNLOCKING;
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1236*4882a593Smuzhiyun msleep(1000);
1237*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1238*4882a593Smuzhiyun
1239*4882a593Smuzhiyun /* FIXME. Use a timer to check this, and return immediately. */
1240*4882a593Smuzhiyun /* Once the state machine's known to be working I'll do that */
1241*4882a593Smuzhiyun
1242*4882a593Smuzhiyun timeo = jiffies + (HZ*2);
1243*4882a593Smuzhiyun for (;;) {
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun status = map_read(map, adr);
1246*4882a593Smuzhiyun if (map_word_andequal(map, status, status_OK, status_OK))
1247*4882a593Smuzhiyun break;
1248*4882a593Smuzhiyun
1249*4882a593Smuzhiyun /* OK Still waiting */
1250*4882a593Smuzhiyun if (time_after(jiffies, timeo)) {
1251*4882a593Smuzhiyun map_write(map, CMD(0x70), adr);
1252*4882a593Smuzhiyun chip->state = FL_STATUS;
1253*4882a593Smuzhiyun printk(KERN_ERR "waiting for unlock to complete timed out. Xstatus = %lx, status = %lx.\n", status.x[0], map_read(map, adr).x[0]);
1254*4882a593Smuzhiyun DISABLE_VPP(map);
1255*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1256*4882a593Smuzhiyun return -EIO;
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun /* Latency issues. Drop the unlock, wait a while and retry */
1260*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1261*4882a593Smuzhiyun cfi_udelay(1);
1262*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1263*4882a593Smuzhiyun }
1264*4882a593Smuzhiyun
1265*4882a593Smuzhiyun /* Done and happy. */
1266*4882a593Smuzhiyun chip->state = FL_STATUS;
1267*4882a593Smuzhiyun DISABLE_VPP(map);
1268*4882a593Smuzhiyun wake_up(&chip->wq);
1269*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1270*4882a593Smuzhiyun return 0;
1271*4882a593Smuzhiyun }
cfi_staa_unlock(struct mtd_info * mtd,loff_t ofs,uint64_t len)1272*4882a593Smuzhiyun static int cfi_staa_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
1273*4882a593Smuzhiyun {
1274*4882a593Smuzhiyun struct map_info *map = mtd->priv;
1275*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1276*4882a593Smuzhiyun unsigned long adr;
1277*4882a593Smuzhiyun int chipnum, ret;
1278*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
1279*4882a593Smuzhiyun int ofs_factor = cfi->interleave * cfi->device_type;
1280*4882a593Smuzhiyun #endif
1281*4882a593Smuzhiyun
1282*4882a593Smuzhiyun chipnum = ofs >> cfi->chipshift;
1283*4882a593Smuzhiyun adr = ofs - (chipnum << cfi->chipshift);
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
1286*4882a593Smuzhiyun {
1287*4882a593Smuzhiyun unsigned long temp_adr = adr;
1288*4882a593Smuzhiyun unsigned long temp_len = len;
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1291*4882a593Smuzhiyun while (temp_len) {
1292*4882a593Smuzhiyun printk("before unlock %x: block status register is %x\n",temp_adr,cfi_read_query(map, temp_adr+(2*ofs_factor)));
1293*4882a593Smuzhiyun temp_adr += mtd->erasesize;
1294*4882a593Smuzhiyun temp_len -= mtd->erasesize;
1295*4882a593Smuzhiyun }
1296*4882a593Smuzhiyun cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1297*4882a593Smuzhiyun }
1298*4882a593Smuzhiyun #endif
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun ret = do_unlock_oneblock(map, &cfi->chips[chipnum], adr);
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
1303*4882a593Smuzhiyun cfi_send_gen_cmd(0x90, 0x55, 0, map, cfi, cfi->device_type, NULL);
1304*4882a593Smuzhiyun printk("after unlock: block status register is %x\n",cfi_read_query(map, adr+(2*ofs_factor)));
1305*4882a593Smuzhiyun cfi_send_gen_cmd(0xff, 0x55, 0, map, cfi, cfi->device_type, NULL);
1306*4882a593Smuzhiyun #endif
1307*4882a593Smuzhiyun
1308*4882a593Smuzhiyun return ret;
1309*4882a593Smuzhiyun }
1310*4882a593Smuzhiyun
cfi_staa_suspend(struct mtd_info * mtd)1311*4882a593Smuzhiyun static int cfi_staa_suspend(struct mtd_info *mtd)
1312*4882a593Smuzhiyun {
1313*4882a593Smuzhiyun struct map_info *map = mtd->priv;
1314*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1315*4882a593Smuzhiyun int i;
1316*4882a593Smuzhiyun struct flchip *chip;
1317*4882a593Smuzhiyun int ret = 0;
1318*4882a593Smuzhiyun
1319*4882a593Smuzhiyun for (i=0; !ret && i<cfi->numchips; i++) {
1320*4882a593Smuzhiyun chip = &cfi->chips[i];
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1323*4882a593Smuzhiyun
1324*4882a593Smuzhiyun switch(chip->state) {
1325*4882a593Smuzhiyun case FL_READY:
1326*4882a593Smuzhiyun case FL_STATUS:
1327*4882a593Smuzhiyun case FL_CFI_QUERY:
1328*4882a593Smuzhiyun case FL_JEDEC_QUERY:
1329*4882a593Smuzhiyun chip->oldstate = chip->state;
1330*4882a593Smuzhiyun chip->state = FL_PM_SUSPENDED;
1331*4882a593Smuzhiyun /* No need to wake_up() on this state change -
1332*4882a593Smuzhiyun * as the whole point is that nobody can do anything
1333*4882a593Smuzhiyun * with the chip now anyway.
1334*4882a593Smuzhiyun */
1335*4882a593Smuzhiyun case FL_PM_SUSPENDED:
1336*4882a593Smuzhiyun break;
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun default:
1339*4882a593Smuzhiyun ret = -EAGAIN;
1340*4882a593Smuzhiyun break;
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1343*4882a593Smuzhiyun }
1344*4882a593Smuzhiyun
1345*4882a593Smuzhiyun /* Unlock the chips again */
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun if (ret) {
1348*4882a593Smuzhiyun for (i--; i >=0; i--) {
1349*4882a593Smuzhiyun chip = &cfi->chips[i];
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun if (chip->state == FL_PM_SUSPENDED) {
1354*4882a593Smuzhiyun /* No need to force it into a known state here,
1355*4882a593Smuzhiyun because we're returning failure, and it didn't
1356*4882a593Smuzhiyun get power cycled */
1357*4882a593Smuzhiyun chip->state = chip->oldstate;
1358*4882a593Smuzhiyun wake_up(&chip->wq);
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1361*4882a593Smuzhiyun }
1362*4882a593Smuzhiyun }
1363*4882a593Smuzhiyun
1364*4882a593Smuzhiyun return ret;
1365*4882a593Smuzhiyun }
1366*4882a593Smuzhiyun
cfi_staa_resume(struct mtd_info * mtd)1367*4882a593Smuzhiyun static void cfi_staa_resume(struct mtd_info *mtd)
1368*4882a593Smuzhiyun {
1369*4882a593Smuzhiyun struct map_info *map = mtd->priv;
1370*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1371*4882a593Smuzhiyun int i;
1372*4882a593Smuzhiyun struct flchip *chip;
1373*4882a593Smuzhiyun
1374*4882a593Smuzhiyun for (i=0; i<cfi->numchips; i++) {
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun chip = &cfi->chips[i];
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun mutex_lock(&chip->mutex);
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun /* Go to known state. Chip may have been power cycled */
1381*4882a593Smuzhiyun if (chip->state == FL_PM_SUSPENDED) {
1382*4882a593Smuzhiyun map_write(map, CMD(0xFF), 0);
1383*4882a593Smuzhiyun chip->state = FL_READY;
1384*4882a593Smuzhiyun wake_up(&chip->wq);
1385*4882a593Smuzhiyun }
1386*4882a593Smuzhiyun
1387*4882a593Smuzhiyun mutex_unlock(&chip->mutex);
1388*4882a593Smuzhiyun }
1389*4882a593Smuzhiyun }
1390*4882a593Smuzhiyun
cfi_staa_destroy(struct mtd_info * mtd)1391*4882a593Smuzhiyun static void cfi_staa_destroy(struct mtd_info *mtd)
1392*4882a593Smuzhiyun {
1393*4882a593Smuzhiyun struct map_info *map = mtd->priv;
1394*4882a593Smuzhiyun struct cfi_private *cfi = map->fldrv_priv;
1395*4882a593Smuzhiyun kfree(cfi->cmdset_priv);
1396*4882a593Smuzhiyun kfree(cfi);
1397*4882a593Smuzhiyun }
1398*4882a593Smuzhiyun
1399*4882a593Smuzhiyun MODULE_LICENSE("GPL");
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