xref: /OK3568_Linux_fs/kernel/drivers/mtd/chips/cfi_cmdset_0001.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Common Flash Interface support:
3*4882a593Smuzhiyun  *   Intel Extended Vendor Command Set (ID 0x0001)
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * (C) 2000 Red Hat. GPL'd
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * 10/10/2000	Nicolas Pitre <nico@fluxnic.net>
9*4882a593Smuzhiyun  * 	- completely revamped method functions so they are aware and
10*4882a593Smuzhiyun  * 	  independent of the flash geometry (buswidth, interleave, etc.)
11*4882a593Smuzhiyun  * 	- scalability vs code size is completely set at compile-time
12*4882a593Smuzhiyun  * 	  (see include/linux/mtd/cfi.h for selection)
13*4882a593Smuzhiyun  *	- optimized write buffer method
14*4882a593Smuzhiyun  * 02/05/2002	Christopher Hoover <ch@hpl.hp.com>/<ch@murgatroid.com>
15*4882a593Smuzhiyun  *	- reworked lock/unlock/erase support for var size flash
16*4882a593Smuzhiyun  * 21/03/2007   Rodolfo Giometti <giometti@linux.it>
17*4882a593Smuzhiyun  * 	- auto unlock sectors on resume for auto locking flash on power up
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/types.h>
22*4882a593Smuzhiyun #include <linux/kernel.h>
23*4882a593Smuzhiyun #include <linux/sched.h>
24*4882a593Smuzhiyun #include <asm/io.h>
25*4882a593Smuzhiyun #include <asm/byteorder.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/errno.h>
28*4882a593Smuzhiyun #include <linux/slab.h>
29*4882a593Smuzhiyun #include <linux/delay.h>
30*4882a593Smuzhiyun #include <linux/interrupt.h>
31*4882a593Smuzhiyun #include <linux/reboot.h>
32*4882a593Smuzhiyun #include <linux/bitmap.h>
33*4882a593Smuzhiyun #include <linux/mtd/xip.h>
34*4882a593Smuzhiyun #include <linux/mtd/map.h>
35*4882a593Smuzhiyun #include <linux/mtd/mtd.h>
36*4882a593Smuzhiyun #include <linux/mtd/cfi.h>
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */
39*4882a593Smuzhiyun /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun // debugging, turns off buffer write mode if set to 1
42*4882a593Smuzhiyun #define FORCE_WORD_WRITE 0
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* Intel chips */
45*4882a593Smuzhiyun #define I82802AB	0x00ad
46*4882a593Smuzhiyun #define I82802AC	0x00ac
47*4882a593Smuzhiyun #define PF38F4476	0x881c
48*4882a593Smuzhiyun #define M28F00AP30	0x8963
49*4882a593Smuzhiyun /* STMicroelectronics chips */
50*4882a593Smuzhiyun #define M50LPW080       0x002F
51*4882a593Smuzhiyun #define M50FLW080A	0x0080
52*4882a593Smuzhiyun #define M50FLW080B	0x0081
53*4882a593Smuzhiyun /* Atmel chips */
54*4882a593Smuzhiyun #define AT49BV640D	0x02de
55*4882a593Smuzhiyun #define AT49BV640DT	0x02db
56*4882a593Smuzhiyun /* Sharp chips */
57*4882a593Smuzhiyun #define LH28F640BFHE_PTTL90	0x00b0
58*4882a593Smuzhiyun #define LH28F640BFHE_PBTL90	0x00b1
59*4882a593Smuzhiyun #define LH28F640BFHE_PTTL70A	0x00b2
60*4882a593Smuzhiyun #define LH28F640BFHE_PBTL70A	0x00b3
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
63*4882a593Smuzhiyun static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
64*4882a593Smuzhiyun static int cfi_intelext_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
65*4882a593Smuzhiyun static int cfi_intelext_writev(struct mtd_info *, const struct kvec *, unsigned long, loff_t, size_t *);
66*4882a593Smuzhiyun static int cfi_intelext_erase_varsize(struct mtd_info *, struct erase_info *);
67*4882a593Smuzhiyun static void cfi_intelext_sync (struct mtd_info *);
68*4882a593Smuzhiyun static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
69*4882a593Smuzhiyun static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
70*4882a593Smuzhiyun static int cfi_intelext_is_locked(struct mtd_info *mtd, loff_t ofs,
71*4882a593Smuzhiyun 				  uint64_t len);
72*4882a593Smuzhiyun #ifdef CONFIG_MTD_OTP
73*4882a593Smuzhiyun static int cfi_intelext_read_fact_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
74*4882a593Smuzhiyun static int cfi_intelext_read_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
75*4882a593Smuzhiyun static int cfi_intelext_write_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
76*4882a593Smuzhiyun static int cfi_intelext_lock_user_prot_reg (struct mtd_info *, loff_t, size_t);
77*4882a593Smuzhiyun static int cfi_intelext_get_fact_prot_info(struct mtd_info *, size_t,
78*4882a593Smuzhiyun 					   size_t *, struct otp_info *);
79*4882a593Smuzhiyun static int cfi_intelext_get_user_prot_info(struct mtd_info *, size_t,
80*4882a593Smuzhiyun 					   size_t *, struct otp_info *);
81*4882a593Smuzhiyun #endif
82*4882a593Smuzhiyun static int cfi_intelext_suspend (struct mtd_info *);
83*4882a593Smuzhiyun static void cfi_intelext_resume (struct mtd_info *);
84*4882a593Smuzhiyun static int cfi_intelext_reboot (struct notifier_block *, unsigned long, void *);
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun static void cfi_intelext_destroy(struct mtd_info *);
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun struct mtd_info *cfi_cmdset_0001(struct map_info *, int);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun static struct mtd_info *cfi_intelext_setup (struct mtd_info *);
91*4882a593Smuzhiyun static int cfi_intelext_partition_fixup(struct mtd_info *, struct cfi_private **);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun static int cfi_intelext_point (struct mtd_info *mtd, loff_t from, size_t len,
94*4882a593Smuzhiyun 		     size_t *retlen, void **virt, resource_size_t *phys);
95*4882a593Smuzhiyun static int cfi_intelext_unpoint(struct mtd_info *mtd, loff_t from, size_t len);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
98*4882a593Smuzhiyun static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode);
99*4882a593Smuzhiyun static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr);
100*4882a593Smuzhiyun #include "fwh_lock.h"
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /*
105*4882a593Smuzhiyun  *  *********** SETUP AND PROBE BITS  ***********
106*4882a593Smuzhiyun  */
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun static struct mtd_chip_driver cfi_intelext_chipdrv = {
109*4882a593Smuzhiyun 	.probe		= NULL, /* Not usable directly */
110*4882a593Smuzhiyun 	.destroy	= cfi_intelext_destroy,
111*4882a593Smuzhiyun 	.name		= "cfi_cmdset_0001",
112*4882a593Smuzhiyun 	.module		= THIS_MODULE
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun /* #define DEBUG_LOCK_BITS */
116*4882a593Smuzhiyun /* #define DEBUG_CFI_FEATURES */
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
cfi_tell_features(struct cfi_pri_intelext * extp)119*4882a593Smuzhiyun static void cfi_tell_features(struct cfi_pri_intelext *extp)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun 	int i;
122*4882a593Smuzhiyun 	printk("  Extended Query version %c.%c\n", extp->MajorVersion, extp->MinorVersion);
123*4882a593Smuzhiyun 	printk("  Feature/Command Support:      %4.4X\n", extp->FeatureSupport);
124*4882a593Smuzhiyun 	printk("     - Chip Erase:              %s\n", extp->FeatureSupport&1?"supported":"unsupported");
125*4882a593Smuzhiyun 	printk("     - Suspend Erase:           %s\n", extp->FeatureSupport&2?"supported":"unsupported");
126*4882a593Smuzhiyun 	printk("     - Suspend Program:         %s\n", extp->FeatureSupport&4?"supported":"unsupported");
127*4882a593Smuzhiyun 	printk("     - Legacy Lock/Unlock:      %s\n", extp->FeatureSupport&8?"supported":"unsupported");
128*4882a593Smuzhiyun 	printk("     - Queued Erase:            %s\n", extp->FeatureSupport&16?"supported":"unsupported");
129*4882a593Smuzhiyun 	printk("     - Instant block lock:      %s\n", extp->FeatureSupport&32?"supported":"unsupported");
130*4882a593Smuzhiyun 	printk("     - Protection Bits:         %s\n", extp->FeatureSupport&64?"supported":"unsupported");
131*4882a593Smuzhiyun 	printk("     - Page-mode read:          %s\n", extp->FeatureSupport&128?"supported":"unsupported");
132*4882a593Smuzhiyun 	printk("     - Synchronous read:        %s\n", extp->FeatureSupport&256?"supported":"unsupported");
133*4882a593Smuzhiyun 	printk("     - Simultaneous operations: %s\n", extp->FeatureSupport&512?"supported":"unsupported");
134*4882a593Smuzhiyun 	printk("     - Extended Flash Array:    %s\n", extp->FeatureSupport&1024?"supported":"unsupported");
135*4882a593Smuzhiyun 	for (i=11; i<32; i++) {
136*4882a593Smuzhiyun 		if (extp->FeatureSupport & (1<<i))
137*4882a593Smuzhiyun 			printk("     - Unknown Bit %X:      supported\n", i);
138*4882a593Smuzhiyun 	}
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	printk("  Supported functions after Suspend: %2.2X\n", extp->SuspendCmdSupport);
141*4882a593Smuzhiyun 	printk("     - Program after Erase Suspend: %s\n", extp->SuspendCmdSupport&1?"supported":"unsupported");
142*4882a593Smuzhiyun 	for (i=1; i<8; i++) {
143*4882a593Smuzhiyun 		if (extp->SuspendCmdSupport & (1<<i))
144*4882a593Smuzhiyun 			printk("     - Unknown Bit %X:               supported\n", i);
145*4882a593Smuzhiyun 	}
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	printk("  Block Status Register Mask: %4.4X\n", extp->BlkStatusRegMask);
148*4882a593Smuzhiyun 	printk("     - Lock Bit Active:      %s\n", extp->BlkStatusRegMask&1?"yes":"no");
149*4882a593Smuzhiyun 	printk("     - Lock-Down Bit Active: %s\n", extp->BlkStatusRegMask&2?"yes":"no");
150*4882a593Smuzhiyun 	for (i=2; i<3; i++) {
151*4882a593Smuzhiyun 		if (extp->BlkStatusRegMask & (1<<i))
152*4882a593Smuzhiyun 			printk("     - Unknown Bit %X Active: yes\n",i);
153*4882a593Smuzhiyun 	}
154*4882a593Smuzhiyun 	printk("     - EFA Lock Bit:         %s\n", extp->BlkStatusRegMask&16?"yes":"no");
155*4882a593Smuzhiyun 	printk("     - EFA Lock-Down Bit:    %s\n", extp->BlkStatusRegMask&32?"yes":"no");
156*4882a593Smuzhiyun 	for (i=6; i<16; i++) {
157*4882a593Smuzhiyun 		if (extp->BlkStatusRegMask & (1<<i))
158*4882a593Smuzhiyun 			printk("     - Unknown Bit %X Active: yes\n",i);
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	printk("  Vcc Logic Supply Optimum Program/Erase Voltage: %d.%d V\n",
162*4882a593Smuzhiyun 	       extp->VccOptimal >> 4, extp->VccOptimal & 0xf);
163*4882a593Smuzhiyun 	if (extp->VppOptimal)
164*4882a593Smuzhiyun 		printk("  Vpp Programming Supply Optimum Program/Erase Voltage: %d.%d V\n",
165*4882a593Smuzhiyun 		       extp->VppOptimal >> 4, extp->VppOptimal & 0xf);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun #endif
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun /* Atmel chips don't use the same PRI format as Intel chips */
fixup_convert_atmel_pri(struct mtd_info * mtd)170*4882a593Smuzhiyun static void fixup_convert_atmel_pri(struct mtd_info *mtd)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
173*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
174*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
175*4882a593Smuzhiyun 	struct cfi_pri_atmel atmel_pri;
176*4882a593Smuzhiyun 	uint32_t features = 0;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	/* Reverse byteswapping */
179*4882a593Smuzhiyun 	extp->FeatureSupport = cpu_to_le32(extp->FeatureSupport);
180*4882a593Smuzhiyun 	extp->BlkStatusRegMask = cpu_to_le16(extp->BlkStatusRegMask);
181*4882a593Smuzhiyun 	extp->ProtRegAddr = cpu_to_le16(extp->ProtRegAddr);
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	memcpy(&atmel_pri, extp, sizeof(atmel_pri));
184*4882a593Smuzhiyun 	memset((char *)extp + 5, 0, sizeof(*extp) - 5);
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	printk(KERN_ERR "atmel Features: %02x\n", atmel_pri.Features);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x01) /* chip erase supported */
189*4882a593Smuzhiyun 		features |= (1<<0);
190*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x02) /* erase suspend supported */
191*4882a593Smuzhiyun 		features |= (1<<1);
192*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x04) /* program suspend supported */
193*4882a593Smuzhiyun 		features |= (1<<2);
194*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x08) /* simultaneous operations supported */
195*4882a593Smuzhiyun 		features |= (1<<9);
196*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x20) /* page mode read supported */
197*4882a593Smuzhiyun 		features |= (1<<7);
198*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x40) /* queued erase supported */
199*4882a593Smuzhiyun 		features |= (1<<4);
200*4882a593Smuzhiyun 	if (atmel_pri.Features & 0x80) /* Protection bits supported */
201*4882a593Smuzhiyun 		features |= (1<<6);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	extp->FeatureSupport = features;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	/* burst write mode not supported */
206*4882a593Smuzhiyun 	cfi->cfiq->BufWriteTimeoutTyp = 0;
207*4882a593Smuzhiyun 	cfi->cfiq->BufWriteTimeoutMax = 0;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
fixup_at49bv640dx_lock(struct mtd_info * mtd)210*4882a593Smuzhiyun static void fixup_at49bv640dx_lock(struct mtd_info *mtd)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
213*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
214*4882a593Smuzhiyun 	struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	cfip->FeatureSupport |= (1 << 5);
217*4882a593Smuzhiyun 	mtd->flags |= MTD_POWERUP_LOCK;
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
221*4882a593Smuzhiyun /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */
fixup_intel_strataflash(struct mtd_info * mtd)222*4882a593Smuzhiyun static void fixup_intel_strataflash(struct mtd_info *mtd)
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
225*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
226*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	printk(KERN_WARNING "cfi_cmdset_0001: Suspend "
229*4882a593Smuzhiyun 	                    "erase on write disabled.\n");
230*4882a593Smuzhiyun 	extp->SuspendCmdSupport &= ~1;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun #endif
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
fixup_no_write_suspend(struct mtd_info * mtd)235*4882a593Smuzhiyun static void fixup_no_write_suspend(struct mtd_info *mtd)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
238*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
239*4882a593Smuzhiyun 	struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	if (cfip && (cfip->FeatureSupport&4)) {
242*4882a593Smuzhiyun 		cfip->FeatureSupport &= ~4;
243*4882a593Smuzhiyun 		printk(KERN_WARNING "cfi_cmdset_0001: write suspend disabled\n");
244*4882a593Smuzhiyun 	}
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun #endif
247*4882a593Smuzhiyun 
fixup_st_m28w320ct(struct mtd_info * mtd)248*4882a593Smuzhiyun static void fixup_st_m28w320ct(struct mtd_info *mtd)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
251*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	cfi->cfiq->BufWriteTimeoutTyp = 0;	/* Not supported */
254*4882a593Smuzhiyun 	cfi->cfiq->BufWriteTimeoutMax = 0;	/* Not supported */
255*4882a593Smuzhiyun }
256*4882a593Smuzhiyun 
fixup_st_m28w320cb(struct mtd_info * mtd)257*4882a593Smuzhiyun static void fixup_st_m28w320cb(struct mtd_info *mtd)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
260*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	/* Note this is done after the region info is endian swapped */
263*4882a593Smuzhiyun 	cfi->cfiq->EraseRegionInfo[1] =
264*4882a593Smuzhiyun 		(cfi->cfiq->EraseRegionInfo[1] & 0xffff0000) | 0x3e;
265*4882a593Smuzhiyun };
266*4882a593Smuzhiyun 
is_LH28F640BF(struct cfi_private * cfi)267*4882a593Smuzhiyun static int is_LH28F640BF(struct cfi_private *cfi)
268*4882a593Smuzhiyun {
269*4882a593Smuzhiyun 	/* Sharp LH28F640BF Family */
270*4882a593Smuzhiyun 	if (cfi->mfr == CFI_MFR_SHARP && (
271*4882a593Smuzhiyun 	    cfi->id == LH28F640BFHE_PTTL90 || cfi->id == LH28F640BFHE_PBTL90 ||
272*4882a593Smuzhiyun 	    cfi->id == LH28F640BFHE_PTTL70A || cfi->id == LH28F640BFHE_PBTL70A))
273*4882a593Smuzhiyun 		return 1;
274*4882a593Smuzhiyun 	return 0;
275*4882a593Smuzhiyun }
276*4882a593Smuzhiyun 
fixup_LH28F640BF(struct mtd_info * mtd)277*4882a593Smuzhiyun static void fixup_LH28F640BF(struct mtd_info *mtd)
278*4882a593Smuzhiyun {
279*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
280*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
281*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	/* Reset the Partition Configuration Register on LH28F640BF
284*4882a593Smuzhiyun 	 * to a single partition (PCR = 0x000): PCR is embedded into A0-A15. */
285*4882a593Smuzhiyun 	if (is_LH28F640BF(cfi)) {
286*4882a593Smuzhiyun 		printk(KERN_INFO "Reset Partition Config. Register: 1 Partition of 4 planes\n");
287*4882a593Smuzhiyun 		map_write(map, CMD(0x60), 0);
288*4882a593Smuzhiyun 		map_write(map, CMD(0x04), 0);
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 		/* We have set one single partition thus
291*4882a593Smuzhiyun 		 * Simultaneous Operations are not allowed */
292*4882a593Smuzhiyun 		printk(KERN_INFO "cfi_cmdset_0001: Simultaneous Operations disabled\n");
293*4882a593Smuzhiyun 		extp->FeatureSupport &= ~512;
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
fixup_use_point(struct mtd_info * mtd)297*4882a593Smuzhiyun static void fixup_use_point(struct mtd_info *mtd)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
300*4882a593Smuzhiyun 	if (!mtd->_point && map_is_linear(map)) {
301*4882a593Smuzhiyun 		mtd->_point   = cfi_intelext_point;
302*4882a593Smuzhiyun 		mtd->_unpoint = cfi_intelext_unpoint;
303*4882a593Smuzhiyun 	}
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
fixup_use_write_buffers(struct mtd_info * mtd)306*4882a593Smuzhiyun static void fixup_use_write_buffers(struct mtd_info *mtd)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
309*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
310*4882a593Smuzhiyun 	if (cfi->cfiq->BufWriteTimeoutTyp) {
311*4882a593Smuzhiyun 		printk(KERN_INFO "Using buffer write method\n" );
312*4882a593Smuzhiyun 		mtd->_write = cfi_intelext_write_buffers;
313*4882a593Smuzhiyun 		mtd->_writev = cfi_intelext_writev;
314*4882a593Smuzhiyun 	}
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun /*
318*4882a593Smuzhiyun  * Some chips power-up with all sectors locked by default.
319*4882a593Smuzhiyun  */
fixup_unlock_powerup_lock(struct mtd_info * mtd)320*4882a593Smuzhiyun static void fixup_unlock_powerup_lock(struct mtd_info *mtd)
321*4882a593Smuzhiyun {
322*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
323*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
324*4882a593Smuzhiyun 	struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	if (cfip->FeatureSupport&32) {
327*4882a593Smuzhiyun 		printk(KERN_INFO "Using auto-unlock on power-up/resume\n" );
328*4882a593Smuzhiyun 		mtd->flags |= MTD_POWERUP_LOCK;
329*4882a593Smuzhiyun 	}
330*4882a593Smuzhiyun }
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun static struct cfi_fixup cfi_fixup_table[] = {
333*4882a593Smuzhiyun 	{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri },
334*4882a593Smuzhiyun 	{ CFI_MFR_ATMEL, AT49BV640D, fixup_at49bv640dx_lock },
335*4882a593Smuzhiyun 	{ CFI_MFR_ATMEL, AT49BV640DT, fixup_at49bv640dx_lock },
336*4882a593Smuzhiyun #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE
337*4882a593Smuzhiyun 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash },
338*4882a593Smuzhiyun #endif
339*4882a593Smuzhiyun #ifdef CMDSET0001_DISABLE_WRITE_SUSPEND
340*4882a593Smuzhiyun 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_no_write_suspend },
341*4882a593Smuzhiyun #endif
342*4882a593Smuzhiyun #if !FORCE_WORD_WRITE
343*4882a593Smuzhiyun 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_write_buffers },
344*4882a593Smuzhiyun #endif
345*4882a593Smuzhiyun 	{ CFI_MFR_ST, 0x00ba, /* M28W320CT */ fixup_st_m28w320ct },
346*4882a593Smuzhiyun 	{ CFI_MFR_ST, 0x00bb, /* M28W320CB */ fixup_st_m28w320cb },
347*4882a593Smuzhiyun 	{ CFI_MFR_INTEL, CFI_ID_ANY, fixup_unlock_powerup_lock },
348*4882a593Smuzhiyun 	{ CFI_MFR_SHARP, CFI_ID_ANY, fixup_unlock_powerup_lock },
349*4882a593Smuzhiyun 	{ CFI_MFR_SHARP, CFI_ID_ANY, fixup_LH28F640BF },
350*4882a593Smuzhiyun 	{ 0, 0, NULL }
351*4882a593Smuzhiyun };
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun static struct cfi_fixup jedec_fixup_table[] = {
354*4882a593Smuzhiyun 	{ CFI_MFR_INTEL, I82802AB,   fixup_use_fwh_lock },
355*4882a593Smuzhiyun 	{ CFI_MFR_INTEL, I82802AC,   fixup_use_fwh_lock },
356*4882a593Smuzhiyun 	{ CFI_MFR_ST,    M50LPW080,  fixup_use_fwh_lock },
357*4882a593Smuzhiyun 	{ CFI_MFR_ST,    M50FLW080A, fixup_use_fwh_lock },
358*4882a593Smuzhiyun 	{ CFI_MFR_ST,    M50FLW080B, fixup_use_fwh_lock },
359*4882a593Smuzhiyun 	{ 0, 0, NULL }
360*4882a593Smuzhiyun };
361*4882a593Smuzhiyun static struct cfi_fixup fixup_table[] = {
362*4882a593Smuzhiyun 	/* The CFI vendor ids and the JEDEC vendor IDs appear
363*4882a593Smuzhiyun 	 * to be common.  It is like the devices id's are as
364*4882a593Smuzhiyun 	 * well.  This table is to pick all cases where
365*4882a593Smuzhiyun 	 * we know that is the case.
366*4882a593Smuzhiyun 	 */
367*4882a593Smuzhiyun 	{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_point },
368*4882a593Smuzhiyun 	{ 0, 0, NULL }
369*4882a593Smuzhiyun };
370*4882a593Smuzhiyun 
cfi_fixup_major_minor(struct cfi_private * cfi,struct cfi_pri_intelext * extp)371*4882a593Smuzhiyun static void cfi_fixup_major_minor(struct cfi_private *cfi,
372*4882a593Smuzhiyun 						struct cfi_pri_intelext *extp)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun 	if (cfi->mfr == CFI_MFR_INTEL &&
375*4882a593Smuzhiyun 			cfi->id == PF38F4476 && extp->MinorVersion == '3')
376*4882a593Smuzhiyun 		extp->MinorVersion = '1';
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun 
cfi_is_micron_28F00AP30(struct cfi_private * cfi,struct flchip * chip)379*4882a593Smuzhiyun static int cfi_is_micron_28F00AP30(struct cfi_private *cfi, struct flchip *chip)
380*4882a593Smuzhiyun {
381*4882a593Smuzhiyun 	/*
382*4882a593Smuzhiyun 	 * Micron(was Numonyx) 1Gbit bottom boot are buggy w.r.t
383*4882a593Smuzhiyun 	 * Erase Supend for their small Erase Blocks(0x8000)
384*4882a593Smuzhiyun 	 */
385*4882a593Smuzhiyun 	if (cfi->mfr == CFI_MFR_INTEL && cfi->id == M28F00AP30)
386*4882a593Smuzhiyun 		return 1;
387*4882a593Smuzhiyun 	return 0;
388*4882a593Smuzhiyun }
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun static inline struct cfi_pri_intelext *
read_pri_intelext(struct map_info * map,__u16 adr)391*4882a593Smuzhiyun read_pri_intelext(struct map_info *map, __u16 adr)
392*4882a593Smuzhiyun {
393*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
394*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp;
395*4882a593Smuzhiyun 	unsigned int extra_size = 0;
396*4882a593Smuzhiyun 	unsigned int extp_size = sizeof(*extp);
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun  again:
399*4882a593Smuzhiyun 	extp = (struct cfi_pri_intelext *)cfi_read_pri(map, adr, extp_size, "Intel/Sharp");
400*4882a593Smuzhiyun 	if (!extp)
401*4882a593Smuzhiyun 		return NULL;
402*4882a593Smuzhiyun 
403*4882a593Smuzhiyun 	cfi_fixup_major_minor(cfi, extp);
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	if (extp->MajorVersion != '1' ||
406*4882a593Smuzhiyun 	    (extp->MinorVersion < '0' || extp->MinorVersion > '5')) {
407*4882a593Smuzhiyun 		printk(KERN_ERR "  Unknown Intel/Sharp Extended Query "
408*4882a593Smuzhiyun 		       "version %c.%c.\n",  extp->MajorVersion,
409*4882a593Smuzhiyun 		       extp->MinorVersion);
410*4882a593Smuzhiyun 		kfree(extp);
411*4882a593Smuzhiyun 		return NULL;
412*4882a593Smuzhiyun 	}
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	/* Do some byteswapping if necessary */
415*4882a593Smuzhiyun 	extp->FeatureSupport = le32_to_cpu(extp->FeatureSupport);
416*4882a593Smuzhiyun 	extp->BlkStatusRegMask = le16_to_cpu(extp->BlkStatusRegMask);
417*4882a593Smuzhiyun 	extp->ProtRegAddr = le16_to_cpu(extp->ProtRegAddr);
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	if (extp->MinorVersion >= '0') {
420*4882a593Smuzhiyun 		extra_size = 0;
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 		/* Protection Register info */
423*4882a593Smuzhiyun 		if (extp->NumProtectionFields)
424*4882a593Smuzhiyun 			extra_size += (extp->NumProtectionFields - 1) *
425*4882a593Smuzhiyun 				      sizeof(struct cfi_intelext_otpinfo);
426*4882a593Smuzhiyun 	}
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun 	if (extp->MinorVersion >= '1') {
429*4882a593Smuzhiyun 		/* Burst Read info */
430*4882a593Smuzhiyun 		extra_size += 2;
431*4882a593Smuzhiyun 		if (extp_size < sizeof(*extp) + extra_size)
432*4882a593Smuzhiyun 			goto need_more;
433*4882a593Smuzhiyun 		extra_size += extp->extra[extra_size - 1];
434*4882a593Smuzhiyun 	}
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	if (extp->MinorVersion >= '3') {
437*4882a593Smuzhiyun 		int nb_parts, i;
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 		/* Number of hardware-partitions */
440*4882a593Smuzhiyun 		extra_size += 1;
441*4882a593Smuzhiyun 		if (extp_size < sizeof(*extp) + extra_size)
442*4882a593Smuzhiyun 			goto need_more;
443*4882a593Smuzhiyun 		nb_parts = extp->extra[extra_size - 1];
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 		/* skip the sizeof(partregion) field in CFI 1.4 */
446*4882a593Smuzhiyun 		if (extp->MinorVersion >= '4')
447*4882a593Smuzhiyun 			extra_size += 2;
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 		for (i = 0; i < nb_parts; i++) {
450*4882a593Smuzhiyun 			struct cfi_intelext_regioninfo *rinfo;
451*4882a593Smuzhiyun 			rinfo = (struct cfi_intelext_regioninfo *)&extp->extra[extra_size];
452*4882a593Smuzhiyun 			extra_size += sizeof(*rinfo);
453*4882a593Smuzhiyun 			if (extp_size < sizeof(*extp) + extra_size)
454*4882a593Smuzhiyun 				goto need_more;
455*4882a593Smuzhiyun 			rinfo->NumIdentPartitions=le16_to_cpu(rinfo->NumIdentPartitions);
456*4882a593Smuzhiyun 			extra_size += (rinfo->NumBlockTypes - 1)
457*4882a593Smuzhiyun 				      * sizeof(struct cfi_intelext_blockinfo);
458*4882a593Smuzhiyun 		}
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 		if (extp->MinorVersion >= '4')
461*4882a593Smuzhiyun 			extra_size += sizeof(struct cfi_intelext_programming_regioninfo);
462*4882a593Smuzhiyun 
463*4882a593Smuzhiyun 		if (extp_size < sizeof(*extp) + extra_size) {
464*4882a593Smuzhiyun 			need_more:
465*4882a593Smuzhiyun 			extp_size = sizeof(*extp) + extra_size;
466*4882a593Smuzhiyun 			kfree(extp);
467*4882a593Smuzhiyun 			if (extp_size > 4096) {
468*4882a593Smuzhiyun 				printk(KERN_ERR
469*4882a593Smuzhiyun 					"%s: cfi_pri_intelext is too fat\n",
470*4882a593Smuzhiyun 					__func__);
471*4882a593Smuzhiyun 				return NULL;
472*4882a593Smuzhiyun 			}
473*4882a593Smuzhiyun 			goto again;
474*4882a593Smuzhiyun 		}
475*4882a593Smuzhiyun 	}
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	return extp;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun 
cfi_cmdset_0001(struct map_info * map,int primary)480*4882a593Smuzhiyun struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
483*4882a593Smuzhiyun 	struct mtd_info *mtd;
484*4882a593Smuzhiyun 	int i;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	mtd = kzalloc(sizeof(*mtd), GFP_KERNEL);
487*4882a593Smuzhiyun 	if (!mtd)
488*4882a593Smuzhiyun 		return NULL;
489*4882a593Smuzhiyun 	mtd->priv = map;
490*4882a593Smuzhiyun 	mtd->type = MTD_NORFLASH;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	/* Fill in the default mtd operations */
493*4882a593Smuzhiyun 	mtd->_erase   = cfi_intelext_erase_varsize;
494*4882a593Smuzhiyun 	mtd->_read    = cfi_intelext_read;
495*4882a593Smuzhiyun 	mtd->_write   = cfi_intelext_write_words;
496*4882a593Smuzhiyun 	mtd->_sync    = cfi_intelext_sync;
497*4882a593Smuzhiyun 	mtd->_lock    = cfi_intelext_lock;
498*4882a593Smuzhiyun 	mtd->_unlock  = cfi_intelext_unlock;
499*4882a593Smuzhiyun 	mtd->_is_locked = cfi_intelext_is_locked;
500*4882a593Smuzhiyun 	mtd->_suspend = cfi_intelext_suspend;
501*4882a593Smuzhiyun 	mtd->_resume  = cfi_intelext_resume;
502*4882a593Smuzhiyun 	mtd->flags   = MTD_CAP_NORFLASH;
503*4882a593Smuzhiyun 	mtd->name    = map->name;
504*4882a593Smuzhiyun 	mtd->writesize = 1;
505*4882a593Smuzhiyun 	mtd->writebufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	mtd->reboot_notifier.notifier_call = cfi_intelext_reboot;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	if (cfi->cfi_mode == CFI_MODE_CFI) {
510*4882a593Smuzhiyun 		/*
511*4882a593Smuzhiyun 		 * It's a real CFI chip, not one for which the probe
512*4882a593Smuzhiyun 		 * routine faked a CFI structure. So we read the feature
513*4882a593Smuzhiyun 		 * table from it.
514*4882a593Smuzhiyun 		 */
515*4882a593Smuzhiyun 		__u16 adr = primary?cfi->cfiq->P_ADR:cfi->cfiq->A_ADR;
516*4882a593Smuzhiyun 		struct cfi_pri_intelext *extp;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 		extp = read_pri_intelext(map, adr);
519*4882a593Smuzhiyun 		if (!extp) {
520*4882a593Smuzhiyun 			kfree(mtd);
521*4882a593Smuzhiyun 			return NULL;
522*4882a593Smuzhiyun 		}
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 		/* Install our own private info structure */
525*4882a593Smuzhiyun 		cfi->cmdset_priv = extp;
526*4882a593Smuzhiyun 
527*4882a593Smuzhiyun 		cfi_fixup(mtd, cfi_fixup_table);
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun #ifdef DEBUG_CFI_FEATURES
530*4882a593Smuzhiyun 		/* Tell the user about it in lots of lovely detail */
531*4882a593Smuzhiyun 		cfi_tell_features(extp);
532*4882a593Smuzhiyun #endif
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 		if(extp->SuspendCmdSupport & 1) {
535*4882a593Smuzhiyun 			printk(KERN_NOTICE "cfi_cmdset_0001: Erase suspend on write enabled\n");
536*4882a593Smuzhiyun 		}
537*4882a593Smuzhiyun 	}
538*4882a593Smuzhiyun 	else if (cfi->cfi_mode == CFI_MODE_JEDEC) {
539*4882a593Smuzhiyun 		/* Apply jedec specific fixups */
540*4882a593Smuzhiyun 		cfi_fixup(mtd, jedec_fixup_table);
541*4882a593Smuzhiyun 	}
542*4882a593Smuzhiyun 	/* Apply generic fixups */
543*4882a593Smuzhiyun 	cfi_fixup(mtd, fixup_table);
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	for (i=0; i< cfi->numchips; i++) {
546*4882a593Smuzhiyun 		if (cfi->cfiq->WordWriteTimeoutTyp)
547*4882a593Smuzhiyun 			cfi->chips[i].word_write_time =
548*4882a593Smuzhiyun 				1<<cfi->cfiq->WordWriteTimeoutTyp;
549*4882a593Smuzhiyun 		else
550*4882a593Smuzhiyun 			cfi->chips[i].word_write_time = 50000;
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 		if (cfi->cfiq->BufWriteTimeoutTyp)
553*4882a593Smuzhiyun 			cfi->chips[i].buffer_write_time =
554*4882a593Smuzhiyun 				1<<cfi->cfiq->BufWriteTimeoutTyp;
555*4882a593Smuzhiyun 		/* No default; if it isn't specified, we won't use it */
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 		if (cfi->cfiq->BlockEraseTimeoutTyp)
558*4882a593Smuzhiyun 			cfi->chips[i].erase_time =
559*4882a593Smuzhiyun 				1000<<cfi->cfiq->BlockEraseTimeoutTyp;
560*4882a593Smuzhiyun 		else
561*4882a593Smuzhiyun 			cfi->chips[i].erase_time = 2000000;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 		if (cfi->cfiq->WordWriteTimeoutTyp &&
564*4882a593Smuzhiyun 		    cfi->cfiq->WordWriteTimeoutMax)
565*4882a593Smuzhiyun 			cfi->chips[i].word_write_time_max =
566*4882a593Smuzhiyun 				1<<(cfi->cfiq->WordWriteTimeoutTyp +
567*4882a593Smuzhiyun 				    cfi->cfiq->WordWriteTimeoutMax);
568*4882a593Smuzhiyun 		else
569*4882a593Smuzhiyun 			cfi->chips[i].word_write_time_max = 50000 * 8;
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 		if (cfi->cfiq->BufWriteTimeoutTyp &&
572*4882a593Smuzhiyun 		    cfi->cfiq->BufWriteTimeoutMax)
573*4882a593Smuzhiyun 			cfi->chips[i].buffer_write_time_max =
574*4882a593Smuzhiyun 				1<<(cfi->cfiq->BufWriteTimeoutTyp +
575*4882a593Smuzhiyun 				    cfi->cfiq->BufWriteTimeoutMax);
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 		if (cfi->cfiq->BlockEraseTimeoutTyp &&
578*4882a593Smuzhiyun 		    cfi->cfiq->BlockEraseTimeoutMax)
579*4882a593Smuzhiyun 			cfi->chips[i].erase_time_max =
580*4882a593Smuzhiyun 				1000<<(cfi->cfiq->BlockEraseTimeoutTyp +
581*4882a593Smuzhiyun 				       cfi->cfiq->BlockEraseTimeoutMax);
582*4882a593Smuzhiyun 		else
583*4882a593Smuzhiyun 			cfi->chips[i].erase_time_max = 2000000 * 8;
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 		cfi->chips[i].ref_point_counter = 0;
586*4882a593Smuzhiyun 		init_waitqueue_head(&(cfi->chips[i].wq));
587*4882a593Smuzhiyun 	}
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	map->fldrv = &cfi_intelext_chipdrv;
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	return cfi_intelext_setup(mtd);
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun struct mtd_info *cfi_cmdset_0003(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0001")));
594*4882a593Smuzhiyun struct mtd_info *cfi_cmdset_0200(struct map_info *map, int primary) __attribute__((alias("cfi_cmdset_0001")));
595*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cfi_cmdset_0001);
596*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cfi_cmdset_0003);
597*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cfi_cmdset_0200);
598*4882a593Smuzhiyun 
cfi_intelext_setup(struct mtd_info * mtd)599*4882a593Smuzhiyun static struct mtd_info *cfi_intelext_setup(struct mtd_info *mtd)
600*4882a593Smuzhiyun {
601*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
602*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
603*4882a593Smuzhiyun 	unsigned long offset = 0;
604*4882a593Smuzhiyun 	int i,j;
605*4882a593Smuzhiyun 	unsigned long devsize = (1<<cfi->cfiq->DevSize) * cfi->interleave;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	//printk(KERN_DEBUG "number of CFI chips: %d\n", cfi->numchips);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	mtd->size = devsize * cfi->numchips;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	mtd->numeraseregions = cfi->cfiq->NumEraseRegions * cfi->numchips;
612*4882a593Smuzhiyun 	mtd->eraseregions = kcalloc(mtd->numeraseregions,
613*4882a593Smuzhiyun 				    sizeof(struct mtd_erase_region_info),
614*4882a593Smuzhiyun 				    GFP_KERNEL);
615*4882a593Smuzhiyun 	if (!mtd->eraseregions)
616*4882a593Smuzhiyun 		goto setup_err;
617*4882a593Smuzhiyun 
618*4882a593Smuzhiyun 	for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
619*4882a593Smuzhiyun 		unsigned long ernum, ersize;
620*4882a593Smuzhiyun 		ersize = ((cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff) * cfi->interleave;
621*4882a593Smuzhiyun 		ernum = (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1;
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 		if (mtd->erasesize < ersize) {
624*4882a593Smuzhiyun 			mtd->erasesize = ersize;
625*4882a593Smuzhiyun 		}
626*4882a593Smuzhiyun 		for (j=0; j<cfi->numchips; j++) {
627*4882a593Smuzhiyun 			mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].offset = (j*devsize)+offset;
628*4882a593Smuzhiyun 			mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].erasesize = ersize;
629*4882a593Smuzhiyun 			mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].numblocks = ernum;
630*4882a593Smuzhiyun 			mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].lockmap = kmalloc(ernum / 8 + 1, GFP_KERNEL);
631*4882a593Smuzhiyun 			if (!mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].lockmap)
632*4882a593Smuzhiyun 				goto setup_err;
633*4882a593Smuzhiyun 		}
634*4882a593Smuzhiyun 		offset += (ersize * ernum);
635*4882a593Smuzhiyun 	}
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	if (offset != devsize) {
638*4882a593Smuzhiyun 		/* Argh */
639*4882a593Smuzhiyun 		printk(KERN_WARNING "Sum of regions (%lx) != total size of set of interleaved chips (%lx)\n", offset, devsize);
640*4882a593Smuzhiyun 		goto setup_err;
641*4882a593Smuzhiyun 	}
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	for (i=0; i<mtd->numeraseregions;i++){
644*4882a593Smuzhiyun 		printk(KERN_DEBUG "erase region %d: offset=0x%llx,size=0x%x,blocks=%d\n",
645*4882a593Smuzhiyun 		       i,(unsigned long long)mtd->eraseregions[i].offset,
646*4882a593Smuzhiyun 		       mtd->eraseregions[i].erasesize,
647*4882a593Smuzhiyun 		       mtd->eraseregions[i].numblocks);
648*4882a593Smuzhiyun 	}
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun #ifdef CONFIG_MTD_OTP
651*4882a593Smuzhiyun 	mtd->_read_fact_prot_reg = cfi_intelext_read_fact_prot_reg;
652*4882a593Smuzhiyun 	mtd->_read_user_prot_reg = cfi_intelext_read_user_prot_reg;
653*4882a593Smuzhiyun 	mtd->_write_user_prot_reg = cfi_intelext_write_user_prot_reg;
654*4882a593Smuzhiyun 	mtd->_lock_user_prot_reg = cfi_intelext_lock_user_prot_reg;
655*4882a593Smuzhiyun 	mtd->_get_fact_prot_info = cfi_intelext_get_fact_prot_info;
656*4882a593Smuzhiyun 	mtd->_get_user_prot_info = cfi_intelext_get_user_prot_info;
657*4882a593Smuzhiyun #endif
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	/* This function has the potential to distort the reality
660*4882a593Smuzhiyun 	   a bit and therefore should be called last. */
661*4882a593Smuzhiyun 	if (cfi_intelext_partition_fixup(mtd, &cfi) != 0)
662*4882a593Smuzhiyun 		goto setup_err;
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	__module_get(THIS_MODULE);
665*4882a593Smuzhiyun 	register_reboot_notifier(&mtd->reboot_notifier);
666*4882a593Smuzhiyun 	return mtd;
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun  setup_err:
669*4882a593Smuzhiyun 	if (mtd->eraseregions)
670*4882a593Smuzhiyun 		for (i=0; i<cfi->cfiq->NumEraseRegions; i++)
671*4882a593Smuzhiyun 			for (j=0; j<cfi->numchips; j++)
672*4882a593Smuzhiyun 				kfree(mtd->eraseregions[(j*cfi->cfiq->NumEraseRegions)+i].lockmap);
673*4882a593Smuzhiyun 	kfree(mtd->eraseregions);
674*4882a593Smuzhiyun 	kfree(mtd);
675*4882a593Smuzhiyun 	kfree(cfi->cmdset_priv);
676*4882a593Smuzhiyun 	return NULL;
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun 
cfi_intelext_partition_fixup(struct mtd_info * mtd,struct cfi_private ** pcfi)679*4882a593Smuzhiyun static int cfi_intelext_partition_fixup(struct mtd_info *mtd,
680*4882a593Smuzhiyun 					struct cfi_private **pcfi)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
683*4882a593Smuzhiyun 	struct cfi_private *cfi = *pcfi;
684*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	/*
687*4882a593Smuzhiyun 	 * Probing of multi-partition flash chips.
688*4882a593Smuzhiyun 	 *
689*4882a593Smuzhiyun 	 * To support multiple partitions when available, we simply arrange
690*4882a593Smuzhiyun 	 * for each of them to have their own flchip structure even if they
691*4882a593Smuzhiyun 	 * are on the same physical chip.  This means completely recreating
692*4882a593Smuzhiyun 	 * a new cfi_private structure right here which is a blatent code
693*4882a593Smuzhiyun 	 * layering violation, but this is still the least intrusive
694*4882a593Smuzhiyun 	 * arrangement at this point. This can be rearranged in the future
695*4882a593Smuzhiyun 	 * if someone feels motivated enough.  --nico
696*4882a593Smuzhiyun 	 */
697*4882a593Smuzhiyun 	if (extp && extp->MajorVersion == '1' && extp->MinorVersion >= '3'
698*4882a593Smuzhiyun 	    && extp->FeatureSupport & (1 << 9)) {
699*4882a593Smuzhiyun 		int offs = 0;
700*4882a593Smuzhiyun 		struct cfi_private *newcfi;
701*4882a593Smuzhiyun 		struct flchip *chip;
702*4882a593Smuzhiyun 		struct flchip_shared *shared;
703*4882a593Smuzhiyun 		int numregions, numparts, partshift, numvirtchips, i, j;
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 		/* Protection Register info */
706*4882a593Smuzhiyun 		if (extp->NumProtectionFields)
707*4882a593Smuzhiyun 			offs = (extp->NumProtectionFields - 1) *
708*4882a593Smuzhiyun 			       sizeof(struct cfi_intelext_otpinfo);
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun 		/* Burst Read info */
711*4882a593Smuzhiyun 		offs += extp->extra[offs+1]+2;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun 		/* Number of partition regions */
714*4882a593Smuzhiyun 		numregions = extp->extra[offs];
715*4882a593Smuzhiyun 		offs += 1;
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 		/* skip the sizeof(partregion) field in CFI 1.4 */
718*4882a593Smuzhiyun 		if (extp->MinorVersion >= '4')
719*4882a593Smuzhiyun 			offs += 2;
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun 		/* Number of hardware partitions */
722*4882a593Smuzhiyun 		numparts = 0;
723*4882a593Smuzhiyun 		for (i = 0; i < numregions; i++) {
724*4882a593Smuzhiyun 			struct cfi_intelext_regioninfo *rinfo;
725*4882a593Smuzhiyun 			rinfo = (struct cfi_intelext_regioninfo *)&extp->extra[offs];
726*4882a593Smuzhiyun 			numparts += rinfo->NumIdentPartitions;
727*4882a593Smuzhiyun 			offs += sizeof(*rinfo)
728*4882a593Smuzhiyun 				+ (rinfo->NumBlockTypes - 1) *
729*4882a593Smuzhiyun 				  sizeof(struct cfi_intelext_blockinfo);
730*4882a593Smuzhiyun 		}
731*4882a593Smuzhiyun 
732*4882a593Smuzhiyun 		if (!numparts)
733*4882a593Smuzhiyun 			numparts = 1;
734*4882a593Smuzhiyun 
735*4882a593Smuzhiyun 		/* Programming Region info */
736*4882a593Smuzhiyun 		if (extp->MinorVersion >= '4') {
737*4882a593Smuzhiyun 			struct cfi_intelext_programming_regioninfo *prinfo;
738*4882a593Smuzhiyun 			prinfo = (struct cfi_intelext_programming_regioninfo *)&extp->extra[offs];
739*4882a593Smuzhiyun 			mtd->writesize = cfi->interleave << prinfo->ProgRegShift;
740*4882a593Smuzhiyun 			mtd->flags &= ~MTD_BIT_WRITEABLE;
741*4882a593Smuzhiyun 			printk(KERN_DEBUG "%s: program region size/ctrl_valid/ctrl_inval = %d/%d/%d\n",
742*4882a593Smuzhiyun 			       map->name, mtd->writesize,
743*4882a593Smuzhiyun 			       cfi->interleave * prinfo->ControlValid,
744*4882a593Smuzhiyun 			       cfi->interleave * prinfo->ControlInvalid);
745*4882a593Smuzhiyun 		}
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 		/*
748*4882a593Smuzhiyun 		 * All functions below currently rely on all chips having
749*4882a593Smuzhiyun 		 * the same geometry so we'll just assume that all hardware
750*4882a593Smuzhiyun 		 * partitions are of the same size too.
751*4882a593Smuzhiyun 		 */
752*4882a593Smuzhiyun 		partshift = cfi->chipshift - __ffs(numparts);
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 		if ((1 << partshift) < mtd->erasesize) {
755*4882a593Smuzhiyun 			printk( KERN_ERR
756*4882a593Smuzhiyun 				"%s: bad number of hw partitions (%d)\n",
757*4882a593Smuzhiyun 				__func__, numparts);
758*4882a593Smuzhiyun 			return -EINVAL;
759*4882a593Smuzhiyun 		}
760*4882a593Smuzhiyun 
761*4882a593Smuzhiyun 		numvirtchips = cfi->numchips * numparts;
762*4882a593Smuzhiyun 		newcfi = kmalloc(struct_size(newcfi, chips, numvirtchips),
763*4882a593Smuzhiyun 				 GFP_KERNEL);
764*4882a593Smuzhiyun 		if (!newcfi)
765*4882a593Smuzhiyun 			return -ENOMEM;
766*4882a593Smuzhiyun 		shared = kmalloc_array(cfi->numchips,
767*4882a593Smuzhiyun 				       sizeof(struct flchip_shared),
768*4882a593Smuzhiyun 				       GFP_KERNEL);
769*4882a593Smuzhiyun 		if (!shared) {
770*4882a593Smuzhiyun 			kfree(newcfi);
771*4882a593Smuzhiyun 			return -ENOMEM;
772*4882a593Smuzhiyun 		}
773*4882a593Smuzhiyun 		memcpy(newcfi, cfi, sizeof(struct cfi_private));
774*4882a593Smuzhiyun 		newcfi->numchips = numvirtchips;
775*4882a593Smuzhiyun 		newcfi->chipshift = partshift;
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun 		chip = &newcfi->chips[0];
778*4882a593Smuzhiyun 		for (i = 0; i < cfi->numchips; i++) {
779*4882a593Smuzhiyun 			shared[i].writing = shared[i].erasing = NULL;
780*4882a593Smuzhiyun 			mutex_init(&shared[i].lock);
781*4882a593Smuzhiyun 			for (j = 0; j < numparts; j++) {
782*4882a593Smuzhiyun 				*chip = cfi->chips[i];
783*4882a593Smuzhiyun 				chip->start += j << partshift;
784*4882a593Smuzhiyun 				chip->priv = &shared[i];
785*4882a593Smuzhiyun 				/* those should be reset too since
786*4882a593Smuzhiyun 				   they create memory references. */
787*4882a593Smuzhiyun 				init_waitqueue_head(&chip->wq);
788*4882a593Smuzhiyun 				mutex_init(&chip->mutex);
789*4882a593Smuzhiyun 				chip++;
790*4882a593Smuzhiyun 			}
791*4882a593Smuzhiyun 		}
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 		printk(KERN_DEBUG "%s: %d set(s) of %d interleaved chips "
794*4882a593Smuzhiyun 				  "--> %d partitions of %d KiB\n",
795*4882a593Smuzhiyun 				  map->name, cfi->numchips, cfi->interleave,
796*4882a593Smuzhiyun 				  newcfi->numchips, 1<<(newcfi->chipshift-10));
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 		map->fldrv_priv = newcfi;
799*4882a593Smuzhiyun 		*pcfi = newcfi;
800*4882a593Smuzhiyun 		kfree(cfi);
801*4882a593Smuzhiyun 	}
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	return 0;
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun /*
807*4882a593Smuzhiyun  *  *********** CHIP ACCESS FUNCTIONS ***********
808*4882a593Smuzhiyun  */
chip_ready(struct map_info * map,struct flchip * chip,unsigned long adr,int mode)809*4882a593Smuzhiyun static int chip_ready (struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
810*4882a593Smuzhiyun {
811*4882a593Smuzhiyun 	DECLARE_WAITQUEUE(wait, current);
812*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
813*4882a593Smuzhiyun 	map_word status, status_OK = CMD(0x80), status_PWS = CMD(0x01);
814*4882a593Smuzhiyun 	struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
815*4882a593Smuzhiyun 	unsigned long timeo = jiffies + HZ;
816*4882a593Smuzhiyun 
817*4882a593Smuzhiyun 	/* Prevent setting state FL_SYNCING for chip in suspended state. */
818*4882a593Smuzhiyun 	if (mode == FL_SYNCING && chip->oldstate != FL_READY)
819*4882a593Smuzhiyun 		goto sleep;
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	switch (chip->state) {
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun 	case FL_STATUS:
824*4882a593Smuzhiyun 		for (;;) {
825*4882a593Smuzhiyun 			status = map_read(map, adr);
826*4882a593Smuzhiyun 			if (map_word_andequal(map, status, status_OK, status_OK))
827*4882a593Smuzhiyun 				break;
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 			/* At this point we're fine with write operations
830*4882a593Smuzhiyun 			   in other partitions as they don't conflict. */
831*4882a593Smuzhiyun 			if (chip->priv && map_word_andequal(map, status, status_PWS, status_PWS))
832*4882a593Smuzhiyun 				break;
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
835*4882a593Smuzhiyun 			cfi_udelay(1);
836*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
837*4882a593Smuzhiyun 			/* Someone else might have been playing with it. */
838*4882a593Smuzhiyun 			return -EAGAIN;
839*4882a593Smuzhiyun 		}
840*4882a593Smuzhiyun 		fallthrough;
841*4882a593Smuzhiyun 	case FL_READY:
842*4882a593Smuzhiyun 	case FL_CFI_QUERY:
843*4882a593Smuzhiyun 	case FL_JEDEC_QUERY:
844*4882a593Smuzhiyun 		return 0;
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun 	case FL_ERASING:
847*4882a593Smuzhiyun 		if (!cfip ||
848*4882a593Smuzhiyun 		    !(cfip->FeatureSupport & 2) ||
849*4882a593Smuzhiyun 		    !(mode == FL_READY || mode == FL_POINT ||
850*4882a593Smuzhiyun 		     (mode == FL_WRITING && (cfip->SuspendCmdSupport & 1))))
851*4882a593Smuzhiyun 			goto sleep;
852*4882a593Smuzhiyun 
853*4882a593Smuzhiyun 		/* Do not allow suspend iff read/write to EB address */
854*4882a593Smuzhiyun 		if ((adr & chip->in_progress_block_mask) ==
855*4882a593Smuzhiyun 		    chip->in_progress_block_addr)
856*4882a593Smuzhiyun 			goto sleep;
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 		/* do not suspend small EBs, buggy Micron Chips */
859*4882a593Smuzhiyun 		if (cfi_is_micron_28F00AP30(cfi, chip) &&
860*4882a593Smuzhiyun 		    (chip->in_progress_block_mask == ~(0x8000-1)))
861*4882a593Smuzhiyun 			goto sleep;
862*4882a593Smuzhiyun 
863*4882a593Smuzhiyun 		/* Erase suspend */
864*4882a593Smuzhiyun 		map_write(map, CMD(0xB0), chip->in_progress_block_addr);
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 		/* If the flash has finished erasing, then 'erase suspend'
867*4882a593Smuzhiyun 		 * appears to make some (28F320) flash devices switch to
868*4882a593Smuzhiyun 		 * 'read' mode.  Make sure that we switch to 'read status'
869*4882a593Smuzhiyun 		 * mode so we get the right data. --rmk
870*4882a593Smuzhiyun 		 */
871*4882a593Smuzhiyun 		map_write(map, CMD(0x70), chip->in_progress_block_addr);
872*4882a593Smuzhiyun 		chip->oldstate = FL_ERASING;
873*4882a593Smuzhiyun 		chip->state = FL_ERASE_SUSPENDING;
874*4882a593Smuzhiyun 		chip->erase_suspended = 1;
875*4882a593Smuzhiyun 		for (;;) {
876*4882a593Smuzhiyun 			status = map_read(map, chip->in_progress_block_addr);
877*4882a593Smuzhiyun 			if (map_word_andequal(map, status, status_OK, status_OK))
878*4882a593Smuzhiyun 			        break;
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 			if (time_after(jiffies, timeo)) {
881*4882a593Smuzhiyun 				/* Urgh. Resume and pretend we weren't here.
882*4882a593Smuzhiyun 				 * Make sure we're in 'read status' mode if it had finished */
883*4882a593Smuzhiyun 				put_chip(map, chip, adr);
884*4882a593Smuzhiyun 				printk(KERN_ERR "%s: Chip not ready after erase "
885*4882a593Smuzhiyun 				       "suspended: status = 0x%lx\n", map->name, status.x[0]);
886*4882a593Smuzhiyun 				return -EIO;
887*4882a593Smuzhiyun 			}
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
890*4882a593Smuzhiyun 			cfi_udelay(1);
891*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
892*4882a593Smuzhiyun 			/* Nobody will touch it while it's in state FL_ERASE_SUSPENDING.
893*4882a593Smuzhiyun 			   So we can just loop here. */
894*4882a593Smuzhiyun 		}
895*4882a593Smuzhiyun 		chip->state = FL_STATUS;
896*4882a593Smuzhiyun 		return 0;
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	case FL_XIP_WHILE_ERASING:
899*4882a593Smuzhiyun 		if (mode != FL_READY && mode != FL_POINT &&
900*4882a593Smuzhiyun 		    (mode != FL_WRITING || !cfip || !(cfip->SuspendCmdSupport&1)))
901*4882a593Smuzhiyun 			goto sleep;
902*4882a593Smuzhiyun 		chip->oldstate = chip->state;
903*4882a593Smuzhiyun 		chip->state = FL_READY;
904*4882a593Smuzhiyun 		return 0;
905*4882a593Smuzhiyun 
906*4882a593Smuzhiyun 	case FL_SHUTDOWN:
907*4882a593Smuzhiyun 		/* The machine is rebooting now,so no one can get chip anymore */
908*4882a593Smuzhiyun 		return -EIO;
909*4882a593Smuzhiyun 	case FL_POINT:
910*4882a593Smuzhiyun 		/* Only if there's no operation suspended... */
911*4882a593Smuzhiyun 		if (mode == FL_READY && chip->oldstate == FL_READY)
912*4882a593Smuzhiyun 			return 0;
913*4882a593Smuzhiyun 		fallthrough;
914*4882a593Smuzhiyun 	default:
915*4882a593Smuzhiyun 	sleep:
916*4882a593Smuzhiyun 		set_current_state(TASK_UNINTERRUPTIBLE);
917*4882a593Smuzhiyun 		add_wait_queue(&chip->wq, &wait);
918*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
919*4882a593Smuzhiyun 		schedule();
920*4882a593Smuzhiyun 		remove_wait_queue(&chip->wq, &wait);
921*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
922*4882a593Smuzhiyun 		return -EAGAIN;
923*4882a593Smuzhiyun 	}
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun 
get_chip(struct map_info * map,struct flchip * chip,unsigned long adr,int mode)926*4882a593Smuzhiyun static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr, int mode)
927*4882a593Smuzhiyun {
928*4882a593Smuzhiyun 	int ret;
929*4882a593Smuzhiyun 	DECLARE_WAITQUEUE(wait, current);
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun  retry:
932*4882a593Smuzhiyun 	if (chip->priv &&
933*4882a593Smuzhiyun 	    (mode == FL_WRITING || mode == FL_ERASING || mode == FL_OTP_WRITE
934*4882a593Smuzhiyun 	    || mode == FL_SHUTDOWN) && chip->state != FL_SYNCING) {
935*4882a593Smuzhiyun 		/*
936*4882a593Smuzhiyun 		 * OK. We have possibility for contention on the write/erase
937*4882a593Smuzhiyun 		 * operations which are global to the real chip and not per
938*4882a593Smuzhiyun 		 * partition.  So let's fight it over in the partition which
939*4882a593Smuzhiyun 		 * currently has authority on the operation.
940*4882a593Smuzhiyun 		 *
941*4882a593Smuzhiyun 		 * The rules are as follows:
942*4882a593Smuzhiyun 		 *
943*4882a593Smuzhiyun 		 * - any write operation must own shared->writing.
944*4882a593Smuzhiyun 		 *
945*4882a593Smuzhiyun 		 * - any erase operation must own _both_ shared->writing and
946*4882a593Smuzhiyun 		 *   shared->erasing.
947*4882a593Smuzhiyun 		 *
948*4882a593Smuzhiyun 		 * - contention arbitration is handled in the owner's context.
949*4882a593Smuzhiyun 		 *
950*4882a593Smuzhiyun 		 * The 'shared' struct can be read and/or written only when
951*4882a593Smuzhiyun 		 * its lock is taken.
952*4882a593Smuzhiyun 		 */
953*4882a593Smuzhiyun 		struct flchip_shared *shared = chip->priv;
954*4882a593Smuzhiyun 		struct flchip *contender;
955*4882a593Smuzhiyun 		mutex_lock(&shared->lock);
956*4882a593Smuzhiyun 		contender = shared->writing;
957*4882a593Smuzhiyun 		if (contender && contender != chip) {
958*4882a593Smuzhiyun 			/*
959*4882a593Smuzhiyun 			 * The engine to perform desired operation on this
960*4882a593Smuzhiyun 			 * partition is already in use by someone else.
961*4882a593Smuzhiyun 			 * Let's fight over it in the context of the chip
962*4882a593Smuzhiyun 			 * currently using it.  If it is possible to suspend,
963*4882a593Smuzhiyun 			 * that other partition will do just that, otherwise
964*4882a593Smuzhiyun 			 * it'll happily send us to sleep.  In any case, when
965*4882a593Smuzhiyun 			 * get_chip returns success we're clear to go ahead.
966*4882a593Smuzhiyun 			 */
967*4882a593Smuzhiyun 			ret = mutex_trylock(&contender->mutex);
968*4882a593Smuzhiyun 			mutex_unlock(&shared->lock);
969*4882a593Smuzhiyun 			if (!ret)
970*4882a593Smuzhiyun 				goto retry;
971*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
972*4882a593Smuzhiyun 			ret = chip_ready(map, contender, contender->start, mode);
973*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 			if (ret == -EAGAIN) {
976*4882a593Smuzhiyun 				mutex_unlock(&contender->mutex);
977*4882a593Smuzhiyun 				goto retry;
978*4882a593Smuzhiyun 			}
979*4882a593Smuzhiyun 			if (ret) {
980*4882a593Smuzhiyun 				mutex_unlock(&contender->mutex);
981*4882a593Smuzhiyun 				return ret;
982*4882a593Smuzhiyun 			}
983*4882a593Smuzhiyun 			mutex_lock(&shared->lock);
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 			/* We should not own chip if it is already
986*4882a593Smuzhiyun 			 * in FL_SYNCING state. Put contender and retry. */
987*4882a593Smuzhiyun 			if (chip->state == FL_SYNCING) {
988*4882a593Smuzhiyun 				put_chip(map, contender, contender->start);
989*4882a593Smuzhiyun 				mutex_unlock(&contender->mutex);
990*4882a593Smuzhiyun 				goto retry;
991*4882a593Smuzhiyun 			}
992*4882a593Smuzhiyun 			mutex_unlock(&contender->mutex);
993*4882a593Smuzhiyun 		}
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 		/* Check if we already have suspended erase
996*4882a593Smuzhiyun 		 * on this chip. Sleep. */
997*4882a593Smuzhiyun 		if (mode == FL_ERASING && shared->erasing
998*4882a593Smuzhiyun 		    && shared->erasing->oldstate == FL_ERASING) {
999*4882a593Smuzhiyun 			mutex_unlock(&shared->lock);
1000*4882a593Smuzhiyun 			set_current_state(TASK_UNINTERRUPTIBLE);
1001*4882a593Smuzhiyun 			add_wait_queue(&chip->wq, &wait);
1002*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
1003*4882a593Smuzhiyun 			schedule();
1004*4882a593Smuzhiyun 			remove_wait_queue(&chip->wq, &wait);
1005*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
1006*4882a593Smuzhiyun 			goto retry;
1007*4882a593Smuzhiyun 		}
1008*4882a593Smuzhiyun 
1009*4882a593Smuzhiyun 		/* We now own it */
1010*4882a593Smuzhiyun 		shared->writing = chip;
1011*4882a593Smuzhiyun 		if (mode == FL_ERASING)
1012*4882a593Smuzhiyun 			shared->erasing = chip;
1013*4882a593Smuzhiyun 		mutex_unlock(&shared->lock);
1014*4882a593Smuzhiyun 	}
1015*4882a593Smuzhiyun 	ret = chip_ready(map, chip, adr, mode);
1016*4882a593Smuzhiyun 	if (ret == -EAGAIN)
1017*4882a593Smuzhiyun 		goto retry;
1018*4882a593Smuzhiyun 
1019*4882a593Smuzhiyun 	return ret;
1020*4882a593Smuzhiyun }
1021*4882a593Smuzhiyun 
put_chip(struct map_info * map,struct flchip * chip,unsigned long adr)1022*4882a593Smuzhiyun static void put_chip(struct map_info *map, struct flchip *chip, unsigned long adr)
1023*4882a593Smuzhiyun {
1024*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	if (chip->priv) {
1027*4882a593Smuzhiyun 		struct flchip_shared *shared = chip->priv;
1028*4882a593Smuzhiyun 		mutex_lock(&shared->lock);
1029*4882a593Smuzhiyun 		if (shared->writing == chip && chip->oldstate == FL_READY) {
1030*4882a593Smuzhiyun 			/* We own the ability to write, but we're done */
1031*4882a593Smuzhiyun 			shared->writing = shared->erasing;
1032*4882a593Smuzhiyun 			if (shared->writing && shared->writing != chip) {
1033*4882a593Smuzhiyun 				/* give back ownership to who we loaned it from */
1034*4882a593Smuzhiyun 				struct flchip *loaner = shared->writing;
1035*4882a593Smuzhiyun 				mutex_lock(&loaner->mutex);
1036*4882a593Smuzhiyun 				mutex_unlock(&shared->lock);
1037*4882a593Smuzhiyun 				mutex_unlock(&chip->mutex);
1038*4882a593Smuzhiyun 				put_chip(map, loaner, loaner->start);
1039*4882a593Smuzhiyun 				mutex_lock(&chip->mutex);
1040*4882a593Smuzhiyun 				mutex_unlock(&loaner->mutex);
1041*4882a593Smuzhiyun 				wake_up(&chip->wq);
1042*4882a593Smuzhiyun 				return;
1043*4882a593Smuzhiyun 			}
1044*4882a593Smuzhiyun 			shared->erasing = NULL;
1045*4882a593Smuzhiyun 			shared->writing = NULL;
1046*4882a593Smuzhiyun 		} else if (shared->erasing == chip && shared->writing != chip) {
1047*4882a593Smuzhiyun 			/*
1048*4882a593Smuzhiyun 			 * We own the ability to erase without the ability
1049*4882a593Smuzhiyun 			 * to write, which means the erase was suspended
1050*4882a593Smuzhiyun 			 * and some other partition is currently writing.
1051*4882a593Smuzhiyun 			 * Don't let the switch below mess things up since
1052*4882a593Smuzhiyun 			 * we don't have ownership to resume anything.
1053*4882a593Smuzhiyun 			 */
1054*4882a593Smuzhiyun 			mutex_unlock(&shared->lock);
1055*4882a593Smuzhiyun 			wake_up(&chip->wq);
1056*4882a593Smuzhiyun 			return;
1057*4882a593Smuzhiyun 		}
1058*4882a593Smuzhiyun 		mutex_unlock(&shared->lock);
1059*4882a593Smuzhiyun 	}
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 	switch(chip->oldstate) {
1062*4882a593Smuzhiyun 	case FL_ERASING:
1063*4882a593Smuzhiyun 		/* What if one interleaved chip has finished and the
1064*4882a593Smuzhiyun 		   other hasn't? The old code would leave the finished
1065*4882a593Smuzhiyun 		   one in READY mode. That's bad, and caused -EROFS
1066*4882a593Smuzhiyun 		   errors to be returned from do_erase_oneblock because
1067*4882a593Smuzhiyun 		   that's the only bit it checked for at the time.
1068*4882a593Smuzhiyun 		   As the state machine appears to explicitly allow
1069*4882a593Smuzhiyun 		   sending the 0x70 (Read Status) command to an erasing
1070*4882a593Smuzhiyun 		   chip and expecting it to be ignored, that's what we
1071*4882a593Smuzhiyun 		   do. */
1072*4882a593Smuzhiyun 		map_write(map, CMD(0xd0), chip->in_progress_block_addr);
1073*4882a593Smuzhiyun 		map_write(map, CMD(0x70), chip->in_progress_block_addr);
1074*4882a593Smuzhiyun 		chip->oldstate = FL_READY;
1075*4882a593Smuzhiyun 		chip->state = FL_ERASING;
1076*4882a593Smuzhiyun 		break;
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	case FL_XIP_WHILE_ERASING:
1079*4882a593Smuzhiyun 		chip->state = chip->oldstate;
1080*4882a593Smuzhiyun 		chip->oldstate = FL_READY;
1081*4882a593Smuzhiyun 		break;
1082*4882a593Smuzhiyun 
1083*4882a593Smuzhiyun 	case FL_READY:
1084*4882a593Smuzhiyun 	case FL_STATUS:
1085*4882a593Smuzhiyun 	case FL_JEDEC_QUERY:
1086*4882a593Smuzhiyun 		break;
1087*4882a593Smuzhiyun 	default:
1088*4882a593Smuzhiyun 		printk(KERN_ERR "%s: put_chip() called with oldstate %d!!\n", map->name, chip->oldstate);
1089*4882a593Smuzhiyun 	}
1090*4882a593Smuzhiyun 	wake_up(&chip->wq);
1091*4882a593Smuzhiyun }
1092*4882a593Smuzhiyun 
1093*4882a593Smuzhiyun #ifdef CONFIG_MTD_XIP
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun /*
1096*4882a593Smuzhiyun  * No interrupt what so ever can be serviced while the flash isn't in array
1097*4882a593Smuzhiyun  * mode.  This is ensured by the xip_disable() and xip_enable() functions
1098*4882a593Smuzhiyun  * enclosing any code path where the flash is known not to be in array mode.
1099*4882a593Smuzhiyun  * And within a XIP disabled code path, only functions marked with __xipram
1100*4882a593Smuzhiyun  * may be called and nothing else (it's a good thing to inspect generated
1101*4882a593Smuzhiyun  * assembly to make sure inline functions were actually inlined and that gcc
1102*4882a593Smuzhiyun  * didn't emit calls to its own support functions). Also configuring MTD CFI
1103*4882a593Smuzhiyun  * support to a single buswidth and a single interleave is also recommended.
1104*4882a593Smuzhiyun  */
1105*4882a593Smuzhiyun 
xip_disable(struct map_info * map,struct flchip * chip,unsigned long adr)1106*4882a593Smuzhiyun static void xip_disable(struct map_info *map, struct flchip *chip,
1107*4882a593Smuzhiyun 			unsigned long adr)
1108*4882a593Smuzhiyun {
1109*4882a593Smuzhiyun 	/* TODO: chips with no XIP use should ignore and return */
1110*4882a593Smuzhiyun 	(void) map_read(map, adr); /* ensure mmu mapping is up to date */
1111*4882a593Smuzhiyun 	local_irq_disable();
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun 
xip_enable(struct map_info * map,struct flchip * chip,unsigned long adr)1114*4882a593Smuzhiyun static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
1115*4882a593Smuzhiyun 				unsigned long adr)
1116*4882a593Smuzhiyun {
1117*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1118*4882a593Smuzhiyun 	if (chip->state != FL_POINT && chip->state != FL_READY) {
1119*4882a593Smuzhiyun 		map_write(map, CMD(0xff), adr);
1120*4882a593Smuzhiyun 		chip->state = FL_READY;
1121*4882a593Smuzhiyun 	}
1122*4882a593Smuzhiyun 	(void) map_read(map, adr);
1123*4882a593Smuzhiyun 	xip_iprefetch();
1124*4882a593Smuzhiyun 	local_irq_enable();
1125*4882a593Smuzhiyun }
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun /*
1128*4882a593Smuzhiyun  * When a delay is required for the flash operation to complete, the
1129*4882a593Smuzhiyun  * xip_wait_for_operation() function is polling for both the given timeout
1130*4882a593Smuzhiyun  * and pending (but still masked) hardware interrupts.  Whenever there is an
1131*4882a593Smuzhiyun  * interrupt pending then the flash erase or write operation is suspended,
1132*4882a593Smuzhiyun  * array mode restored and interrupts unmasked.  Task scheduling might also
1133*4882a593Smuzhiyun  * happen at that point.  The CPU eventually returns from the interrupt or
1134*4882a593Smuzhiyun  * the call to schedule() and the suspended flash operation is resumed for
1135*4882a593Smuzhiyun  * the remaining of the delay period.
1136*4882a593Smuzhiyun  *
1137*4882a593Smuzhiyun  * Warning: this function _will_ fool interrupt latency tracing tools.
1138*4882a593Smuzhiyun  */
1139*4882a593Smuzhiyun 
xip_wait_for_operation(struct map_info * map,struct flchip * chip,unsigned long adr,unsigned int chip_op_time_max)1140*4882a593Smuzhiyun static int __xipram xip_wait_for_operation(
1141*4882a593Smuzhiyun 		struct map_info *map, struct flchip *chip,
1142*4882a593Smuzhiyun 		unsigned long adr, unsigned int chip_op_time_max)
1143*4882a593Smuzhiyun {
1144*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1145*4882a593Smuzhiyun 	struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
1146*4882a593Smuzhiyun 	map_word status, OK = CMD(0x80);
1147*4882a593Smuzhiyun 	unsigned long usec, suspended, start, done;
1148*4882a593Smuzhiyun 	flstate_t oldstate, newstate;
1149*4882a593Smuzhiyun 
1150*4882a593Smuzhiyun        	start = xip_currtime();
1151*4882a593Smuzhiyun 	usec = chip_op_time_max;
1152*4882a593Smuzhiyun 	if (usec == 0)
1153*4882a593Smuzhiyun 		usec = 500000;
1154*4882a593Smuzhiyun 	done = 0;
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	do {
1157*4882a593Smuzhiyun 		cpu_relax();
1158*4882a593Smuzhiyun 		if (xip_irqpending() && cfip &&
1159*4882a593Smuzhiyun 		    ((chip->state == FL_ERASING && (cfip->FeatureSupport&2)) ||
1160*4882a593Smuzhiyun 		     (chip->state == FL_WRITING && (cfip->FeatureSupport&4))) &&
1161*4882a593Smuzhiyun 		    (cfi_interleave_is_1(cfi) || chip->oldstate == FL_READY)) {
1162*4882a593Smuzhiyun 			/*
1163*4882a593Smuzhiyun 			 * Let's suspend the erase or write operation when
1164*4882a593Smuzhiyun 			 * supported.  Note that we currently don't try to
1165*4882a593Smuzhiyun 			 * suspend interleaved chips if there is already
1166*4882a593Smuzhiyun 			 * another operation suspended (imagine what happens
1167*4882a593Smuzhiyun 			 * when one chip was already done with the current
1168*4882a593Smuzhiyun 			 * operation while another chip suspended it, then
1169*4882a593Smuzhiyun 			 * we resume the whole thing at once).  Yes, it
1170*4882a593Smuzhiyun 			 * can happen!
1171*4882a593Smuzhiyun 			 */
1172*4882a593Smuzhiyun 			usec -= done;
1173*4882a593Smuzhiyun 			map_write(map, CMD(0xb0), adr);
1174*4882a593Smuzhiyun 			map_write(map, CMD(0x70), adr);
1175*4882a593Smuzhiyun 			suspended = xip_currtime();
1176*4882a593Smuzhiyun 			do {
1177*4882a593Smuzhiyun 				if (xip_elapsed_since(suspended) > 100000) {
1178*4882a593Smuzhiyun 					/*
1179*4882a593Smuzhiyun 					 * The chip doesn't want to suspend
1180*4882a593Smuzhiyun 					 * after waiting for 100 msecs.
1181*4882a593Smuzhiyun 					 * This is a critical error but there
1182*4882a593Smuzhiyun 					 * is not much we can do here.
1183*4882a593Smuzhiyun 					 */
1184*4882a593Smuzhiyun 					return -EIO;
1185*4882a593Smuzhiyun 				}
1186*4882a593Smuzhiyun 				status = map_read(map, adr);
1187*4882a593Smuzhiyun 			} while (!map_word_andequal(map, status, OK, OK));
1188*4882a593Smuzhiyun 
1189*4882a593Smuzhiyun 			/* Suspend succeeded */
1190*4882a593Smuzhiyun 			oldstate = chip->state;
1191*4882a593Smuzhiyun 			if (oldstate == FL_ERASING) {
1192*4882a593Smuzhiyun 				if (!map_word_bitsset(map, status, CMD(0x40)))
1193*4882a593Smuzhiyun 					break;
1194*4882a593Smuzhiyun 				newstate = FL_XIP_WHILE_ERASING;
1195*4882a593Smuzhiyun 				chip->erase_suspended = 1;
1196*4882a593Smuzhiyun 			} else {
1197*4882a593Smuzhiyun 				if (!map_word_bitsset(map, status, CMD(0x04)))
1198*4882a593Smuzhiyun 					break;
1199*4882a593Smuzhiyun 				newstate = FL_XIP_WHILE_WRITING;
1200*4882a593Smuzhiyun 				chip->write_suspended = 1;
1201*4882a593Smuzhiyun 			}
1202*4882a593Smuzhiyun 			chip->state = newstate;
1203*4882a593Smuzhiyun 			map_write(map, CMD(0xff), adr);
1204*4882a593Smuzhiyun 			(void) map_read(map, adr);
1205*4882a593Smuzhiyun 			xip_iprefetch();
1206*4882a593Smuzhiyun 			local_irq_enable();
1207*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
1208*4882a593Smuzhiyun 			xip_iprefetch();
1209*4882a593Smuzhiyun 			cond_resched();
1210*4882a593Smuzhiyun 
1211*4882a593Smuzhiyun 			/*
1212*4882a593Smuzhiyun 			 * We're back.  However someone else might have
1213*4882a593Smuzhiyun 			 * decided to go write to the chip if we are in
1214*4882a593Smuzhiyun 			 * a suspended erase state.  If so let's wait
1215*4882a593Smuzhiyun 			 * until it's done.
1216*4882a593Smuzhiyun 			 */
1217*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
1218*4882a593Smuzhiyun 			while (chip->state != newstate) {
1219*4882a593Smuzhiyun 				DECLARE_WAITQUEUE(wait, current);
1220*4882a593Smuzhiyun 				set_current_state(TASK_UNINTERRUPTIBLE);
1221*4882a593Smuzhiyun 				add_wait_queue(&chip->wq, &wait);
1222*4882a593Smuzhiyun 				mutex_unlock(&chip->mutex);
1223*4882a593Smuzhiyun 				schedule();
1224*4882a593Smuzhiyun 				remove_wait_queue(&chip->wq, &wait);
1225*4882a593Smuzhiyun 				mutex_lock(&chip->mutex);
1226*4882a593Smuzhiyun 			}
1227*4882a593Smuzhiyun 			/* Disallow XIP again */
1228*4882a593Smuzhiyun 			local_irq_disable();
1229*4882a593Smuzhiyun 
1230*4882a593Smuzhiyun 			/* Resume the write or erase operation */
1231*4882a593Smuzhiyun 			map_write(map, CMD(0xd0), adr);
1232*4882a593Smuzhiyun 			map_write(map, CMD(0x70), adr);
1233*4882a593Smuzhiyun 			chip->state = oldstate;
1234*4882a593Smuzhiyun 			start = xip_currtime();
1235*4882a593Smuzhiyun 		} else if (usec >= 1000000/HZ) {
1236*4882a593Smuzhiyun 			/*
1237*4882a593Smuzhiyun 			 * Try to save on CPU power when waiting delay
1238*4882a593Smuzhiyun 			 * is at least a system timer tick period.
1239*4882a593Smuzhiyun 			 * No need to be extremely accurate here.
1240*4882a593Smuzhiyun 			 */
1241*4882a593Smuzhiyun 			xip_cpu_idle();
1242*4882a593Smuzhiyun 		}
1243*4882a593Smuzhiyun 		status = map_read(map, adr);
1244*4882a593Smuzhiyun 		done = xip_elapsed_since(start);
1245*4882a593Smuzhiyun 	} while (!map_word_andequal(map, status, OK, OK)
1246*4882a593Smuzhiyun 		 && done < usec);
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 	return (done >= usec) ? -ETIME : 0;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun /*
1252*4882a593Smuzhiyun  * The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
1253*4882a593Smuzhiyun  * the flash is actively programming or erasing since we have to poll for
1254*4882a593Smuzhiyun  * the operation to complete anyway.  We can't do that in a generic way with
1255*4882a593Smuzhiyun  * a XIP setup so do it before the actual flash operation in this case
1256*4882a593Smuzhiyun  * and stub it out from INVAL_CACHE_AND_WAIT.
1257*4882a593Smuzhiyun  */
1258*4882a593Smuzhiyun #define XIP_INVAL_CACHED_RANGE(map, from, size)  \
1259*4882a593Smuzhiyun 	INVALIDATE_CACHED_RANGE(map, from, size)
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun #define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, usec, usec_max) \
1262*4882a593Smuzhiyun 	xip_wait_for_operation(map, chip, cmd_adr, usec_max)
1263*4882a593Smuzhiyun 
1264*4882a593Smuzhiyun #else
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun #define xip_disable(map, chip, adr)
1267*4882a593Smuzhiyun #define xip_enable(map, chip, adr)
1268*4882a593Smuzhiyun #define XIP_INVAL_CACHED_RANGE(x...)
1269*4882a593Smuzhiyun #define INVAL_CACHE_AND_WAIT inval_cache_and_wait_for_operation
1270*4882a593Smuzhiyun 
inval_cache_and_wait_for_operation(struct map_info * map,struct flchip * chip,unsigned long cmd_adr,unsigned long inval_adr,int inval_len,unsigned int chip_op_time,unsigned int chip_op_time_max)1271*4882a593Smuzhiyun static int inval_cache_and_wait_for_operation(
1272*4882a593Smuzhiyun 		struct map_info *map, struct flchip *chip,
1273*4882a593Smuzhiyun 		unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
1274*4882a593Smuzhiyun 		unsigned int chip_op_time, unsigned int chip_op_time_max)
1275*4882a593Smuzhiyun {
1276*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1277*4882a593Smuzhiyun 	map_word status, status_OK = CMD(0x80);
1278*4882a593Smuzhiyun 	int chip_state = chip->state;
1279*4882a593Smuzhiyun 	unsigned int timeo, sleep_time, reset_timeo;
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
1282*4882a593Smuzhiyun 	if (inval_len)
1283*4882a593Smuzhiyun 		INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
1284*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
1285*4882a593Smuzhiyun 
1286*4882a593Smuzhiyun 	timeo = chip_op_time_max;
1287*4882a593Smuzhiyun 	if (!timeo)
1288*4882a593Smuzhiyun 		timeo = 500000;
1289*4882a593Smuzhiyun 	reset_timeo = timeo;
1290*4882a593Smuzhiyun 	sleep_time = chip_op_time / 2;
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 	for (;;) {
1293*4882a593Smuzhiyun 		if (chip->state != chip_state) {
1294*4882a593Smuzhiyun 			/* Someone's suspended the operation: sleep */
1295*4882a593Smuzhiyun 			DECLARE_WAITQUEUE(wait, current);
1296*4882a593Smuzhiyun 			set_current_state(TASK_UNINTERRUPTIBLE);
1297*4882a593Smuzhiyun 			add_wait_queue(&chip->wq, &wait);
1298*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
1299*4882a593Smuzhiyun 			schedule();
1300*4882a593Smuzhiyun 			remove_wait_queue(&chip->wq, &wait);
1301*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
1302*4882a593Smuzhiyun 			continue;
1303*4882a593Smuzhiyun 		}
1304*4882a593Smuzhiyun 
1305*4882a593Smuzhiyun 		status = map_read(map, cmd_adr);
1306*4882a593Smuzhiyun 		if (map_word_andequal(map, status, status_OK, status_OK))
1307*4882a593Smuzhiyun 			break;
1308*4882a593Smuzhiyun 
1309*4882a593Smuzhiyun 		if (chip->erase_suspended && chip_state == FL_ERASING)  {
1310*4882a593Smuzhiyun 			/* Erase suspend occurred while sleep: reset timeout */
1311*4882a593Smuzhiyun 			timeo = reset_timeo;
1312*4882a593Smuzhiyun 			chip->erase_suspended = 0;
1313*4882a593Smuzhiyun 		}
1314*4882a593Smuzhiyun 		if (chip->write_suspended && chip_state == FL_WRITING)  {
1315*4882a593Smuzhiyun 			/* Write suspend occurred while sleep: reset timeout */
1316*4882a593Smuzhiyun 			timeo = reset_timeo;
1317*4882a593Smuzhiyun 			chip->write_suspended = 0;
1318*4882a593Smuzhiyun 		}
1319*4882a593Smuzhiyun 		if (!timeo) {
1320*4882a593Smuzhiyun 			map_write(map, CMD(0x70), cmd_adr);
1321*4882a593Smuzhiyun 			chip->state = FL_STATUS;
1322*4882a593Smuzhiyun 			return -ETIME;
1323*4882a593Smuzhiyun 		}
1324*4882a593Smuzhiyun 
1325*4882a593Smuzhiyun 		/* OK Still waiting. Drop the lock, wait a while and retry. */
1326*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1327*4882a593Smuzhiyun 		if (sleep_time >= 1000000/HZ) {
1328*4882a593Smuzhiyun 			/*
1329*4882a593Smuzhiyun 			 * Half of the normal delay still remaining
1330*4882a593Smuzhiyun 			 * can be performed with a sleeping delay instead
1331*4882a593Smuzhiyun 			 * of busy waiting.
1332*4882a593Smuzhiyun 			 */
1333*4882a593Smuzhiyun 			msleep(sleep_time/1000);
1334*4882a593Smuzhiyun 			timeo -= sleep_time;
1335*4882a593Smuzhiyun 			sleep_time = 1000000/HZ;
1336*4882a593Smuzhiyun 		} else {
1337*4882a593Smuzhiyun 			udelay(1);
1338*4882a593Smuzhiyun 			cond_resched();
1339*4882a593Smuzhiyun 			timeo--;
1340*4882a593Smuzhiyun 		}
1341*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
1342*4882a593Smuzhiyun 	}
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun 	/* Done and happy. */
1345*4882a593Smuzhiyun  	chip->state = FL_STATUS;
1346*4882a593Smuzhiyun 	return 0;
1347*4882a593Smuzhiyun }
1348*4882a593Smuzhiyun 
1349*4882a593Smuzhiyun #endif
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun #define WAIT_TIMEOUT(map, chip, adr, udelay, udelay_max) \
1352*4882a593Smuzhiyun 	INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, udelay, udelay_max);
1353*4882a593Smuzhiyun 
1354*4882a593Smuzhiyun 
do_point_onechip(struct map_info * map,struct flchip * chip,loff_t adr,size_t len)1355*4882a593Smuzhiyun static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
1356*4882a593Smuzhiyun {
1357*4882a593Smuzhiyun 	unsigned long cmd_addr;
1358*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1359*4882a593Smuzhiyun 	int ret;
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 	adr += chip->start;
1362*4882a593Smuzhiyun 
1363*4882a593Smuzhiyun 	/* Ensure cmd read/writes are aligned. */
1364*4882a593Smuzhiyun 	cmd_addr = adr & ~(map_bankwidth(map)-1);
1365*4882a593Smuzhiyun 
1366*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
1367*4882a593Smuzhiyun 
1368*4882a593Smuzhiyun 	ret = get_chip(map, chip, cmd_addr, FL_POINT);
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 	if (!ret) {
1371*4882a593Smuzhiyun 		if (chip->state != FL_POINT && chip->state != FL_READY)
1372*4882a593Smuzhiyun 			map_write(map, CMD(0xff), cmd_addr);
1373*4882a593Smuzhiyun 
1374*4882a593Smuzhiyun 		chip->state = FL_POINT;
1375*4882a593Smuzhiyun 		chip->ref_point_counter++;
1376*4882a593Smuzhiyun 	}
1377*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun 	return ret;
1380*4882a593Smuzhiyun }
1381*4882a593Smuzhiyun 
cfi_intelext_point(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,void ** virt,resource_size_t * phys)1382*4882a593Smuzhiyun static int cfi_intelext_point(struct mtd_info *mtd, loff_t from, size_t len,
1383*4882a593Smuzhiyun 		size_t *retlen, void **virt, resource_size_t *phys)
1384*4882a593Smuzhiyun {
1385*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
1386*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1387*4882a593Smuzhiyun 	unsigned long ofs, last_end = 0;
1388*4882a593Smuzhiyun 	int chipnum;
1389*4882a593Smuzhiyun 	int ret;
1390*4882a593Smuzhiyun 
1391*4882a593Smuzhiyun 	if (!map->virt)
1392*4882a593Smuzhiyun 		return -EINVAL;
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	/* Now lock the chip(s) to POINT state */
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	/* ofs: offset within the first chip that the first read should start */
1397*4882a593Smuzhiyun 	chipnum = (from >> cfi->chipshift);
1398*4882a593Smuzhiyun 	ofs = from - (chipnum << cfi->chipshift);
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 	*virt = map->virt + cfi->chips[chipnum].start + ofs;
1401*4882a593Smuzhiyun 	if (phys)
1402*4882a593Smuzhiyun 		*phys = map->phys + cfi->chips[chipnum].start + ofs;
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun 	while (len) {
1405*4882a593Smuzhiyun 		unsigned long thislen;
1406*4882a593Smuzhiyun 
1407*4882a593Smuzhiyun 		if (chipnum >= cfi->numchips)
1408*4882a593Smuzhiyun 			break;
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 		/* We cannot point across chips that are virtually disjoint */
1411*4882a593Smuzhiyun 		if (!last_end)
1412*4882a593Smuzhiyun 			last_end = cfi->chips[chipnum].start;
1413*4882a593Smuzhiyun 		else if (cfi->chips[chipnum].start != last_end)
1414*4882a593Smuzhiyun 			break;
1415*4882a593Smuzhiyun 
1416*4882a593Smuzhiyun 		if ((len + ofs -1) >> cfi->chipshift)
1417*4882a593Smuzhiyun 			thislen = (1<<cfi->chipshift) - ofs;
1418*4882a593Smuzhiyun 		else
1419*4882a593Smuzhiyun 			thislen = len;
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun 		ret = do_point_onechip(map, &cfi->chips[chipnum], ofs, thislen);
1422*4882a593Smuzhiyun 		if (ret)
1423*4882a593Smuzhiyun 			break;
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 		*retlen += thislen;
1426*4882a593Smuzhiyun 		len -= thislen;
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun 		ofs = 0;
1429*4882a593Smuzhiyun 		last_end += 1 << cfi->chipshift;
1430*4882a593Smuzhiyun 		chipnum++;
1431*4882a593Smuzhiyun 	}
1432*4882a593Smuzhiyun 	return 0;
1433*4882a593Smuzhiyun }
1434*4882a593Smuzhiyun 
cfi_intelext_unpoint(struct mtd_info * mtd,loff_t from,size_t len)1435*4882a593Smuzhiyun static int cfi_intelext_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
1436*4882a593Smuzhiyun {
1437*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
1438*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1439*4882a593Smuzhiyun 	unsigned long ofs;
1440*4882a593Smuzhiyun 	int chipnum, err = 0;
1441*4882a593Smuzhiyun 
1442*4882a593Smuzhiyun 	/* Now unlock the chip(s) POINT state */
1443*4882a593Smuzhiyun 
1444*4882a593Smuzhiyun 	/* ofs: offset within the first chip that the first read should start */
1445*4882a593Smuzhiyun 	chipnum = (from >> cfi->chipshift);
1446*4882a593Smuzhiyun 	ofs = from - (chipnum <<  cfi->chipshift);
1447*4882a593Smuzhiyun 
1448*4882a593Smuzhiyun 	while (len && !err) {
1449*4882a593Smuzhiyun 		unsigned long thislen;
1450*4882a593Smuzhiyun 		struct flchip *chip;
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun 		chip = &cfi->chips[chipnum];
1453*4882a593Smuzhiyun 		if (chipnum >= cfi->numchips)
1454*4882a593Smuzhiyun 			break;
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 		if ((len + ofs -1) >> cfi->chipshift)
1457*4882a593Smuzhiyun 			thislen = (1<<cfi->chipshift) - ofs;
1458*4882a593Smuzhiyun 		else
1459*4882a593Smuzhiyun 			thislen = len;
1460*4882a593Smuzhiyun 
1461*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
1462*4882a593Smuzhiyun 		if (chip->state == FL_POINT) {
1463*4882a593Smuzhiyun 			chip->ref_point_counter--;
1464*4882a593Smuzhiyun 			if(chip->ref_point_counter == 0)
1465*4882a593Smuzhiyun 				chip->state = FL_READY;
1466*4882a593Smuzhiyun 		} else {
1467*4882a593Smuzhiyun 			printk(KERN_ERR "%s: Error: unpoint called on non pointed region\n", map->name);
1468*4882a593Smuzhiyun 			err = -EINVAL;
1469*4882a593Smuzhiyun 		}
1470*4882a593Smuzhiyun 
1471*4882a593Smuzhiyun 		put_chip(map, chip, chip->start);
1472*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 		len -= thislen;
1475*4882a593Smuzhiyun 		ofs = 0;
1476*4882a593Smuzhiyun 		chipnum++;
1477*4882a593Smuzhiyun 	}
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun 	return err;
1480*4882a593Smuzhiyun }
1481*4882a593Smuzhiyun 
do_read_onechip(struct map_info * map,struct flchip * chip,loff_t adr,size_t len,u_char * buf)1482*4882a593Smuzhiyun static inline int do_read_onechip(struct map_info *map, struct flchip *chip, loff_t adr, size_t len, u_char *buf)
1483*4882a593Smuzhiyun {
1484*4882a593Smuzhiyun 	unsigned long cmd_addr;
1485*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1486*4882a593Smuzhiyun 	int ret;
1487*4882a593Smuzhiyun 
1488*4882a593Smuzhiyun 	adr += chip->start;
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 	/* Ensure cmd read/writes are aligned. */
1491*4882a593Smuzhiyun 	cmd_addr = adr & ~(map_bankwidth(map)-1);
1492*4882a593Smuzhiyun 
1493*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
1494*4882a593Smuzhiyun 	ret = get_chip(map, chip, cmd_addr, FL_READY);
1495*4882a593Smuzhiyun 	if (ret) {
1496*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1497*4882a593Smuzhiyun 		return ret;
1498*4882a593Smuzhiyun 	}
1499*4882a593Smuzhiyun 
1500*4882a593Smuzhiyun 	if (chip->state != FL_POINT && chip->state != FL_READY) {
1501*4882a593Smuzhiyun 		map_write(map, CMD(0xff), cmd_addr);
1502*4882a593Smuzhiyun 
1503*4882a593Smuzhiyun 		chip->state = FL_READY;
1504*4882a593Smuzhiyun 	}
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	map_copy_from(map, buf, adr, len);
1507*4882a593Smuzhiyun 
1508*4882a593Smuzhiyun 	put_chip(map, chip, cmd_addr);
1509*4882a593Smuzhiyun 
1510*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
1511*4882a593Smuzhiyun 	return 0;
1512*4882a593Smuzhiyun }
1513*4882a593Smuzhiyun 
cfi_intelext_read(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)1514*4882a593Smuzhiyun static int cfi_intelext_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
1515*4882a593Smuzhiyun {
1516*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
1517*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1518*4882a593Smuzhiyun 	unsigned long ofs;
1519*4882a593Smuzhiyun 	int chipnum;
1520*4882a593Smuzhiyun 	int ret = 0;
1521*4882a593Smuzhiyun 
1522*4882a593Smuzhiyun 	/* ofs: offset within the first chip that the first read should start */
1523*4882a593Smuzhiyun 	chipnum = (from >> cfi->chipshift);
1524*4882a593Smuzhiyun 	ofs = from - (chipnum <<  cfi->chipshift);
1525*4882a593Smuzhiyun 
1526*4882a593Smuzhiyun 	while (len) {
1527*4882a593Smuzhiyun 		unsigned long thislen;
1528*4882a593Smuzhiyun 
1529*4882a593Smuzhiyun 		if (chipnum >= cfi->numchips)
1530*4882a593Smuzhiyun 			break;
1531*4882a593Smuzhiyun 
1532*4882a593Smuzhiyun 		if ((len + ofs -1) >> cfi->chipshift)
1533*4882a593Smuzhiyun 			thislen = (1<<cfi->chipshift) - ofs;
1534*4882a593Smuzhiyun 		else
1535*4882a593Smuzhiyun 			thislen = len;
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 		ret = do_read_onechip(map, &cfi->chips[chipnum], ofs, thislen, buf);
1538*4882a593Smuzhiyun 		if (ret)
1539*4882a593Smuzhiyun 			break;
1540*4882a593Smuzhiyun 
1541*4882a593Smuzhiyun 		*retlen += thislen;
1542*4882a593Smuzhiyun 		len -= thislen;
1543*4882a593Smuzhiyun 		buf += thislen;
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 		ofs = 0;
1546*4882a593Smuzhiyun 		chipnum++;
1547*4882a593Smuzhiyun 	}
1548*4882a593Smuzhiyun 	return ret;
1549*4882a593Smuzhiyun }
1550*4882a593Smuzhiyun 
do_write_oneword(struct map_info * map,struct flchip * chip,unsigned long adr,map_word datum,int mode)1551*4882a593Smuzhiyun static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
1552*4882a593Smuzhiyun 				     unsigned long adr, map_word datum, int mode)
1553*4882a593Smuzhiyun {
1554*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1555*4882a593Smuzhiyun 	map_word status, write_cmd;
1556*4882a593Smuzhiyun 	int ret;
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 	adr += chip->start;
1559*4882a593Smuzhiyun 
1560*4882a593Smuzhiyun 	switch (mode) {
1561*4882a593Smuzhiyun 	case FL_WRITING:
1562*4882a593Smuzhiyun 		write_cmd = (cfi->cfiq->P_ID != P_ID_INTEL_PERFORMANCE) ? CMD(0x40) : CMD(0x41);
1563*4882a593Smuzhiyun 		break;
1564*4882a593Smuzhiyun 	case FL_OTP_WRITE:
1565*4882a593Smuzhiyun 		write_cmd = CMD(0xc0);
1566*4882a593Smuzhiyun 		break;
1567*4882a593Smuzhiyun 	default:
1568*4882a593Smuzhiyun 		return -EINVAL;
1569*4882a593Smuzhiyun 	}
1570*4882a593Smuzhiyun 
1571*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
1572*4882a593Smuzhiyun 	ret = get_chip(map, chip, adr, mode);
1573*4882a593Smuzhiyun 	if (ret) {
1574*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1575*4882a593Smuzhiyun 		return ret;
1576*4882a593Smuzhiyun 	}
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun 	XIP_INVAL_CACHED_RANGE(map, adr, map_bankwidth(map));
1579*4882a593Smuzhiyun 	ENABLE_VPP(map);
1580*4882a593Smuzhiyun 	xip_disable(map, chip, adr);
1581*4882a593Smuzhiyun 	map_write(map, write_cmd, adr);
1582*4882a593Smuzhiyun 	map_write(map, datum, adr);
1583*4882a593Smuzhiyun 	chip->state = mode;
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 	ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1586*4882a593Smuzhiyun 				   adr, map_bankwidth(map),
1587*4882a593Smuzhiyun 				   chip->word_write_time,
1588*4882a593Smuzhiyun 				   chip->word_write_time_max);
1589*4882a593Smuzhiyun 	if (ret) {
1590*4882a593Smuzhiyun 		xip_enable(map, chip, adr);
1591*4882a593Smuzhiyun 		printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
1592*4882a593Smuzhiyun 		goto out;
1593*4882a593Smuzhiyun 	}
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 	/* check for errors */
1596*4882a593Smuzhiyun 	status = map_read(map, adr);
1597*4882a593Smuzhiyun 	if (map_word_bitsset(map, status, CMD(0x1a))) {
1598*4882a593Smuzhiyun 		unsigned long chipstatus = MERGESTATUS(status);
1599*4882a593Smuzhiyun 
1600*4882a593Smuzhiyun 		/* reset status */
1601*4882a593Smuzhiyun 		map_write(map, CMD(0x50), adr);
1602*4882a593Smuzhiyun 		map_write(map, CMD(0x70), adr);
1603*4882a593Smuzhiyun 		xip_enable(map, chip, adr);
1604*4882a593Smuzhiyun 
1605*4882a593Smuzhiyun 		if (chipstatus & 0x02) {
1606*4882a593Smuzhiyun 			ret = -EROFS;
1607*4882a593Smuzhiyun 		} else if (chipstatus & 0x08) {
1608*4882a593Smuzhiyun 			printk(KERN_ERR "%s: word write error (bad VPP)\n", map->name);
1609*4882a593Smuzhiyun 			ret = -EIO;
1610*4882a593Smuzhiyun 		} else {
1611*4882a593Smuzhiyun 			printk(KERN_ERR "%s: word write error (status 0x%lx)\n", map->name, chipstatus);
1612*4882a593Smuzhiyun 			ret = -EINVAL;
1613*4882a593Smuzhiyun 		}
1614*4882a593Smuzhiyun 
1615*4882a593Smuzhiyun 		goto out;
1616*4882a593Smuzhiyun 	}
1617*4882a593Smuzhiyun 
1618*4882a593Smuzhiyun 	xip_enable(map, chip, adr);
1619*4882a593Smuzhiyun  out:	DISABLE_VPP(map);
1620*4882a593Smuzhiyun 	put_chip(map, chip, adr);
1621*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
1622*4882a593Smuzhiyun 	return ret;
1623*4882a593Smuzhiyun }
1624*4882a593Smuzhiyun 
1625*4882a593Smuzhiyun 
cfi_intelext_write_words(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)1626*4882a593Smuzhiyun static int cfi_intelext_write_words (struct mtd_info *mtd, loff_t to , size_t len, size_t *retlen, const u_char *buf)
1627*4882a593Smuzhiyun {
1628*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
1629*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1630*4882a593Smuzhiyun 	int ret;
1631*4882a593Smuzhiyun 	int chipnum;
1632*4882a593Smuzhiyun 	unsigned long ofs;
1633*4882a593Smuzhiyun 
1634*4882a593Smuzhiyun 	chipnum = to >> cfi->chipshift;
1635*4882a593Smuzhiyun 	ofs = to  - (chipnum << cfi->chipshift);
1636*4882a593Smuzhiyun 
1637*4882a593Smuzhiyun 	/* If it's not bus-aligned, do the first byte write */
1638*4882a593Smuzhiyun 	if (ofs & (map_bankwidth(map)-1)) {
1639*4882a593Smuzhiyun 		unsigned long bus_ofs = ofs & ~(map_bankwidth(map)-1);
1640*4882a593Smuzhiyun 		int gap = ofs - bus_ofs;
1641*4882a593Smuzhiyun 		int n;
1642*4882a593Smuzhiyun 		map_word datum;
1643*4882a593Smuzhiyun 
1644*4882a593Smuzhiyun 		n = min_t(int, len, map_bankwidth(map)-gap);
1645*4882a593Smuzhiyun 		datum = map_word_ff(map);
1646*4882a593Smuzhiyun 		datum = map_word_load_partial(map, datum, buf, gap, n);
1647*4882a593Smuzhiyun 
1648*4882a593Smuzhiyun 		ret = do_write_oneword(map, &cfi->chips[chipnum],
1649*4882a593Smuzhiyun 					       bus_ofs, datum, FL_WRITING);
1650*4882a593Smuzhiyun 		if (ret)
1651*4882a593Smuzhiyun 			return ret;
1652*4882a593Smuzhiyun 
1653*4882a593Smuzhiyun 		len -= n;
1654*4882a593Smuzhiyun 		ofs += n;
1655*4882a593Smuzhiyun 		buf += n;
1656*4882a593Smuzhiyun 		(*retlen) += n;
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun 		if (ofs >> cfi->chipshift) {
1659*4882a593Smuzhiyun 			chipnum ++;
1660*4882a593Smuzhiyun 			ofs = 0;
1661*4882a593Smuzhiyun 			if (chipnum == cfi->numchips)
1662*4882a593Smuzhiyun 				return 0;
1663*4882a593Smuzhiyun 		}
1664*4882a593Smuzhiyun 	}
1665*4882a593Smuzhiyun 
1666*4882a593Smuzhiyun 	while(len >= map_bankwidth(map)) {
1667*4882a593Smuzhiyun 		map_word datum = map_word_load(map, buf);
1668*4882a593Smuzhiyun 
1669*4882a593Smuzhiyun 		ret = do_write_oneword(map, &cfi->chips[chipnum],
1670*4882a593Smuzhiyun 				       ofs, datum, FL_WRITING);
1671*4882a593Smuzhiyun 		if (ret)
1672*4882a593Smuzhiyun 			return ret;
1673*4882a593Smuzhiyun 
1674*4882a593Smuzhiyun 		ofs += map_bankwidth(map);
1675*4882a593Smuzhiyun 		buf += map_bankwidth(map);
1676*4882a593Smuzhiyun 		(*retlen) += map_bankwidth(map);
1677*4882a593Smuzhiyun 		len -= map_bankwidth(map);
1678*4882a593Smuzhiyun 
1679*4882a593Smuzhiyun 		if (ofs >> cfi->chipshift) {
1680*4882a593Smuzhiyun 			chipnum ++;
1681*4882a593Smuzhiyun 			ofs = 0;
1682*4882a593Smuzhiyun 			if (chipnum == cfi->numchips)
1683*4882a593Smuzhiyun 				return 0;
1684*4882a593Smuzhiyun 		}
1685*4882a593Smuzhiyun 	}
1686*4882a593Smuzhiyun 
1687*4882a593Smuzhiyun 	if (len & (map_bankwidth(map)-1)) {
1688*4882a593Smuzhiyun 		map_word datum;
1689*4882a593Smuzhiyun 
1690*4882a593Smuzhiyun 		datum = map_word_ff(map);
1691*4882a593Smuzhiyun 		datum = map_word_load_partial(map, datum, buf, 0, len);
1692*4882a593Smuzhiyun 
1693*4882a593Smuzhiyun 		ret = do_write_oneword(map, &cfi->chips[chipnum],
1694*4882a593Smuzhiyun 				       ofs, datum, FL_WRITING);
1695*4882a593Smuzhiyun 		if (ret)
1696*4882a593Smuzhiyun 			return ret;
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun 		(*retlen) += len;
1699*4882a593Smuzhiyun 	}
1700*4882a593Smuzhiyun 
1701*4882a593Smuzhiyun 	return 0;
1702*4882a593Smuzhiyun }
1703*4882a593Smuzhiyun 
1704*4882a593Smuzhiyun 
do_write_buffer(struct map_info * map,struct flchip * chip,unsigned long adr,const struct kvec ** pvec,unsigned long * pvec_seek,int len)1705*4882a593Smuzhiyun static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
1706*4882a593Smuzhiyun 				    unsigned long adr, const struct kvec **pvec,
1707*4882a593Smuzhiyun 				    unsigned long *pvec_seek, int len)
1708*4882a593Smuzhiyun {
1709*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1710*4882a593Smuzhiyun 	map_word status, write_cmd, datum;
1711*4882a593Smuzhiyun 	unsigned long cmd_adr;
1712*4882a593Smuzhiyun 	int ret, wbufsize, word_gap, words;
1713*4882a593Smuzhiyun 	const struct kvec *vec;
1714*4882a593Smuzhiyun 	unsigned long vec_seek;
1715*4882a593Smuzhiyun 	unsigned long initial_adr;
1716*4882a593Smuzhiyun 	int initial_len = len;
1717*4882a593Smuzhiyun 
1718*4882a593Smuzhiyun 	wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1719*4882a593Smuzhiyun 	adr += chip->start;
1720*4882a593Smuzhiyun 	initial_adr = adr;
1721*4882a593Smuzhiyun 	cmd_adr = adr & ~(wbufsize-1);
1722*4882a593Smuzhiyun 
1723*4882a593Smuzhiyun 	/* Sharp LH28F640BF chips need the first address for the
1724*4882a593Smuzhiyun 	 * Page Buffer Program command. See Table 5 of
1725*4882a593Smuzhiyun 	 * LH28F320BF, LH28F640BF, LH28F128BF Series (Appendix FUM00701) */
1726*4882a593Smuzhiyun 	if (is_LH28F640BF(cfi))
1727*4882a593Smuzhiyun 		cmd_adr = adr;
1728*4882a593Smuzhiyun 
1729*4882a593Smuzhiyun 	/* Let's determine this according to the interleave only once */
1730*4882a593Smuzhiyun 	write_cmd = (cfi->cfiq->P_ID != P_ID_INTEL_PERFORMANCE) ? CMD(0xe8) : CMD(0xe9);
1731*4882a593Smuzhiyun 
1732*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
1733*4882a593Smuzhiyun 	ret = get_chip(map, chip, cmd_adr, FL_WRITING);
1734*4882a593Smuzhiyun 	if (ret) {
1735*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1736*4882a593Smuzhiyun 		return ret;
1737*4882a593Smuzhiyun 	}
1738*4882a593Smuzhiyun 
1739*4882a593Smuzhiyun 	XIP_INVAL_CACHED_RANGE(map, initial_adr, initial_len);
1740*4882a593Smuzhiyun 	ENABLE_VPP(map);
1741*4882a593Smuzhiyun 	xip_disable(map, chip, cmd_adr);
1742*4882a593Smuzhiyun 
1743*4882a593Smuzhiyun 	/* §4.8 of the 28FxxxJ3A datasheet says "Any time SR.4 and/or SR.5 is set
1744*4882a593Smuzhiyun 	   [...], the device will not accept any more Write to Buffer commands".
1745*4882a593Smuzhiyun 	   So we must check here and reset those bits if they're set. Otherwise
1746*4882a593Smuzhiyun 	   we're just pissing in the wind */
1747*4882a593Smuzhiyun 	if (chip->state != FL_STATUS) {
1748*4882a593Smuzhiyun 		map_write(map, CMD(0x70), cmd_adr);
1749*4882a593Smuzhiyun 		chip->state = FL_STATUS;
1750*4882a593Smuzhiyun 	}
1751*4882a593Smuzhiyun 	status = map_read(map, cmd_adr);
1752*4882a593Smuzhiyun 	if (map_word_bitsset(map, status, CMD(0x30))) {
1753*4882a593Smuzhiyun 		xip_enable(map, chip, cmd_adr);
1754*4882a593Smuzhiyun 		printk(KERN_WARNING "SR.4 or SR.5 bits set in buffer write (status %lx). Clearing.\n", status.x[0]);
1755*4882a593Smuzhiyun 		xip_disable(map, chip, cmd_adr);
1756*4882a593Smuzhiyun 		map_write(map, CMD(0x50), cmd_adr);
1757*4882a593Smuzhiyun 		map_write(map, CMD(0x70), cmd_adr);
1758*4882a593Smuzhiyun 	}
1759*4882a593Smuzhiyun 
1760*4882a593Smuzhiyun 	chip->state = FL_WRITING_TO_BUFFER;
1761*4882a593Smuzhiyun 	map_write(map, write_cmd, cmd_adr);
1762*4882a593Smuzhiyun 	ret = WAIT_TIMEOUT(map, chip, cmd_adr, 0, 0);
1763*4882a593Smuzhiyun 	if (ret) {
1764*4882a593Smuzhiyun 		/* Argh. Not ready for write to buffer */
1765*4882a593Smuzhiyun 		map_word Xstatus = map_read(map, cmd_adr);
1766*4882a593Smuzhiyun 		map_write(map, CMD(0x70), cmd_adr);
1767*4882a593Smuzhiyun 		chip->state = FL_STATUS;
1768*4882a593Smuzhiyun 		status = map_read(map, cmd_adr);
1769*4882a593Smuzhiyun 		map_write(map, CMD(0x50), cmd_adr);
1770*4882a593Smuzhiyun 		map_write(map, CMD(0x70), cmd_adr);
1771*4882a593Smuzhiyun 		xip_enable(map, chip, cmd_adr);
1772*4882a593Smuzhiyun 		printk(KERN_ERR "%s: Chip not ready for buffer write. Xstatus = %lx, status = %lx\n",
1773*4882a593Smuzhiyun 				map->name, Xstatus.x[0], status.x[0]);
1774*4882a593Smuzhiyun 		goto out;
1775*4882a593Smuzhiyun 	}
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 	/* Figure out the number of words to write */
1778*4882a593Smuzhiyun 	word_gap = (-adr & (map_bankwidth(map)-1));
1779*4882a593Smuzhiyun 	words = DIV_ROUND_UP(len - word_gap, map_bankwidth(map));
1780*4882a593Smuzhiyun 	if (!word_gap) {
1781*4882a593Smuzhiyun 		words--;
1782*4882a593Smuzhiyun 	} else {
1783*4882a593Smuzhiyun 		word_gap = map_bankwidth(map) - word_gap;
1784*4882a593Smuzhiyun 		adr -= word_gap;
1785*4882a593Smuzhiyun 		datum = map_word_ff(map);
1786*4882a593Smuzhiyun 	}
1787*4882a593Smuzhiyun 
1788*4882a593Smuzhiyun 	/* Write length of data to come */
1789*4882a593Smuzhiyun 	map_write(map, CMD(words), cmd_adr );
1790*4882a593Smuzhiyun 
1791*4882a593Smuzhiyun 	/* Write data */
1792*4882a593Smuzhiyun 	vec = *pvec;
1793*4882a593Smuzhiyun 	vec_seek = *pvec_seek;
1794*4882a593Smuzhiyun 	do {
1795*4882a593Smuzhiyun 		int n = map_bankwidth(map) - word_gap;
1796*4882a593Smuzhiyun 		if (n > vec->iov_len - vec_seek)
1797*4882a593Smuzhiyun 			n = vec->iov_len - vec_seek;
1798*4882a593Smuzhiyun 		if (n > len)
1799*4882a593Smuzhiyun 			n = len;
1800*4882a593Smuzhiyun 
1801*4882a593Smuzhiyun 		if (!word_gap && len < map_bankwidth(map))
1802*4882a593Smuzhiyun 			datum = map_word_ff(map);
1803*4882a593Smuzhiyun 
1804*4882a593Smuzhiyun 		datum = map_word_load_partial(map, datum,
1805*4882a593Smuzhiyun 					      vec->iov_base + vec_seek,
1806*4882a593Smuzhiyun 					      word_gap, n);
1807*4882a593Smuzhiyun 
1808*4882a593Smuzhiyun 		len -= n;
1809*4882a593Smuzhiyun 		word_gap += n;
1810*4882a593Smuzhiyun 		if (!len || word_gap == map_bankwidth(map)) {
1811*4882a593Smuzhiyun 			map_write(map, datum, adr);
1812*4882a593Smuzhiyun 			adr += map_bankwidth(map);
1813*4882a593Smuzhiyun 			word_gap = 0;
1814*4882a593Smuzhiyun 		}
1815*4882a593Smuzhiyun 
1816*4882a593Smuzhiyun 		vec_seek += n;
1817*4882a593Smuzhiyun 		if (vec_seek == vec->iov_len) {
1818*4882a593Smuzhiyun 			vec++;
1819*4882a593Smuzhiyun 			vec_seek = 0;
1820*4882a593Smuzhiyun 		}
1821*4882a593Smuzhiyun 	} while (len);
1822*4882a593Smuzhiyun 	*pvec = vec;
1823*4882a593Smuzhiyun 	*pvec_seek = vec_seek;
1824*4882a593Smuzhiyun 
1825*4882a593Smuzhiyun 	/* GO GO GO */
1826*4882a593Smuzhiyun 	map_write(map, CMD(0xd0), cmd_adr);
1827*4882a593Smuzhiyun 	chip->state = FL_WRITING;
1828*4882a593Smuzhiyun 
1829*4882a593Smuzhiyun 	ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
1830*4882a593Smuzhiyun 				   initial_adr, initial_len,
1831*4882a593Smuzhiyun 				   chip->buffer_write_time,
1832*4882a593Smuzhiyun 				   chip->buffer_write_time_max);
1833*4882a593Smuzhiyun 	if (ret) {
1834*4882a593Smuzhiyun 		map_write(map, CMD(0x70), cmd_adr);
1835*4882a593Smuzhiyun 		chip->state = FL_STATUS;
1836*4882a593Smuzhiyun 		xip_enable(map, chip, cmd_adr);
1837*4882a593Smuzhiyun 		printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name);
1838*4882a593Smuzhiyun 		goto out;
1839*4882a593Smuzhiyun 	}
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 	/* check for errors */
1842*4882a593Smuzhiyun 	status = map_read(map, cmd_adr);
1843*4882a593Smuzhiyun 	if (map_word_bitsset(map, status, CMD(0x1a))) {
1844*4882a593Smuzhiyun 		unsigned long chipstatus = MERGESTATUS(status);
1845*4882a593Smuzhiyun 
1846*4882a593Smuzhiyun 		/* reset status */
1847*4882a593Smuzhiyun 		map_write(map, CMD(0x50), cmd_adr);
1848*4882a593Smuzhiyun 		map_write(map, CMD(0x70), cmd_adr);
1849*4882a593Smuzhiyun 		xip_enable(map, chip, cmd_adr);
1850*4882a593Smuzhiyun 
1851*4882a593Smuzhiyun 		if (chipstatus & 0x02) {
1852*4882a593Smuzhiyun 			ret = -EROFS;
1853*4882a593Smuzhiyun 		} else if (chipstatus & 0x08) {
1854*4882a593Smuzhiyun 			printk(KERN_ERR "%s: buffer write error (bad VPP)\n", map->name);
1855*4882a593Smuzhiyun 			ret = -EIO;
1856*4882a593Smuzhiyun 		} else {
1857*4882a593Smuzhiyun 			printk(KERN_ERR "%s: buffer write error (status 0x%lx)\n", map->name, chipstatus);
1858*4882a593Smuzhiyun 			ret = -EINVAL;
1859*4882a593Smuzhiyun 		}
1860*4882a593Smuzhiyun 
1861*4882a593Smuzhiyun 		goto out;
1862*4882a593Smuzhiyun 	}
1863*4882a593Smuzhiyun 
1864*4882a593Smuzhiyun 	xip_enable(map, chip, cmd_adr);
1865*4882a593Smuzhiyun  out:	DISABLE_VPP(map);
1866*4882a593Smuzhiyun 	put_chip(map, chip, cmd_adr);
1867*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
1868*4882a593Smuzhiyun 	return ret;
1869*4882a593Smuzhiyun }
1870*4882a593Smuzhiyun 
cfi_intelext_writev(struct mtd_info * mtd,const struct kvec * vecs,unsigned long count,loff_t to,size_t * retlen)1871*4882a593Smuzhiyun static int cfi_intelext_writev (struct mtd_info *mtd, const struct kvec *vecs,
1872*4882a593Smuzhiyun 				unsigned long count, loff_t to, size_t *retlen)
1873*4882a593Smuzhiyun {
1874*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
1875*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1876*4882a593Smuzhiyun 	int wbufsize = cfi_interleave(cfi) << cfi->cfiq->MaxBufWriteSize;
1877*4882a593Smuzhiyun 	int ret;
1878*4882a593Smuzhiyun 	int chipnum;
1879*4882a593Smuzhiyun 	unsigned long ofs, vec_seek, i;
1880*4882a593Smuzhiyun 	size_t len = 0;
1881*4882a593Smuzhiyun 
1882*4882a593Smuzhiyun 	for (i = 0; i < count; i++)
1883*4882a593Smuzhiyun 		len += vecs[i].iov_len;
1884*4882a593Smuzhiyun 
1885*4882a593Smuzhiyun 	if (!len)
1886*4882a593Smuzhiyun 		return 0;
1887*4882a593Smuzhiyun 
1888*4882a593Smuzhiyun 	chipnum = to >> cfi->chipshift;
1889*4882a593Smuzhiyun 	ofs = to - (chipnum << cfi->chipshift);
1890*4882a593Smuzhiyun 	vec_seek = 0;
1891*4882a593Smuzhiyun 
1892*4882a593Smuzhiyun 	do {
1893*4882a593Smuzhiyun 		/* We must not cross write block boundaries */
1894*4882a593Smuzhiyun 		int size = wbufsize - (ofs & (wbufsize-1));
1895*4882a593Smuzhiyun 
1896*4882a593Smuzhiyun 		if (size > len)
1897*4882a593Smuzhiyun 			size = len;
1898*4882a593Smuzhiyun 		ret = do_write_buffer(map, &cfi->chips[chipnum],
1899*4882a593Smuzhiyun 				      ofs, &vecs, &vec_seek, size);
1900*4882a593Smuzhiyun 		if (ret)
1901*4882a593Smuzhiyun 			return ret;
1902*4882a593Smuzhiyun 
1903*4882a593Smuzhiyun 		ofs += size;
1904*4882a593Smuzhiyun 		(*retlen) += size;
1905*4882a593Smuzhiyun 		len -= size;
1906*4882a593Smuzhiyun 
1907*4882a593Smuzhiyun 		if (ofs >> cfi->chipshift) {
1908*4882a593Smuzhiyun 			chipnum ++;
1909*4882a593Smuzhiyun 			ofs = 0;
1910*4882a593Smuzhiyun 			if (chipnum == cfi->numchips)
1911*4882a593Smuzhiyun 				return 0;
1912*4882a593Smuzhiyun 		}
1913*4882a593Smuzhiyun 
1914*4882a593Smuzhiyun 		/* Be nice and reschedule with the chip in a usable state for other
1915*4882a593Smuzhiyun 		   processes. */
1916*4882a593Smuzhiyun 		cond_resched();
1917*4882a593Smuzhiyun 
1918*4882a593Smuzhiyun 	} while (len);
1919*4882a593Smuzhiyun 
1920*4882a593Smuzhiyun 	return 0;
1921*4882a593Smuzhiyun }
1922*4882a593Smuzhiyun 
cfi_intelext_write_buffers(struct mtd_info * mtd,loff_t to,size_t len,size_t * retlen,const u_char * buf)1923*4882a593Smuzhiyun static int cfi_intelext_write_buffers (struct mtd_info *mtd, loff_t to,
1924*4882a593Smuzhiyun 				       size_t len, size_t *retlen, const u_char *buf)
1925*4882a593Smuzhiyun {
1926*4882a593Smuzhiyun 	struct kvec vec;
1927*4882a593Smuzhiyun 
1928*4882a593Smuzhiyun 	vec.iov_base = (void *) buf;
1929*4882a593Smuzhiyun 	vec.iov_len = len;
1930*4882a593Smuzhiyun 
1931*4882a593Smuzhiyun 	return cfi_intelext_writev(mtd, &vec, 1, to, retlen);
1932*4882a593Smuzhiyun }
1933*4882a593Smuzhiyun 
do_erase_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr,int len,void * thunk)1934*4882a593Smuzhiyun static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
1935*4882a593Smuzhiyun 				      unsigned long adr, int len, void *thunk)
1936*4882a593Smuzhiyun {
1937*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
1938*4882a593Smuzhiyun 	map_word status;
1939*4882a593Smuzhiyun 	int retries = 3;
1940*4882a593Smuzhiyun 	int ret;
1941*4882a593Smuzhiyun 
1942*4882a593Smuzhiyun 	adr += chip->start;
1943*4882a593Smuzhiyun 
1944*4882a593Smuzhiyun  retry:
1945*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
1946*4882a593Smuzhiyun 	ret = get_chip(map, chip, adr, FL_ERASING);
1947*4882a593Smuzhiyun 	if (ret) {
1948*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1949*4882a593Smuzhiyun 		return ret;
1950*4882a593Smuzhiyun 	}
1951*4882a593Smuzhiyun 
1952*4882a593Smuzhiyun 	XIP_INVAL_CACHED_RANGE(map, adr, len);
1953*4882a593Smuzhiyun 	ENABLE_VPP(map);
1954*4882a593Smuzhiyun 	xip_disable(map, chip, adr);
1955*4882a593Smuzhiyun 
1956*4882a593Smuzhiyun 	/* Clear the status register first */
1957*4882a593Smuzhiyun 	map_write(map, CMD(0x50), adr);
1958*4882a593Smuzhiyun 
1959*4882a593Smuzhiyun 	/* Now erase */
1960*4882a593Smuzhiyun 	map_write(map, CMD(0x20), adr);
1961*4882a593Smuzhiyun 	map_write(map, CMD(0xD0), adr);
1962*4882a593Smuzhiyun 	chip->state = FL_ERASING;
1963*4882a593Smuzhiyun 	chip->erase_suspended = 0;
1964*4882a593Smuzhiyun 	chip->in_progress_block_addr = adr;
1965*4882a593Smuzhiyun 	chip->in_progress_block_mask = ~(len - 1);
1966*4882a593Smuzhiyun 
1967*4882a593Smuzhiyun 	ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
1968*4882a593Smuzhiyun 				   adr, len,
1969*4882a593Smuzhiyun 				   chip->erase_time,
1970*4882a593Smuzhiyun 				   chip->erase_time_max);
1971*4882a593Smuzhiyun 	if (ret) {
1972*4882a593Smuzhiyun 		map_write(map, CMD(0x70), adr);
1973*4882a593Smuzhiyun 		chip->state = FL_STATUS;
1974*4882a593Smuzhiyun 		xip_enable(map, chip, adr);
1975*4882a593Smuzhiyun 		printk(KERN_ERR "%s: block erase error: (status timeout)\n", map->name);
1976*4882a593Smuzhiyun 		goto out;
1977*4882a593Smuzhiyun 	}
1978*4882a593Smuzhiyun 
1979*4882a593Smuzhiyun 	/* We've broken this before. It doesn't hurt to be safe */
1980*4882a593Smuzhiyun 	map_write(map, CMD(0x70), adr);
1981*4882a593Smuzhiyun 	chip->state = FL_STATUS;
1982*4882a593Smuzhiyun 	status = map_read(map, adr);
1983*4882a593Smuzhiyun 
1984*4882a593Smuzhiyun 	/* check for errors */
1985*4882a593Smuzhiyun 	if (map_word_bitsset(map, status, CMD(0x3a))) {
1986*4882a593Smuzhiyun 		unsigned long chipstatus = MERGESTATUS(status);
1987*4882a593Smuzhiyun 
1988*4882a593Smuzhiyun 		/* Reset the error bits */
1989*4882a593Smuzhiyun 		map_write(map, CMD(0x50), adr);
1990*4882a593Smuzhiyun 		map_write(map, CMD(0x70), adr);
1991*4882a593Smuzhiyun 		xip_enable(map, chip, adr);
1992*4882a593Smuzhiyun 
1993*4882a593Smuzhiyun 		if ((chipstatus & 0x30) == 0x30) {
1994*4882a593Smuzhiyun 			printk(KERN_ERR "%s: block erase error: (bad command sequence, status 0x%lx)\n", map->name, chipstatus);
1995*4882a593Smuzhiyun 			ret = -EINVAL;
1996*4882a593Smuzhiyun 		} else if (chipstatus & 0x02) {
1997*4882a593Smuzhiyun 			/* Protection bit set */
1998*4882a593Smuzhiyun 			ret = -EROFS;
1999*4882a593Smuzhiyun 		} else if (chipstatus & 0x8) {
2000*4882a593Smuzhiyun 			/* Voltage */
2001*4882a593Smuzhiyun 			printk(KERN_ERR "%s: block erase error: (bad VPP)\n", map->name);
2002*4882a593Smuzhiyun 			ret = -EIO;
2003*4882a593Smuzhiyun 		} else if (chipstatus & 0x20 && retries--) {
2004*4882a593Smuzhiyun 			printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus);
2005*4882a593Smuzhiyun 			DISABLE_VPP(map);
2006*4882a593Smuzhiyun 			put_chip(map, chip, adr);
2007*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
2008*4882a593Smuzhiyun 			goto retry;
2009*4882a593Smuzhiyun 		} else {
2010*4882a593Smuzhiyun 			printk(KERN_ERR "%s: block erase failed at 0x%08lx (status 0x%lx)\n", map->name, adr, chipstatus);
2011*4882a593Smuzhiyun 			ret = -EIO;
2012*4882a593Smuzhiyun 		}
2013*4882a593Smuzhiyun 
2014*4882a593Smuzhiyun 		goto out;
2015*4882a593Smuzhiyun 	}
2016*4882a593Smuzhiyun 
2017*4882a593Smuzhiyun 	xip_enable(map, chip, adr);
2018*4882a593Smuzhiyun  out:	DISABLE_VPP(map);
2019*4882a593Smuzhiyun 	put_chip(map, chip, adr);
2020*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
2021*4882a593Smuzhiyun 	return ret;
2022*4882a593Smuzhiyun }
2023*4882a593Smuzhiyun 
cfi_intelext_erase_varsize(struct mtd_info * mtd,struct erase_info * instr)2024*4882a593Smuzhiyun static int cfi_intelext_erase_varsize(struct mtd_info *mtd, struct erase_info *instr)
2025*4882a593Smuzhiyun {
2026*4882a593Smuzhiyun 	return cfi_varsize_frob(mtd, do_erase_oneblock, instr->addr,
2027*4882a593Smuzhiyun 				instr->len, NULL);
2028*4882a593Smuzhiyun }
2029*4882a593Smuzhiyun 
cfi_intelext_sync(struct mtd_info * mtd)2030*4882a593Smuzhiyun static void cfi_intelext_sync (struct mtd_info *mtd)
2031*4882a593Smuzhiyun {
2032*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
2033*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2034*4882a593Smuzhiyun 	int i;
2035*4882a593Smuzhiyun 	struct flchip *chip;
2036*4882a593Smuzhiyun 	int ret = 0;
2037*4882a593Smuzhiyun 
2038*4882a593Smuzhiyun 	for (i=0; !ret && i<cfi->numchips; i++) {
2039*4882a593Smuzhiyun 		chip = &cfi->chips[i];
2040*4882a593Smuzhiyun 
2041*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
2042*4882a593Smuzhiyun 		ret = get_chip(map, chip, chip->start, FL_SYNCING);
2043*4882a593Smuzhiyun 
2044*4882a593Smuzhiyun 		if (!ret) {
2045*4882a593Smuzhiyun 			chip->oldstate = chip->state;
2046*4882a593Smuzhiyun 			chip->state = FL_SYNCING;
2047*4882a593Smuzhiyun 			/* No need to wake_up() on this state change -
2048*4882a593Smuzhiyun 			 * as the whole point is that nobody can do anything
2049*4882a593Smuzhiyun 			 * with the chip now anyway.
2050*4882a593Smuzhiyun 			 */
2051*4882a593Smuzhiyun 		}
2052*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2053*4882a593Smuzhiyun 	}
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun 	/* Unlock the chips again */
2056*4882a593Smuzhiyun 
2057*4882a593Smuzhiyun 	for (i--; i >=0; i--) {
2058*4882a593Smuzhiyun 		chip = &cfi->chips[i];
2059*4882a593Smuzhiyun 
2060*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
2061*4882a593Smuzhiyun 
2062*4882a593Smuzhiyun 		if (chip->state == FL_SYNCING) {
2063*4882a593Smuzhiyun 			chip->state = chip->oldstate;
2064*4882a593Smuzhiyun 			chip->oldstate = FL_READY;
2065*4882a593Smuzhiyun 			wake_up(&chip->wq);
2066*4882a593Smuzhiyun 		}
2067*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2068*4882a593Smuzhiyun 	}
2069*4882a593Smuzhiyun }
2070*4882a593Smuzhiyun 
do_getlockstatus_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr,int len,void * thunk)2071*4882a593Smuzhiyun static int __xipram do_getlockstatus_oneblock(struct map_info *map,
2072*4882a593Smuzhiyun 						struct flchip *chip,
2073*4882a593Smuzhiyun 						unsigned long adr,
2074*4882a593Smuzhiyun 						int len, void *thunk)
2075*4882a593Smuzhiyun {
2076*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2077*4882a593Smuzhiyun 	int status, ofs_factor = cfi->interleave * cfi->device_type;
2078*4882a593Smuzhiyun 
2079*4882a593Smuzhiyun 	adr += chip->start;
2080*4882a593Smuzhiyun 	xip_disable(map, chip, adr+(2*ofs_factor));
2081*4882a593Smuzhiyun 	map_write(map, CMD(0x90), adr+(2*ofs_factor));
2082*4882a593Smuzhiyun 	chip->state = FL_JEDEC_QUERY;
2083*4882a593Smuzhiyun 	status = cfi_read_query(map, adr+(2*ofs_factor));
2084*4882a593Smuzhiyun 	xip_enable(map, chip, 0);
2085*4882a593Smuzhiyun 	return status;
2086*4882a593Smuzhiyun }
2087*4882a593Smuzhiyun 
2088*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
do_printlockstatus_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr,int len,void * thunk)2089*4882a593Smuzhiyun static int __xipram do_printlockstatus_oneblock(struct map_info *map,
2090*4882a593Smuzhiyun 						struct flchip *chip,
2091*4882a593Smuzhiyun 						unsigned long adr,
2092*4882a593Smuzhiyun 						int len, void *thunk)
2093*4882a593Smuzhiyun {
2094*4882a593Smuzhiyun 	printk(KERN_DEBUG "block status register for 0x%08lx is %x\n",
2095*4882a593Smuzhiyun 	       adr, do_getlockstatus_oneblock(map, chip, adr, len, thunk));
2096*4882a593Smuzhiyun 	return 0;
2097*4882a593Smuzhiyun }
2098*4882a593Smuzhiyun #endif
2099*4882a593Smuzhiyun 
2100*4882a593Smuzhiyun #define DO_XXLOCK_ONEBLOCK_LOCK		((void *) 1)
2101*4882a593Smuzhiyun #define DO_XXLOCK_ONEBLOCK_UNLOCK	((void *) 2)
2102*4882a593Smuzhiyun 
do_xxlock_oneblock(struct map_info * map,struct flchip * chip,unsigned long adr,int len,void * thunk)2103*4882a593Smuzhiyun static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip,
2104*4882a593Smuzhiyun 				       unsigned long adr, int len, void *thunk)
2105*4882a593Smuzhiyun {
2106*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2107*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2108*4882a593Smuzhiyun 	int mdelay;
2109*4882a593Smuzhiyun 	int ret;
2110*4882a593Smuzhiyun 
2111*4882a593Smuzhiyun 	adr += chip->start;
2112*4882a593Smuzhiyun 
2113*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
2114*4882a593Smuzhiyun 	ret = get_chip(map, chip, adr, FL_LOCKING);
2115*4882a593Smuzhiyun 	if (ret) {
2116*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2117*4882a593Smuzhiyun 		return ret;
2118*4882a593Smuzhiyun 	}
2119*4882a593Smuzhiyun 
2120*4882a593Smuzhiyun 	ENABLE_VPP(map);
2121*4882a593Smuzhiyun 	xip_disable(map, chip, adr);
2122*4882a593Smuzhiyun 
2123*4882a593Smuzhiyun 	map_write(map, CMD(0x60), adr);
2124*4882a593Smuzhiyun 	if (thunk == DO_XXLOCK_ONEBLOCK_LOCK) {
2125*4882a593Smuzhiyun 		map_write(map, CMD(0x01), adr);
2126*4882a593Smuzhiyun 		chip->state = FL_LOCKING;
2127*4882a593Smuzhiyun 	} else if (thunk == DO_XXLOCK_ONEBLOCK_UNLOCK) {
2128*4882a593Smuzhiyun 		map_write(map, CMD(0xD0), adr);
2129*4882a593Smuzhiyun 		chip->state = FL_UNLOCKING;
2130*4882a593Smuzhiyun 	} else
2131*4882a593Smuzhiyun 		BUG();
2132*4882a593Smuzhiyun 
2133*4882a593Smuzhiyun 	/*
2134*4882a593Smuzhiyun 	 * If Instant Individual Block Locking supported then no need
2135*4882a593Smuzhiyun 	 * to delay.
2136*4882a593Smuzhiyun 	 */
2137*4882a593Smuzhiyun 	/*
2138*4882a593Smuzhiyun 	 * Unlocking may take up to 1.4 seconds on some Intel flashes. So
2139*4882a593Smuzhiyun 	 * lets use a max of 1.5 seconds (1500ms) as timeout.
2140*4882a593Smuzhiyun 	 *
2141*4882a593Smuzhiyun 	 * See "Clear Block Lock-Bits Time" on page 40 in
2142*4882a593Smuzhiyun 	 * "3 Volt Intel StrataFlash Memory" 28F128J3,28F640J3,28F320J3 manual
2143*4882a593Smuzhiyun 	 * from February 2003
2144*4882a593Smuzhiyun 	 */
2145*4882a593Smuzhiyun 	mdelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1500 : 0;
2146*4882a593Smuzhiyun 
2147*4882a593Smuzhiyun 	ret = WAIT_TIMEOUT(map, chip, adr, mdelay, mdelay * 1000);
2148*4882a593Smuzhiyun 	if (ret) {
2149*4882a593Smuzhiyun 		map_write(map, CMD(0x70), adr);
2150*4882a593Smuzhiyun 		chip->state = FL_STATUS;
2151*4882a593Smuzhiyun 		xip_enable(map, chip, adr);
2152*4882a593Smuzhiyun 		printk(KERN_ERR "%s: block unlock error: (status timeout)\n", map->name);
2153*4882a593Smuzhiyun 		goto out;
2154*4882a593Smuzhiyun 	}
2155*4882a593Smuzhiyun 
2156*4882a593Smuzhiyun 	xip_enable(map, chip, adr);
2157*4882a593Smuzhiyun  out:	DISABLE_VPP(map);
2158*4882a593Smuzhiyun 	put_chip(map, chip, adr);
2159*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
2160*4882a593Smuzhiyun 	return ret;
2161*4882a593Smuzhiyun }
2162*4882a593Smuzhiyun 
cfi_intelext_lock(struct mtd_info * mtd,loff_t ofs,uint64_t len)2163*4882a593Smuzhiyun static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2164*4882a593Smuzhiyun {
2165*4882a593Smuzhiyun 	int ret;
2166*4882a593Smuzhiyun 
2167*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
2168*4882a593Smuzhiyun 	printk(KERN_DEBUG "%s: lock status before, ofs=0x%08llx, len=0x%08X\n",
2169*4882a593Smuzhiyun 	       __func__, ofs, len);
2170*4882a593Smuzhiyun 	cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
2171*4882a593Smuzhiyun 		ofs, len, NULL);
2172*4882a593Smuzhiyun #endif
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun 	ret = cfi_varsize_frob(mtd, do_xxlock_oneblock,
2175*4882a593Smuzhiyun 		ofs, len, DO_XXLOCK_ONEBLOCK_LOCK);
2176*4882a593Smuzhiyun 
2177*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
2178*4882a593Smuzhiyun 	printk(KERN_DEBUG "%s: lock status after, ret=%d\n",
2179*4882a593Smuzhiyun 	       __func__, ret);
2180*4882a593Smuzhiyun 	cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
2181*4882a593Smuzhiyun 		ofs, len, NULL);
2182*4882a593Smuzhiyun #endif
2183*4882a593Smuzhiyun 
2184*4882a593Smuzhiyun 	return ret;
2185*4882a593Smuzhiyun }
2186*4882a593Smuzhiyun 
cfi_intelext_unlock(struct mtd_info * mtd,loff_t ofs,uint64_t len)2187*4882a593Smuzhiyun static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len)
2188*4882a593Smuzhiyun {
2189*4882a593Smuzhiyun 	int ret;
2190*4882a593Smuzhiyun 
2191*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
2192*4882a593Smuzhiyun 	printk(KERN_DEBUG "%s: lock status before, ofs=0x%08llx, len=0x%08X\n",
2193*4882a593Smuzhiyun 	       __func__, ofs, len);
2194*4882a593Smuzhiyun 	cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
2195*4882a593Smuzhiyun 		ofs, len, NULL);
2196*4882a593Smuzhiyun #endif
2197*4882a593Smuzhiyun 
2198*4882a593Smuzhiyun 	ret = cfi_varsize_frob(mtd, do_xxlock_oneblock,
2199*4882a593Smuzhiyun 					ofs, len, DO_XXLOCK_ONEBLOCK_UNLOCK);
2200*4882a593Smuzhiyun 
2201*4882a593Smuzhiyun #ifdef DEBUG_LOCK_BITS
2202*4882a593Smuzhiyun 	printk(KERN_DEBUG "%s: lock status after, ret=%d\n",
2203*4882a593Smuzhiyun 	       __func__, ret);
2204*4882a593Smuzhiyun 	cfi_varsize_frob(mtd, do_printlockstatus_oneblock,
2205*4882a593Smuzhiyun 		ofs, len, NULL);
2206*4882a593Smuzhiyun #endif
2207*4882a593Smuzhiyun 
2208*4882a593Smuzhiyun 	return ret;
2209*4882a593Smuzhiyun }
2210*4882a593Smuzhiyun 
cfi_intelext_is_locked(struct mtd_info * mtd,loff_t ofs,uint64_t len)2211*4882a593Smuzhiyun static int cfi_intelext_is_locked(struct mtd_info *mtd, loff_t ofs,
2212*4882a593Smuzhiyun 				  uint64_t len)
2213*4882a593Smuzhiyun {
2214*4882a593Smuzhiyun 	return cfi_varsize_frob(mtd, do_getlockstatus_oneblock,
2215*4882a593Smuzhiyun 				ofs, len, NULL) ? 1 : 0;
2216*4882a593Smuzhiyun }
2217*4882a593Smuzhiyun 
2218*4882a593Smuzhiyun #ifdef CONFIG_MTD_OTP
2219*4882a593Smuzhiyun 
2220*4882a593Smuzhiyun typedef int (*otp_op_t)(struct map_info *map, struct flchip *chip,
2221*4882a593Smuzhiyun 			u_long data_offset, u_char *buf, u_int size,
2222*4882a593Smuzhiyun 			u_long prot_offset, u_int groupno, u_int groupsize);
2223*4882a593Smuzhiyun 
2224*4882a593Smuzhiyun static int __xipram
do_otp_read(struct map_info * map,struct flchip * chip,u_long offset,u_char * buf,u_int size,u_long prot,u_int grpno,u_int grpsz)2225*4882a593Smuzhiyun do_otp_read(struct map_info *map, struct flchip *chip, u_long offset,
2226*4882a593Smuzhiyun 	    u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2227*4882a593Smuzhiyun {
2228*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2229*4882a593Smuzhiyun 	int ret;
2230*4882a593Smuzhiyun 
2231*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
2232*4882a593Smuzhiyun 	ret = get_chip(map, chip, chip->start, FL_JEDEC_QUERY);
2233*4882a593Smuzhiyun 	if (ret) {
2234*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2235*4882a593Smuzhiyun 		return ret;
2236*4882a593Smuzhiyun 	}
2237*4882a593Smuzhiyun 
2238*4882a593Smuzhiyun 	/* let's ensure we're not reading back cached data from array mode */
2239*4882a593Smuzhiyun 	INVALIDATE_CACHED_RANGE(map, chip->start + offset, size);
2240*4882a593Smuzhiyun 
2241*4882a593Smuzhiyun 	xip_disable(map, chip, chip->start);
2242*4882a593Smuzhiyun 	if (chip->state != FL_JEDEC_QUERY) {
2243*4882a593Smuzhiyun 		map_write(map, CMD(0x90), chip->start);
2244*4882a593Smuzhiyun 		chip->state = FL_JEDEC_QUERY;
2245*4882a593Smuzhiyun 	}
2246*4882a593Smuzhiyun 	map_copy_from(map, buf, chip->start + offset, size);
2247*4882a593Smuzhiyun 	xip_enable(map, chip, chip->start);
2248*4882a593Smuzhiyun 
2249*4882a593Smuzhiyun 	/* then ensure we don't keep OTP data in the cache */
2250*4882a593Smuzhiyun 	INVALIDATE_CACHED_RANGE(map, chip->start + offset, size);
2251*4882a593Smuzhiyun 
2252*4882a593Smuzhiyun 	put_chip(map, chip, chip->start);
2253*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
2254*4882a593Smuzhiyun 	return 0;
2255*4882a593Smuzhiyun }
2256*4882a593Smuzhiyun 
2257*4882a593Smuzhiyun static int
do_otp_write(struct map_info * map,struct flchip * chip,u_long offset,u_char * buf,u_int size,u_long prot,u_int grpno,u_int grpsz)2258*4882a593Smuzhiyun do_otp_write(struct map_info *map, struct flchip *chip, u_long offset,
2259*4882a593Smuzhiyun 	     u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2260*4882a593Smuzhiyun {
2261*4882a593Smuzhiyun 	int ret;
2262*4882a593Smuzhiyun 
2263*4882a593Smuzhiyun 	while (size) {
2264*4882a593Smuzhiyun 		unsigned long bus_ofs = offset & ~(map_bankwidth(map)-1);
2265*4882a593Smuzhiyun 		int gap = offset - bus_ofs;
2266*4882a593Smuzhiyun 		int n = min_t(int, size, map_bankwidth(map)-gap);
2267*4882a593Smuzhiyun 		map_word datum = map_word_ff(map);
2268*4882a593Smuzhiyun 
2269*4882a593Smuzhiyun 		datum = map_word_load_partial(map, datum, buf, gap, n);
2270*4882a593Smuzhiyun 		ret = do_write_oneword(map, chip, bus_ofs, datum, FL_OTP_WRITE);
2271*4882a593Smuzhiyun 		if (ret)
2272*4882a593Smuzhiyun 			return ret;
2273*4882a593Smuzhiyun 
2274*4882a593Smuzhiyun 		offset += n;
2275*4882a593Smuzhiyun 		buf += n;
2276*4882a593Smuzhiyun 		size -= n;
2277*4882a593Smuzhiyun 	}
2278*4882a593Smuzhiyun 
2279*4882a593Smuzhiyun 	return 0;
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun 
2282*4882a593Smuzhiyun static int
do_otp_lock(struct map_info * map,struct flchip * chip,u_long offset,u_char * buf,u_int size,u_long prot,u_int grpno,u_int grpsz)2283*4882a593Smuzhiyun do_otp_lock(struct map_info *map, struct flchip *chip, u_long offset,
2284*4882a593Smuzhiyun 	    u_char *buf, u_int size, u_long prot, u_int grpno, u_int grpsz)
2285*4882a593Smuzhiyun {
2286*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2287*4882a593Smuzhiyun 	map_word datum;
2288*4882a593Smuzhiyun 
2289*4882a593Smuzhiyun 	/* make sure area matches group boundaries */
2290*4882a593Smuzhiyun 	if (size != grpsz)
2291*4882a593Smuzhiyun 		return -EXDEV;
2292*4882a593Smuzhiyun 
2293*4882a593Smuzhiyun 	datum = map_word_ff(map);
2294*4882a593Smuzhiyun 	datum = map_word_clr(map, datum, CMD(1 << grpno));
2295*4882a593Smuzhiyun 	return do_write_oneword(map, chip, prot, datum, FL_OTP_WRITE);
2296*4882a593Smuzhiyun }
2297*4882a593Smuzhiyun 
cfi_intelext_otp_walk(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf,otp_op_t action,int user_regs)2298*4882a593Smuzhiyun static int cfi_intelext_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
2299*4882a593Smuzhiyun 				 size_t *retlen, u_char *buf,
2300*4882a593Smuzhiyun 				 otp_op_t action, int user_regs)
2301*4882a593Smuzhiyun {
2302*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
2303*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2304*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2305*4882a593Smuzhiyun 	struct flchip *chip;
2306*4882a593Smuzhiyun 	struct cfi_intelext_otpinfo *otp;
2307*4882a593Smuzhiyun 	u_long devsize, reg_prot_offset, data_offset;
2308*4882a593Smuzhiyun 	u_int chip_num, chip_step, field, reg_fact_size, reg_user_size;
2309*4882a593Smuzhiyun 	u_int groups, groupno, groupsize, reg_fact_groups, reg_user_groups;
2310*4882a593Smuzhiyun 	int ret;
2311*4882a593Smuzhiyun 
2312*4882a593Smuzhiyun 	*retlen = 0;
2313*4882a593Smuzhiyun 
2314*4882a593Smuzhiyun 	/* Check that we actually have some OTP registers */
2315*4882a593Smuzhiyun 	if (!extp || !(extp->FeatureSupport & 64) || !extp->NumProtectionFields)
2316*4882a593Smuzhiyun 		return -ENODATA;
2317*4882a593Smuzhiyun 
2318*4882a593Smuzhiyun 	/* we need real chips here not virtual ones */
2319*4882a593Smuzhiyun 	devsize = (1 << cfi->cfiq->DevSize) * cfi->interleave;
2320*4882a593Smuzhiyun 	chip_step = devsize >> cfi->chipshift;
2321*4882a593Smuzhiyun 	chip_num = 0;
2322*4882a593Smuzhiyun 
2323*4882a593Smuzhiyun 	/* Some chips have OTP located in the _top_ partition only.
2324*4882a593Smuzhiyun 	   For example: Intel 28F256L18T (T means top-parameter device) */
2325*4882a593Smuzhiyun 	if (cfi->mfr == CFI_MFR_INTEL) {
2326*4882a593Smuzhiyun 		switch (cfi->id) {
2327*4882a593Smuzhiyun 		case 0x880b:
2328*4882a593Smuzhiyun 		case 0x880c:
2329*4882a593Smuzhiyun 		case 0x880d:
2330*4882a593Smuzhiyun 			chip_num = chip_step - 1;
2331*4882a593Smuzhiyun 		}
2332*4882a593Smuzhiyun 	}
2333*4882a593Smuzhiyun 
2334*4882a593Smuzhiyun 	for ( ; chip_num < cfi->numchips; chip_num += chip_step) {
2335*4882a593Smuzhiyun 		chip = &cfi->chips[chip_num];
2336*4882a593Smuzhiyun 		otp = (struct cfi_intelext_otpinfo *)&extp->extra[0];
2337*4882a593Smuzhiyun 
2338*4882a593Smuzhiyun 		/* first OTP region */
2339*4882a593Smuzhiyun 		field = 0;
2340*4882a593Smuzhiyun 		reg_prot_offset = extp->ProtRegAddr;
2341*4882a593Smuzhiyun 		reg_fact_groups = 1;
2342*4882a593Smuzhiyun 		reg_fact_size = 1 << extp->FactProtRegSize;
2343*4882a593Smuzhiyun 		reg_user_groups = 1;
2344*4882a593Smuzhiyun 		reg_user_size = 1 << extp->UserProtRegSize;
2345*4882a593Smuzhiyun 
2346*4882a593Smuzhiyun 		while (len > 0) {
2347*4882a593Smuzhiyun 			/* flash geometry fixup */
2348*4882a593Smuzhiyun 			data_offset = reg_prot_offset + 1;
2349*4882a593Smuzhiyun 			data_offset *= cfi->interleave * cfi->device_type;
2350*4882a593Smuzhiyun 			reg_prot_offset *= cfi->interleave * cfi->device_type;
2351*4882a593Smuzhiyun 			reg_fact_size *= cfi->interleave;
2352*4882a593Smuzhiyun 			reg_user_size *= cfi->interleave;
2353*4882a593Smuzhiyun 
2354*4882a593Smuzhiyun 			if (user_regs) {
2355*4882a593Smuzhiyun 				groups = reg_user_groups;
2356*4882a593Smuzhiyun 				groupsize = reg_user_size;
2357*4882a593Smuzhiyun 				/* skip over factory reg area */
2358*4882a593Smuzhiyun 				groupno = reg_fact_groups;
2359*4882a593Smuzhiyun 				data_offset += reg_fact_groups * reg_fact_size;
2360*4882a593Smuzhiyun 			} else {
2361*4882a593Smuzhiyun 				groups = reg_fact_groups;
2362*4882a593Smuzhiyun 				groupsize = reg_fact_size;
2363*4882a593Smuzhiyun 				groupno = 0;
2364*4882a593Smuzhiyun 			}
2365*4882a593Smuzhiyun 
2366*4882a593Smuzhiyun 			while (len > 0 && groups > 0) {
2367*4882a593Smuzhiyun 				if (!action) {
2368*4882a593Smuzhiyun 					/*
2369*4882a593Smuzhiyun 					 * Special case: if action is NULL
2370*4882a593Smuzhiyun 					 * we fill buf with otp_info records.
2371*4882a593Smuzhiyun 					 */
2372*4882a593Smuzhiyun 					struct otp_info *otpinfo;
2373*4882a593Smuzhiyun 					map_word lockword;
2374*4882a593Smuzhiyun 					len -= sizeof(struct otp_info);
2375*4882a593Smuzhiyun 					if (len <= 0)
2376*4882a593Smuzhiyun 						return -ENOSPC;
2377*4882a593Smuzhiyun 					ret = do_otp_read(map, chip,
2378*4882a593Smuzhiyun 							  reg_prot_offset,
2379*4882a593Smuzhiyun 							  (u_char *)&lockword,
2380*4882a593Smuzhiyun 							  map_bankwidth(map),
2381*4882a593Smuzhiyun 							  0, 0,  0);
2382*4882a593Smuzhiyun 					if (ret)
2383*4882a593Smuzhiyun 						return ret;
2384*4882a593Smuzhiyun 					otpinfo = (struct otp_info *)buf;
2385*4882a593Smuzhiyun 					otpinfo->start = from;
2386*4882a593Smuzhiyun 					otpinfo->length = groupsize;
2387*4882a593Smuzhiyun 					otpinfo->locked =
2388*4882a593Smuzhiyun 					   !map_word_bitsset(map, lockword,
2389*4882a593Smuzhiyun 							     CMD(1 << groupno));
2390*4882a593Smuzhiyun 					from += groupsize;
2391*4882a593Smuzhiyun 					buf += sizeof(*otpinfo);
2392*4882a593Smuzhiyun 					*retlen += sizeof(*otpinfo);
2393*4882a593Smuzhiyun 				} else if (from >= groupsize) {
2394*4882a593Smuzhiyun 					from -= groupsize;
2395*4882a593Smuzhiyun 					data_offset += groupsize;
2396*4882a593Smuzhiyun 				} else {
2397*4882a593Smuzhiyun 					int size = groupsize;
2398*4882a593Smuzhiyun 					data_offset += from;
2399*4882a593Smuzhiyun 					size -= from;
2400*4882a593Smuzhiyun 					from = 0;
2401*4882a593Smuzhiyun 					if (size > len)
2402*4882a593Smuzhiyun 						size = len;
2403*4882a593Smuzhiyun 					ret = action(map, chip, data_offset,
2404*4882a593Smuzhiyun 						     buf, size, reg_prot_offset,
2405*4882a593Smuzhiyun 						     groupno, groupsize);
2406*4882a593Smuzhiyun 					if (ret < 0)
2407*4882a593Smuzhiyun 						return ret;
2408*4882a593Smuzhiyun 					buf += size;
2409*4882a593Smuzhiyun 					len -= size;
2410*4882a593Smuzhiyun 					*retlen += size;
2411*4882a593Smuzhiyun 					data_offset += size;
2412*4882a593Smuzhiyun 				}
2413*4882a593Smuzhiyun 				groupno++;
2414*4882a593Smuzhiyun 				groups--;
2415*4882a593Smuzhiyun 			}
2416*4882a593Smuzhiyun 
2417*4882a593Smuzhiyun 			/* next OTP region */
2418*4882a593Smuzhiyun 			if (++field == extp->NumProtectionFields)
2419*4882a593Smuzhiyun 				break;
2420*4882a593Smuzhiyun 			reg_prot_offset = otp->ProtRegAddr;
2421*4882a593Smuzhiyun 			reg_fact_groups = otp->FactGroups;
2422*4882a593Smuzhiyun 			reg_fact_size = 1 << otp->FactProtRegSize;
2423*4882a593Smuzhiyun 			reg_user_groups = otp->UserGroups;
2424*4882a593Smuzhiyun 			reg_user_size = 1 << otp->UserProtRegSize;
2425*4882a593Smuzhiyun 			otp++;
2426*4882a593Smuzhiyun 		}
2427*4882a593Smuzhiyun 	}
2428*4882a593Smuzhiyun 
2429*4882a593Smuzhiyun 	return 0;
2430*4882a593Smuzhiyun }
2431*4882a593Smuzhiyun 
cfi_intelext_read_fact_prot_reg(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)2432*4882a593Smuzhiyun static int cfi_intelext_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
2433*4882a593Smuzhiyun 					   size_t len, size_t *retlen,
2434*4882a593Smuzhiyun 					    u_char *buf)
2435*4882a593Smuzhiyun {
2436*4882a593Smuzhiyun 	return cfi_intelext_otp_walk(mtd, from, len, retlen,
2437*4882a593Smuzhiyun 				     buf, do_otp_read, 0);
2438*4882a593Smuzhiyun }
2439*4882a593Smuzhiyun 
cfi_intelext_read_user_prot_reg(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)2440*4882a593Smuzhiyun static int cfi_intelext_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
2441*4882a593Smuzhiyun 					   size_t len, size_t *retlen,
2442*4882a593Smuzhiyun 					    u_char *buf)
2443*4882a593Smuzhiyun {
2444*4882a593Smuzhiyun 	return cfi_intelext_otp_walk(mtd, from, len, retlen,
2445*4882a593Smuzhiyun 				     buf, do_otp_read, 1);
2446*4882a593Smuzhiyun }
2447*4882a593Smuzhiyun 
cfi_intelext_write_user_prot_reg(struct mtd_info * mtd,loff_t from,size_t len,size_t * retlen,u_char * buf)2448*4882a593Smuzhiyun static int cfi_intelext_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
2449*4882a593Smuzhiyun 					    size_t len, size_t *retlen,
2450*4882a593Smuzhiyun 					     u_char *buf)
2451*4882a593Smuzhiyun {
2452*4882a593Smuzhiyun 	return cfi_intelext_otp_walk(mtd, from, len, retlen,
2453*4882a593Smuzhiyun 				     buf, do_otp_write, 1);
2454*4882a593Smuzhiyun }
2455*4882a593Smuzhiyun 
cfi_intelext_lock_user_prot_reg(struct mtd_info * mtd,loff_t from,size_t len)2456*4882a593Smuzhiyun static int cfi_intelext_lock_user_prot_reg(struct mtd_info *mtd,
2457*4882a593Smuzhiyun 					   loff_t from, size_t len)
2458*4882a593Smuzhiyun {
2459*4882a593Smuzhiyun 	size_t retlen;
2460*4882a593Smuzhiyun 	return cfi_intelext_otp_walk(mtd, from, len, &retlen,
2461*4882a593Smuzhiyun 				     NULL, do_otp_lock, 1);
2462*4882a593Smuzhiyun }
2463*4882a593Smuzhiyun 
cfi_intelext_get_fact_prot_info(struct mtd_info * mtd,size_t len,size_t * retlen,struct otp_info * buf)2464*4882a593Smuzhiyun static int cfi_intelext_get_fact_prot_info(struct mtd_info *mtd, size_t len,
2465*4882a593Smuzhiyun 					   size_t *retlen, struct otp_info *buf)
2466*4882a593Smuzhiyun 
2467*4882a593Smuzhiyun {
2468*4882a593Smuzhiyun 	return cfi_intelext_otp_walk(mtd, 0, len, retlen, (u_char *)buf,
2469*4882a593Smuzhiyun 				     NULL, 0);
2470*4882a593Smuzhiyun }
2471*4882a593Smuzhiyun 
cfi_intelext_get_user_prot_info(struct mtd_info * mtd,size_t len,size_t * retlen,struct otp_info * buf)2472*4882a593Smuzhiyun static int cfi_intelext_get_user_prot_info(struct mtd_info *mtd, size_t len,
2473*4882a593Smuzhiyun 					   size_t *retlen, struct otp_info *buf)
2474*4882a593Smuzhiyun {
2475*4882a593Smuzhiyun 	return cfi_intelext_otp_walk(mtd, 0, len, retlen, (u_char *)buf,
2476*4882a593Smuzhiyun 				     NULL, 1);
2477*4882a593Smuzhiyun }
2478*4882a593Smuzhiyun 
2479*4882a593Smuzhiyun #endif
2480*4882a593Smuzhiyun 
cfi_intelext_save_locks(struct mtd_info * mtd)2481*4882a593Smuzhiyun static void cfi_intelext_save_locks(struct mtd_info *mtd)
2482*4882a593Smuzhiyun {
2483*4882a593Smuzhiyun 	struct mtd_erase_region_info *region;
2484*4882a593Smuzhiyun 	int block, status, i;
2485*4882a593Smuzhiyun 	unsigned long adr;
2486*4882a593Smuzhiyun 	size_t len;
2487*4882a593Smuzhiyun 
2488*4882a593Smuzhiyun 	for (i = 0; i < mtd->numeraseregions; i++) {
2489*4882a593Smuzhiyun 		region = &mtd->eraseregions[i];
2490*4882a593Smuzhiyun 		if (!region->lockmap)
2491*4882a593Smuzhiyun 			continue;
2492*4882a593Smuzhiyun 
2493*4882a593Smuzhiyun 		for (block = 0; block < region->numblocks; block++){
2494*4882a593Smuzhiyun 			len = region->erasesize;
2495*4882a593Smuzhiyun 			adr = region->offset + block * len;
2496*4882a593Smuzhiyun 
2497*4882a593Smuzhiyun 			status = cfi_varsize_frob(mtd,
2498*4882a593Smuzhiyun 					do_getlockstatus_oneblock, adr, len, NULL);
2499*4882a593Smuzhiyun 			if (status)
2500*4882a593Smuzhiyun 				set_bit(block, region->lockmap);
2501*4882a593Smuzhiyun 			else
2502*4882a593Smuzhiyun 				clear_bit(block, region->lockmap);
2503*4882a593Smuzhiyun 		}
2504*4882a593Smuzhiyun 	}
2505*4882a593Smuzhiyun }
2506*4882a593Smuzhiyun 
cfi_intelext_suspend(struct mtd_info * mtd)2507*4882a593Smuzhiyun static int cfi_intelext_suspend(struct mtd_info *mtd)
2508*4882a593Smuzhiyun {
2509*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
2510*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2511*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2512*4882a593Smuzhiyun 	int i;
2513*4882a593Smuzhiyun 	struct flchip *chip;
2514*4882a593Smuzhiyun 	int ret = 0;
2515*4882a593Smuzhiyun 
2516*4882a593Smuzhiyun 	if ((mtd->flags & MTD_POWERUP_LOCK)
2517*4882a593Smuzhiyun 	    && extp && (extp->FeatureSupport & (1 << 5)))
2518*4882a593Smuzhiyun 		cfi_intelext_save_locks(mtd);
2519*4882a593Smuzhiyun 
2520*4882a593Smuzhiyun 	for (i=0; !ret && i<cfi->numchips; i++) {
2521*4882a593Smuzhiyun 		chip = &cfi->chips[i];
2522*4882a593Smuzhiyun 
2523*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
2524*4882a593Smuzhiyun 
2525*4882a593Smuzhiyun 		switch (chip->state) {
2526*4882a593Smuzhiyun 		case FL_READY:
2527*4882a593Smuzhiyun 		case FL_STATUS:
2528*4882a593Smuzhiyun 		case FL_CFI_QUERY:
2529*4882a593Smuzhiyun 		case FL_JEDEC_QUERY:
2530*4882a593Smuzhiyun 			if (chip->oldstate == FL_READY) {
2531*4882a593Smuzhiyun 				/* place the chip in a known state before suspend */
2532*4882a593Smuzhiyun 				map_write(map, CMD(0xFF), cfi->chips[i].start);
2533*4882a593Smuzhiyun 				chip->oldstate = chip->state;
2534*4882a593Smuzhiyun 				chip->state = FL_PM_SUSPENDED;
2535*4882a593Smuzhiyun 				/* No need to wake_up() on this state change -
2536*4882a593Smuzhiyun 				 * as the whole point is that nobody can do anything
2537*4882a593Smuzhiyun 				 * with the chip now anyway.
2538*4882a593Smuzhiyun 				 */
2539*4882a593Smuzhiyun 			} else {
2540*4882a593Smuzhiyun 				/* There seems to be an operation pending. We must wait for it. */
2541*4882a593Smuzhiyun 				printk(KERN_NOTICE "Flash device refused suspend due to pending operation (oldstate %d)\n", chip->oldstate);
2542*4882a593Smuzhiyun 				ret = -EAGAIN;
2543*4882a593Smuzhiyun 			}
2544*4882a593Smuzhiyun 			break;
2545*4882a593Smuzhiyun 		default:
2546*4882a593Smuzhiyun 			/* Should we actually wait? Once upon a time these routines weren't
2547*4882a593Smuzhiyun 			   allowed to. Or should we return -EAGAIN, because the upper layers
2548*4882a593Smuzhiyun 			   ought to have already shut down anything which was using the device
2549*4882a593Smuzhiyun 			   anyway? The latter for now. */
2550*4882a593Smuzhiyun 			printk(KERN_NOTICE "Flash device refused suspend due to active operation (state %d)\n", chip->state);
2551*4882a593Smuzhiyun 			ret = -EAGAIN;
2552*4882a593Smuzhiyun 		case FL_PM_SUSPENDED:
2553*4882a593Smuzhiyun 			break;
2554*4882a593Smuzhiyun 		}
2555*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2556*4882a593Smuzhiyun 	}
2557*4882a593Smuzhiyun 
2558*4882a593Smuzhiyun 	/* Unlock the chips again */
2559*4882a593Smuzhiyun 
2560*4882a593Smuzhiyun 	if (ret) {
2561*4882a593Smuzhiyun 		for (i--; i >=0; i--) {
2562*4882a593Smuzhiyun 			chip = &cfi->chips[i];
2563*4882a593Smuzhiyun 
2564*4882a593Smuzhiyun 			mutex_lock(&chip->mutex);
2565*4882a593Smuzhiyun 
2566*4882a593Smuzhiyun 			if (chip->state == FL_PM_SUSPENDED) {
2567*4882a593Smuzhiyun 				/* No need to force it into a known state here,
2568*4882a593Smuzhiyun 				   because we're returning failure, and it didn't
2569*4882a593Smuzhiyun 				   get power cycled */
2570*4882a593Smuzhiyun 				chip->state = chip->oldstate;
2571*4882a593Smuzhiyun 				chip->oldstate = FL_READY;
2572*4882a593Smuzhiyun 				wake_up(&chip->wq);
2573*4882a593Smuzhiyun 			}
2574*4882a593Smuzhiyun 			mutex_unlock(&chip->mutex);
2575*4882a593Smuzhiyun 		}
2576*4882a593Smuzhiyun 	}
2577*4882a593Smuzhiyun 
2578*4882a593Smuzhiyun 	return ret;
2579*4882a593Smuzhiyun }
2580*4882a593Smuzhiyun 
cfi_intelext_restore_locks(struct mtd_info * mtd)2581*4882a593Smuzhiyun static void cfi_intelext_restore_locks(struct mtd_info *mtd)
2582*4882a593Smuzhiyun {
2583*4882a593Smuzhiyun 	struct mtd_erase_region_info *region;
2584*4882a593Smuzhiyun 	int block, i;
2585*4882a593Smuzhiyun 	unsigned long adr;
2586*4882a593Smuzhiyun 	size_t len;
2587*4882a593Smuzhiyun 
2588*4882a593Smuzhiyun 	for (i = 0; i < mtd->numeraseregions; i++) {
2589*4882a593Smuzhiyun 		region = &mtd->eraseregions[i];
2590*4882a593Smuzhiyun 		if (!region->lockmap)
2591*4882a593Smuzhiyun 			continue;
2592*4882a593Smuzhiyun 
2593*4882a593Smuzhiyun 		for_each_clear_bit(block, region->lockmap, region->numblocks) {
2594*4882a593Smuzhiyun 			len = region->erasesize;
2595*4882a593Smuzhiyun 			adr = region->offset + block * len;
2596*4882a593Smuzhiyun 			cfi_intelext_unlock(mtd, adr, len);
2597*4882a593Smuzhiyun 		}
2598*4882a593Smuzhiyun 	}
2599*4882a593Smuzhiyun }
2600*4882a593Smuzhiyun 
cfi_intelext_resume(struct mtd_info * mtd)2601*4882a593Smuzhiyun static void cfi_intelext_resume(struct mtd_info *mtd)
2602*4882a593Smuzhiyun {
2603*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
2604*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2605*4882a593Smuzhiyun 	struct cfi_pri_intelext *extp = cfi->cmdset_priv;
2606*4882a593Smuzhiyun 	int i;
2607*4882a593Smuzhiyun 	struct flchip *chip;
2608*4882a593Smuzhiyun 
2609*4882a593Smuzhiyun 	for (i=0; i<cfi->numchips; i++) {
2610*4882a593Smuzhiyun 
2611*4882a593Smuzhiyun 		chip = &cfi->chips[i];
2612*4882a593Smuzhiyun 
2613*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
2614*4882a593Smuzhiyun 
2615*4882a593Smuzhiyun 		/* Go to known state. Chip may have been power cycled */
2616*4882a593Smuzhiyun 		if (chip->state == FL_PM_SUSPENDED) {
2617*4882a593Smuzhiyun 			/* Refresh LH28F640BF Partition Config. Register */
2618*4882a593Smuzhiyun 			fixup_LH28F640BF(mtd);
2619*4882a593Smuzhiyun 			map_write(map, CMD(0xFF), cfi->chips[i].start);
2620*4882a593Smuzhiyun 			chip->oldstate = chip->state = FL_READY;
2621*4882a593Smuzhiyun 			wake_up(&chip->wq);
2622*4882a593Smuzhiyun 		}
2623*4882a593Smuzhiyun 
2624*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2625*4882a593Smuzhiyun 	}
2626*4882a593Smuzhiyun 
2627*4882a593Smuzhiyun 	if ((mtd->flags & MTD_POWERUP_LOCK)
2628*4882a593Smuzhiyun 	    && extp && (extp->FeatureSupport & (1 << 5)))
2629*4882a593Smuzhiyun 		cfi_intelext_restore_locks(mtd);
2630*4882a593Smuzhiyun }
2631*4882a593Smuzhiyun 
cfi_intelext_reset(struct mtd_info * mtd)2632*4882a593Smuzhiyun static int cfi_intelext_reset(struct mtd_info *mtd)
2633*4882a593Smuzhiyun {
2634*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
2635*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2636*4882a593Smuzhiyun 	int i, ret;
2637*4882a593Smuzhiyun 
2638*4882a593Smuzhiyun 	for (i=0; i < cfi->numchips; i++) {
2639*4882a593Smuzhiyun 		struct flchip *chip = &cfi->chips[i];
2640*4882a593Smuzhiyun 
2641*4882a593Smuzhiyun 		/* force the completion of any ongoing operation
2642*4882a593Smuzhiyun 		   and switch to array mode so any bootloader in
2643*4882a593Smuzhiyun 		   flash is accessible for soft reboot. */
2644*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
2645*4882a593Smuzhiyun 		ret = get_chip(map, chip, chip->start, FL_SHUTDOWN);
2646*4882a593Smuzhiyun 		if (!ret) {
2647*4882a593Smuzhiyun 			map_write(map, CMD(0xff), chip->start);
2648*4882a593Smuzhiyun 			chip->state = FL_SHUTDOWN;
2649*4882a593Smuzhiyun 			put_chip(map, chip, chip->start);
2650*4882a593Smuzhiyun 		}
2651*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
2652*4882a593Smuzhiyun 	}
2653*4882a593Smuzhiyun 
2654*4882a593Smuzhiyun 	return 0;
2655*4882a593Smuzhiyun }
2656*4882a593Smuzhiyun 
cfi_intelext_reboot(struct notifier_block * nb,unsigned long val,void * v)2657*4882a593Smuzhiyun static int cfi_intelext_reboot(struct notifier_block *nb, unsigned long val,
2658*4882a593Smuzhiyun 			       void *v)
2659*4882a593Smuzhiyun {
2660*4882a593Smuzhiyun 	struct mtd_info *mtd;
2661*4882a593Smuzhiyun 
2662*4882a593Smuzhiyun 	mtd = container_of(nb, struct mtd_info, reboot_notifier);
2663*4882a593Smuzhiyun 	cfi_intelext_reset(mtd);
2664*4882a593Smuzhiyun 	return NOTIFY_DONE;
2665*4882a593Smuzhiyun }
2666*4882a593Smuzhiyun 
cfi_intelext_destroy(struct mtd_info * mtd)2667*4882a593Smuzhiyun static void cfi_intelext_destroy(struct mtd_info *mtd)
2668*4882a593Smuzhiyun {
2669*4882a593Smuzhiyun 	struct map_info *map = mtd->priv;
2670*4882a593Smuzhiyun 	struct cfi_private *cfi = map->fldrv_priv;
2671*4882a593Smuzhiyun 	struct mtd_erase_region_info *region;
2672*4882a593Smuzhiyun 	int i;
2673*4882a593Smuzhiyun 	cfi_intelext_reset(mtd);
2674*4882a593Smuzhiyun 	unregister_reboot_notifier(&mtd->reboot_notifier);
2675*4882a593Smuzhiyun 	kfree(cfi->cmdset_priv);
2676*4882a593Smuzhiyun 	kfree(cfi->cfiq);
2677*4882a593Smuzhiyun 	kfree(cfi->chips[0].priv);
2678*4882a593Smuzhiyun 	kfree(cfi);
2679*4882a593Smuzhiyun 	for (i = 0; i < mtd->numeraseregions; i++) {
2680*4882a593Smuzhiyun 		region = &mtd->eraseregions[i];
2681*4882a593Smuzhiyun 		kfree(region->lockmap);
2682*4882a593Smuzhiyun 	}
2683*4882a593Smuzhiyun 	kfree(mtd->eraseregions);
2684*4882a593Smuzhiyun }
2685*4882a593Smuzhiyun 
2686*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2687*4882a593Smuzhiyun MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
2688*4882a593Smuzhiyun MODULE_DESCRIPTION("MTD chip driver for Intel/Sharp flash chips");
2689*4882a593Smuzhiyun MODULE_ALIAS("cfi_cmdset_0003");
2690*4882a593Smuzhiyun MODULE_ALIAS("cfi_cmdset_0200");
2691