1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * cb710/cb710-mmc.h 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright by Michał Mirosław, 2008-2009 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun #ifndef LINUX_CB710_MMC_H 8*4882a593Smuzhiyun #define LINUX_CB710_MMC_H 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include <linux/cb710.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* per-MMC-reader structure */ 13*4882a593Smuzhiyun struct cb710_mmc_reader { 14*4882a593Smuzhiyun struct tasklet_struct finish_req_tasklet; 15*4882a593Smuzhiyun struct mmc_request *mrq; 16*4882a593Smuzhiyun spinlock_t irq_lock; 17*4882a593Smuzhiyun unsigned char last_power_mode; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun /* some device struct walking */ 21*4882a593Smuzhiyun cb710_slot_to_mmc(struct cb710_slot * slot)22*4882a593Smuzhiyunstatic inline struct mmc_host *cb710_slot_to_mmc(struct cb710_slot *slot) 23*4882a593Smuzhiyun { 24*4882a593Smuzhiyun return platform_get_drvdata(&slot->pdev); 25*4882a593Smuzhiyun } 26*4882a593Smuzhiyun cb710_mmc_to_slot(struct mmc_host * mmc)27*4882a593Smuzhiyunstatic inline struct cb710_slot *cb710_mmc_to_slot(struct mmc_host *mmc) 28*4882a593Smuzhiyun { 29*4882a593Smuzhiyun struct platform_device *pdev = to_platform_device(mmc_dev(mmc)); 30*4882a593Smuzhiyun return cb710_pdev_to_slot(pdev); 31*4882a593Smuzhiyun } 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /* registers (this might be all wrong ;) */ 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #define CB710_MMC_DATA_PORT 0x00 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define CB710_MMC_CONFIG_PORT 0x04 38*4882a593Smuzhiyun #define CB710_MMC_CONFIG0_PORT 0x04 39*4882a593Smuzhiyun #define CB710_MMC_CONFIG1_PORT 0x05 40*4882a593Smuzhiyun #define CB710_MMC_C1_4BIT_DATA_BUS 0x40 41*4882a593Smuzhiyun #define CB710_MMC_CONFIG2_PORT 0x06 42*4882a593Smuzhiyun #define CB710_MMC_C2_READ_PIO_SIZE_MASK 0x0F /* N-1 */ 43*4882a593Smuzhiyun #define CB710_MMC_CONFIG3_PORT 0x07 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define CB710_MMC_CONFIGB_PORT 0x08 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define CB710_MMC_IRQ_ENABLE_PORT 0x0C 48*4882a593Smuzhiyun #define CB710_MMC_IE_TEST_MASK 0x00BF 49*4882a593Smuzhiyun #define CB710_MMC_IE_CARD_INSERTION_STATUS 0x1000 50*4882a593Smuzhiyun #define CB710_MMC_IE_IRQ_ENABLE 0x8000 51*4882a593Smuzhiyun #define CB710_MMC_IE_CISTATUS_MASK \ 52*4882a593Smuzhiyun (CB710_MMC_IE_CARD_INSERTION_STATUS|CB710_MMC_IE_IRQ_ENABLE) 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define CB710_MMC_STATUS_PORT 0x10 55*4882a593Smuzhiyun #define CB710_MMC_STATUS_ERROR_EVENTS 0x60FF 56*4882a593Smuzhiyun #define CB710_MMC_STATUS0_PORT 0x10 57*4882a593Smuzhiyun #define CB710_MMC_S0_FIFO_UNDERFLOW 0x40 58*4882a593Smuzhiyun #define CB710_MMC_STATUS1_PORT 0x11 59*4882a593Smuzhiyun #define CB710_MMC_S1_COMMAND_SENT 0x01 60*4882a593Smuzhiyun #define CB710_MMC_S1_DATA_TRANSFER_DONE 0x02 61*4882a593Smuzhiyun #define CB710_MMC_S1_PIO_TRANSFER_DONE 0x04 62*4882a593Smuzhiyun #define CB710_MMC_S1_CARD_CHANGED 0x10 63*4882a593Smuzhiyun #define CB710_MMC_S1_RESET 0x20 64*4882a593Smuzhiyun #define CB710_MMC_STATUS2_PORT 0x12 65*4882a593Smuzhiyun #define CB710_MMC_S2_FIFO_READY 0x01 66*4882a593Smuzhiyun #define CB710_MMC_S2_FIFO_EMPTY 0x02 67*4882a593Smuzhiyun #define CB710_MMC_S2_BUSY_10 0x10 68*4882a593Smuzhiyun #define CB710_MMC_S2_BUSY_20 0x20 69*4882a593Smuzhiyun #define CB710_MMC_STATUS3_PORT 0x13 70*4882a593Smuzhiyun #define CB710_MMC_S3_CARD_DETECTED 0x02 71*4882a593Smuzhiyun #define CB710_MMC_S3_WRITE_PROTECTED 0x04 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun #define CB710_MMC_CMD_TYPE_PORT 0x14 74*4882a593Smuzhiyun #define CB710_MMC_RSP_TYPE_MASK 0x0007 75*4882a593Smuzhiyun #define CB710_MMC_RSP_R1 (0) 76*4882a593Smuzhiyun #define CB710_MMC_RSP_136 (5) 77*4882a593Smuzhiyun #define CB710_MMC_RSP_NO_CRC (2) 78*4882a593Smuzhiyun #define CB710_MMC_RSP_PRESENT_MASK 0x0018 79*4882a593Smuzhiyun #define CB710_MMC_RSP_NONE (0 << 3) 80*4882a593Smuzhiyun #define CB710_MMC_RSP_PRESENT (1 << 3) 81*4882a593Smuzhiyun #define CB710_MMC_RSP_PRESENT_X (2 << 3) 82*4882a593Smuzhiyun #define CB710_MMC_CMD_TYPE_MASK 0x0060 83*4882a593Smuzhiyun #define CB710_MMC_CMD_BC (0 << 5) 84*4882a593Smuzhiyun #define CB710_MMC_CMD_BCR (1 << 5) 85*4882a593Smuzhiyun #define CB710_MMC_CMD_AC (2 << 5) 86*4882a593Smuzhiyun #define CB710_MMC_CMD_ADTC (3 << 5) 87*4882a593Smuzhiyun #define CB710_MMC_DATA_READ 0x0080 88*4882a593Smuzhiyun #define CB710_MMC_CMD_CODE_MASK 0x3F00 89*4882a593Smuzhiyun #define CB710_MMC_CMD_CODE_SHIFT 8 90*4882a593Smuzhiyun #define CB710_MMC_IS_APP_CMD 0x4000 91*4882a593Smuzhiyun #define CB710_MMC_RSP_BUSY 0x8000 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun #define CB710_MMC_CMD_PARAM_PORT 0x18 94*4882a593Smuzhiyun #define CB710_MMC_TRANSFER_SIZE_PORT 0x1C 95*4882a593Smuzhiyun #define CB710_MMC_RESPONSE0_PORT 0x20 96*4882a593Smuzhiyun #define CB710_MMC_RESPONSE1_PORT 0x24 97*4882a593Smuzhiyun #define CB710_MMC_RESPONSE2_PORT 0x28 98*4882a593Smuzhiyun #define CB710_MMC_RESPONSE3_PORT 0x2C 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #endif /* LINUX_CB710_MMC_H */ 101