xref: /OK3568_Linux_fs/kernel/drivers/mmc/core/debugfs.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Debugfs support for hosts and cards
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2008 Atmel Corporation
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun #include <linux/moduleparam.h>
8*4882a593Smuzhiyun #include <linux/export.h>
9*4882a593Smuzhiyun #include <linux/debugfs.h>
10*4882a593Smuzhiyun #include <linux/fs.h>
11*4882a593Smuzhiyun #include <linux/seq_file.h>
12*4882a593Smuzhiyun #include <linux/slab.h>
13*4882a593Smuzhiyun #include <linux/stat.h>
14*4882a593Smuzhiyun #include <linux/fault-inject.h>
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/mmc/card.h>
17*4882a593Smuzhiyun #include <linux/mmc/host.h>
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include "core.h"
20*4882a593Smuzhiyun #include "card.h"
21*4882a593Smuzhiyun #include "host.h"
22*4882a593Smuzhiyun #include "mmc_ops.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #ifdef CONFIG_FAIL_MMC_REQUEST
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun static DECLARE_FAULT_ATTR(fail_default_attr);
27*4882a593Smuzhiyun static char *fail_request;
28*4882a593Smuzhiyun module_param(fail_request, charp, 0);
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #endif /* CONFIG_FAIL_MMC_REQUEST */
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun /* The debugfs functions are optimized away when CONFIG_DEBUG_FS isn't set. */
mmc_ios_show(struct seq_file * s,void * data)33*4882a593Smuzhiyun static int mmc_ios_show(struct seq_file *s, void *data)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	static const char *vdd_str[] = {
36*4882a593Smuzhiyun 		[8]	= "2.0",
37*4882a593Smuzhiyun 		[9]	= "2.1",
38*4882a593Smuzhiyun 		[10]	= "2.2",
39*4882a593Smuzhiyun 		[11]	= "2.3",
40*4882a593Smuzhiyun 		[12]	= "2.4",
41*4882a593Smuzhiyun 		[13]	= "2.5",
42*4882a593Smuzhiyun 		[14]	= "2.6",
43*4882a593Smuzhiyun 		[15]	= "2.7",
44*4882a593Smuzhiyun 		[16]	= "2.8",
45*4882a593Smuzhiyun 		[17]	= "2.9",
46*4882a593Smuzhiyun 		[18]	= "3.0",
47*4882a593Smuzhiyun 		[19]	= "3.1",
48*4882a593Smuzhiyun 		[20]	= "3.2",
49*4882a593Smuzhiyun 		[21]	= "3.3",
50*4882a593Smuzhiyun 		[22]	= "3.4",
51*4882a593Smuzhiyun 		[23]	= "3.5",
52*4882a593Smuzhiyun 		[24]	= "3.6",
53*4882a593Smuzhiyun 	};
54*4882a593Smuzhiyun 	struct mmc_host	*host = s->private;
55*4882a593Smuzhiyun 	struct mmc_ios	*ios = &host->ios;
56*4882a593Smuzhiyun 	const char *str;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	seq_printf(s, "clock:\t\t%u Hz\n", ios->clock);
59*4882a593Smuzhiyun 	if (host->actual_clock)
60*4882a593Smuzhiyun 		seq_printf(s, "actual clock:\t%u Hz\n", host->actual_clock);
61*4882a593Smuzhiyun 	seq_printf(s, "vdd:\t\t%u ", ios->vdd);
62*4882a593Smuzhiyun 	if ((1 << ios->vdd) & MMC_VDD_165_195)
63*4882a593Smuzhiyun 		seq_printf(s, "(1.65 - 1.95 V)\n");
64*4882a593Smuzhiyun 	else if (ios->vdd < (ARRAY_SIZE(vdd_str) - 1)
65*4882a593Smuzhiyun 			&& vdd_str[ios->vdd] && vdd_str[ios->vdd + 1])
66*4882a593Smuzhiyun 		seq_printf(s, "(%s ~ %s V)\n", vdd_str[ios->vdd],
67*4882a593Smuzhiyun 				vdd_str[ios->vdd + 1]);
68*4882a593Smuzhiyun 	else
69*4882a593Smuzhiyun 		seq_printf(s, "(invalid)\n");
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	switch (ios->bus_mode) {
72*4882a593Smuzhiyun 	case MMC_BUSMODE_OPENDRAIN:
73*4882a593Smuzhiyun 		str = "open drain";
74*4882a593Smuzhiyun 		break;
75*4882a593Smuzhiyun 	case MMC_BUSMODE_PUSHPULL:
76*4882a593Smuzhiyun 		str = "push-pull";
77*4882a593Smuzhiyun 		break;
78*4882a593Smuzhiyun 	default:
79*4882a593Smuzhiyun 		str = "invalid";
80*4882a593Smuzhiyun 		break;
81*4882a593Smuzhiyun 	}
82*4882a593Smuzhiyun 	seq_printf(s, "bus mode:\t%u (%s)\n", ios->bus_mode, str);
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 	switch (ios->chip_select) {
85*4882a593Smuzhiyun 	case MMC_CS_DONTCARE:
86*4882a593Smuzhiyun 		str = "don't care";
87*4882a593Smuzhiyun 		break;
88*4882a593Smuzhiyun 	case MMC_CS_HIGH:
89*4882a593Smuzhiyun 		str = "active high";
90*4882a593Smuzhiyun 		break;
91*4882a593Smuzhiyun 	case MMC_CS_LOW:
92*4882a593Smuzhiyun 		str = "active low";
93*4882a593Smuzhiyun 		break;
94*4882a593Smuzhiyun 	default:
95*4882a593Smuzhiyun 		str = "invalid";
96*4882a593Smuzhiyun 		break;
97*4882a593Smuzhiyun 	}
98*4882a593Smuzhiyun 	seq_printf(s, "chip select:\t%u (%s)\n", ios->chip_select, str);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	switch (ios->power_mode) {
101*4882a593Smuzhiyun 	case MMC_POWER_OFF:
102*4882a593Smuzhiyun 		str = "off";
103*4882a593Smuzhiyun 		break;
104*4882a593Smuzhiyun 	case MMC_POWER_UP:
105*4882a593Smuzhiyun 		str = "up";
106*4882a593Smuzhiyun 		break;
107*4882a593Smuzhiyun 	case MMC_POWER_ON:
108*4882a593Smuzhiyun 		str = "on";
109*4882a593Smuzhiyun 		break;
110*4882a593Smuzhiyun 	default:
111*4882a593Smuzhiyun 		str = "invalid";
112*4882a593Smuzhiyun 		break;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 	seq_printf(s, "power mode:\t%u (%s)\n", ios->power_mode, str);
115*4882a593Smuzhiyun 	seq_printf(s, "bus width:\t%u (%u bits)\n",
116*4882a593Smuzhiyun 			ios->bus_width, 1 << ios->bus_width);
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	switch (ios->timing) {
119*4882a593Smuzhiyun 	case MMC_TIMING_LEGACY:
120*4882a593Smuzhiyun 		str = "legacy";
121*4882a593Smuzhiyun 		break;
122*4882a593Smuzhiyun 	case MMC_TIMING_MMC_HS:
123*4882a593Smuzhiyun 		str = "mmc high-speed";
124*4882a593Smuzhiyun 		break;
125*4882a593Smuzhiyun 	case MMC_TIMING_SD_HS:
126*4882a593Smuzhiyun 		str = "sd high-speed";
127*4882a593Smuzhiyun 		break;
128*4882a593Smuzhiyun 	case MMC_TIMING_UHS_SDR12:
129*4882a593Smuzhiyun 		str = "sd uhs SDR12";
130*4882a593Smuzhiyun 		break;
131*4882a593Smuzhiyun 	case MMC_TIMING_UHS_SDR25:
132*4882a593Smuzhiyun 		str = "sd uhs SDR25";
133*4882a593Smuzhiyun 		break;
134*4882a593Smuzhiyun 	case MMC_TIMING_UHS_SDR50:
135*4882a593Smuzhiyun 		str = "sd uhs SDR50";
136*4882a593Smuzhiyun 		break;
137*4882a593Smuzhiyun 	case MMC_TIMING_UHS_SDR104:
138*4882a593Smuzhiyun 		str = "sd uhs SDR104";
139*4882a593Smuzhiyun 		break;
140*4882a593Smuzhiyun 	case MMC_TIMING_UHS_DDR50:
141*4882a593Smuzhiyun 		str = "sd uhs DDR50";
142*4882a593Smuzhiyun 		break;
143*4882a593Smuzhiyun 	case MMC_TIMING_MMC_DDR52:
144*4882a593Smuzhiyun 		str = "mmc DDR52";
145*4882a593Smuzhiyun 		break;
146*4882a593Smuzhiyun 	case MMC_TIMING_MMC_HS200:
147*4882a593Smuzhiyun 		str = "mmc HS200";
148*4882a593Smuzhiyun 		break;
149*4882a593Smuzhiyun 	case MMC_TIMING_MMC_HS400:
150*4882a593Smuzhiyun 		str = mmc_card_hs400es(host->card) ?
151*4882a593Smuzhiyun 			"mmc HS400 enhanced strobe" : "mmc HS400";
152*4882a593Smuzhiyun 		break;
153*4882a593Smuzhiyun 	default:
154*4882a593Smuzhiyun 		str = "invalid";
155*4882a593Smuzhiyun 		break;
156*4882a593Smuzhiyun 	}
157*4882a593Smuzhiyun 	seq_printf(s, "timing spec:\t%u (%s)\n", ios->timing, str);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	switch (ios->signal_voltage) {
160*4882a593Smuzhiyun 	case MMC_SIGNAL_VOLTAGE_330:
161*4882a593Smuzhiyun 		str = "3.30 V";
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	case MMC_SIGNAL_VOLTAGE_180:
164*4882a593Smuzhiyun 		str = "1.80 V";
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	case MMC_SIGNAL_VOLTAGE_120:
167*4882a593Smuzhiyun 		str = "1.20 V";
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	default:
170*4882a593Smuzhiyun 		str = "invalid";
171*4882a593Smuzhiyun 		break;
172*4882a593Smuzhiyun 	}
173*4882a593Smuzhiyun 	seq_printf(s, "signal voltage:\t%u (%s)\n", ios->signal_voltage, str);
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	switch (ios->drv_type) {
176*4882a593Smuzhiyun 	case MMC_SET_DRIVER_TYPE_A:
177*4882a593Smuzhiyun 		str = "driver type A";
178*4882a593Smuzhiyun 		break;
179*4882a593Smuzhiyun 	case MMC_SET_DRIVER_TYPE_B:
180*4882a593Smuzhiyun 		str = "driver type B";
181*4882a593Smuzhiyun 		break;
182*4882a593Smuzhiyun 	case MMC_SET_DRIVER_TYPE_C:
183*4882a593Smuzhiyun 		str = "driver type C";
184*4882a593Smuzhiyun 		break;
185*4882a593Smuzhiyun 	case MMC_SET_DRIVER_TYPE_D:
186*4882a593Smuzhiyun 		str = "driver type D";
187*4882a593Smuzhiyun 		break;
188*4882a593Smuzhiyun 	default:
189*4882a593Smuzhiyun 		str = "invalid";
190*4882a593Smuzhiyun 		break;
191*4882a593Smuzhiyun 	}
192*4882a593Smuzhiyun 	seq_printf(s, "driver type:\t%u (%s)\n", ios->drv_type, str);
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	return 0;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(mmc_ios);
197*4882a593Smuzhiyun 
mmc_clock_opt_get(void * data,u64 * val)198*4882a593Smuzhiyun static int mmc_clock_opt_get(void *data, u64 *val)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun 	struct mmc_host *host = data;
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	*val = host->ios.clock;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	return 0;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
mmc_clock_opt_set(void * data,u64 val)207*4882a593Smuzhiyun static int mmc_clock_opt_set(void *data, u64 val)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	struct mmc_host *host = data;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* We need this check due to input value is u64 */
212*4882a593Smuzhiyun 	if (val != 0 && (val > host->f_max || val < host->f_min))
213*4882a593Smuzhiyun 		return -EINVAL;
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	mmc_claim_host(host);
216*4882a593Smuzhiyun 	mmc_set_clock(host, (unsigned int) val);
217*4882a593Smuzhiyun 	mmc_release_host(host);
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	return 0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(mmc_clock_fops, mmc_clock_opt_get, mmc_clock_opt_set,
223*4882a593Smuzhiyun 	"%llu\n");
224*4882a593Smuzhiyun 
mmc_add_host_debugfs(struct mmc_host * host)225*4882a593Smuzhiyun void mmc_add_host_debugfs(struct mmc_host *host)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	struct dentry *root;
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	root = debugfs_create_dir(mmc_hostname(host), NULL);
230*4882a593Smuzhiyun 	host->debugfs_root = root;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	debugfs_create_file("ios", S_IRUSR, root, host, &mmc_ios_fops);
233*4882a593Smuzhiyun 	debugfs_create_x32("caps", S_IRUSR, root, &host->caps);
234*4882a593Smuzhiyun 	debugfs_create_x32("caps2", S_IRUSR, root, &host->caps2);
235*4882a593Smuzhiyun 	debugfs_create_file_unsafe("clock", S_IRUSR | S_IWUSR, root, host,
236*4882a593Smuzhiyun 				   &mmc_clock_fops);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun #ifdef CONFIG_FAIL_MMC_REQUEST
239*4882a593Smuzhiyun 	if (fail_request)
240*4882a593Smuzhiyun 		setup_fault_attr(&fail_default_attr, fail_request);
241*4882a593Smuzhiyun 	host->fail_mmc_request = fail_default_attr;
242*4882a593Smuzhiyun 	fault_create_debugfs_attr("fail_mmc_request", root,
243*4882a593Smuzhiyun 				  &host->fail_mmc_request);
244*4882a593Smuzhiyun #endif
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun 
mmc_remove_host_debugfs(struct mmc_host * host)247*4882a593Smuzhiyun void mmc_remove_host_debugfs(struct mmc_host *host)
248*4882a593Smuzhiyun {
249*4882a593Smuzhiyun 	debugfs_remove_recursive(host->debugfs_root);
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun 
mmc_add_card_debugfs(struct mmc_card * card)252*4882a593Smuzhiyun void mmc_add_card_debugfs(struct mmc_card *card)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun 	struct mmc_host	*host = card->host;
255*4882a593Smuzhiyun 	struct dentry	*root;
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	if (!host->debugfs_root)
258*4882a593Smuzhiyun 		return;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	root = debugfs_create_dir(mmc_card_id(card), host->debugfs_root);
261*4882a593Smuzhiyun 	card->debugfs_root = root;
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	debugfs_create_x32("state", S_IRUSR, root, &card->state);
264*4882a593Smuzhiyun }
265*4882a593Smuzhiyun 
mmc_remove_card_debugfs(struct mmc_card * card)266*4882a593Smuzhiyun void mmc_remove_card_debugfs(struct mmc_card *card)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun 	debugfs_remove_recursive(card->debugfs_root);
269*4882a593Smuzhiyun 	card->debugfs_root = NULL;
270*4882a593Smuzhiyun }
271