1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * SN Platform GRU Driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * GRU DRIVER TABLES, MACROS, externs, etc
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #ifndef __GRUTABLES_H__
11*4882a593Smuzhiyun #define __GRUTABLES_H__
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun /*
14*4882a593Smuzhiyun * GRU Chiplet:
15*4882a593Smuzhiyun * The GRU is a user addressible memory accelerator. It provides
16*4882a593Smuzhiyun * several forms of load, store, memset, bcopy instructions. In addition, it
17*4882a593Smuzhiyun * contains special instructions for AMOs, sending messages to message
18*4882a593Smuzhiyun * queues, etc.
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun * The GRU is an integral part of the node controller. It connects
21*4882a593Smuzhiyun * directly to the cpu socket. In its current implementation, there are 2
22*4882a593Smuzhiyun * GRU chiplets in the node controller on each blade (~node).
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * The entire GRU memory space is fully coherent and cacheable by the cpus.
25*4882a593Smuzhiyun *
26*4882a593Smuzhiyun * Each GRU chiplet has a physical memory map that looks like the following:
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * +-----------------+
29*4882a593Smuzhiyun * |/////////////////|
30*4882a593Smuzhiyun * |/////////////////|
31*4882a593Smuzhiyun * |/////////////////|
32*4882a593Smuzhiyun * |/////////////////|
33*4882a593Smuzhiyun * |/////////////////|
34*4882a593Smuzhiyun * |/////////////////|
35*4882a593Smuzhiyun * |/////////////////|
36*4882a593Smuzhiyun * |/////////////////|
37*4882a593Smuzhiyun * +-----------------+
38*4882a593Smuzhiyun * | system control |
39*4882a593Smuzhiyun * +-----------------+ _______ +-------------+
40*4882a593Smuzhiyun * |/////////////////| / | |
41*4882a593Smuzhiyun * |/////////////////| / | |
42*4882a593Smuzhiyun * |/////////////////| / | instructions|
43*4882a593Smuzhiyun * |/////////////////| / | |
44*4882a593Smuzhiyun * |/////////////////| / | |
45*4882a593Smuzhiyun * |/////////////////| / |-------------|
46*4882a593Smuzhiyun * |/////////////////| / | |
47*4882a593Smuzhiyun * +-----------------+ | |
48*4882a593Smuzhiyun * | context 15 | | data |
49*4882a593Smuzhiyun * +-----------------+ | |
50*4882a593Smuzhiyun * | ...... | \ | |
51*4882a593Smuzhiyun * +-----------------+ \____________ +-------------+
52*4882a593Smuzhiyun * | context 1 |
53*4882a593Smuzhiyun * +-----------------+
54*4882a593Smuzhiyun * | context 0 |
55*4882a593Smuzhiyun * +-----------------+
56*4882a593Smuzhiyun *
57*4882a593Smuzhiyun * Each of the "contexts" is a chunk of memory that can be mmaped into user
58*4882a593Smuzhiyun * space. The context consists of 2 parts:
59*4882a593Smuzhiyun *
60*4882a593Smuzhiyun * - an instruction space that can be directly accessed by the user
61*4882a593Smuzhiyun * to issue GRU instructions and to check instruction status.
62*4882a593Smuzhiyun *
63*4882a593Smuzhiyun * - a data area that acts as normal RAM.
64*4882a593Smuzhiyun *
65*4882a593Smuzhiyun * User instructions contain virtual addresses of data to be accessed by the
66*4882a593Smuzhiyun * GRU. The GRU contains a TLB that is used to convert these user virtual
67*4882a593Smuzhiyun * addresses to physical addresses.
68*4882a593Smuzhiyun *
69*4882a593Smuzhiyun * The "system control" area of the GRU chiplet is used by the kernel driver
70*4882a593Smuzhiyun * to manage user contexts and to perform functions such as TLB dropin and
71*4882a593Smuzhiyun * purging.
72*4882a593Smuzhiyun *
73*4882a593Smuzhiyun * One context may be reserved for the kernel and used for cross-partition
74*4882a593Smuzhiyun * communication. The GRU will also be used to asynchronously zero out
75*4882a593Smuzhiyun * large blocks of memory (not currently implemented).
76*4882a593Smuzhiyun *
77*4882a593Smuzhiyun *
78*4882a593Smuzhiyun * Tables:
79*4882a593Smuzhiyun *
80*4882a593Smuzhiyun * VDATA-VMA Data - Holds a few parameters. Head of linked list of
81*4882a593Smuzhiyun * GTS tables for threads using the GSEG
82*4882a593Smuzhiyun * GTS - Gru Thread State - contains info for managing a GSEG context. A
83*4882a593Smuzhiyun * GTS is allocated for each thread accessing a
84*4882a593Smuzhiyun * GSEG.
85*4882a593Smuzhiyun * GTD - GRU Thread Data - contains shadow copy of GRU data when GSEG is
86*4882a593Smuzhiyun * not loaded into a GRU
87*4882a593Smuzhiyun * GMS - GRU Memory Struct - Used to manage TLB shootdowns. Tracks GRUs
88*4882a593Smuzhiyun * where a GSEG has been loaded. Similar to
89*4882a593Smuzhiyun * an mm_struct but for GRU.
90*4882a593Smuzhiyun *
91*4882a593Smuzhiyun * GS - GRU State - Used to manage the state of a GRU chiplet
92*4882a593Smuzhiyun * BS - Blade State - Used to manage state of all GRU chiplets
93*4882a593Smuzhiyun * on a blade
94*4882a593Smuzhiyun *
95*4882a593Smuzhiyun *
96*4882a593Smuzhiyun * Normal task tables for task using GRU.
97*4882a593Smuzhiyun * - 2 threads in process
98*4882a593Smuzhiyun * - 2 GSEGs open in process
99*4882a593Smuzhiyun * - GSEG1 is being used by both threads
100*4882a593Smuzhiyun * - GSEG2 is used only by thread 2
101*4882a593Smuzhiyun *
102*4882a593Smuzhiyun * task -->|
103*4882a593Smuzhiyun * task ---+---> mm ->------ (notifier) -------+-> gms
104*4882a593Smuzhiyun * | |
105*4882a593Smuzhiyun * |--> vma -> vdata ---> gts--->| GSEG1 (thread1)
106*4882a593Smuzhiyun * | | |
107*4882a593Smuzhiyun * | +-> gts--->| GSEG1 (thread2)
108*4882a593Smuzhiyun * | |
109*4882a593Smuzhiyun * |--> vma -> vdata ---> gts--->| GSEG2 (thread2)
110*4882a593Smuzhiyun * .
111*4882a593Smuzhiyun * .
112*4882a593Smuzhiyun *
113*4882a593Smuzhiyun * GSEGs are marked DONTCOPY on fork
114*4882a593Smuzhiyun *
115*4882a593Smuzhiyun * At open
116*4882a593Smuzhiyun * file.private_data -> NULL
117*4882a593Smuzhiyun *
118*4882a593Smuzhiyun * At mmap,
119*4882a593Smuzhiyun * vma -> vdata
120*4882a593Smuzhiyun *
121*4882a593Smuzhiyun * After gseg reference
122*4882a593Smuzhiyun * vma -> vdata ->gts
123*4882a593Smuzhiyun *
124*4882a593Smuzhiyun * After fork
125*4882a593Smuzhiyun * parent
126*4882a593Smuzhiyun * vma -> vdata -> gts
127*4882a593Smuzhiyun * child
128*4882a593Smuzhiyun * (vma is not copied)
129*4882a593Smuzhiyun *
130*4882a593Smuzhiyun */
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #include <linux/rmap.h>
133*4882a593Smuzhiyun #include <linux/interrupt.h>
134*4882a593Smuzhiyun #include <linux/mutex.h>
135*4882a593Smuzhiyun #include <linux/wait.h>
136*4882a593Smuzhiyun #include <linux/mmu_notifier.h>
137*4882a593Smuzhiyun #include <linux/mm_types.h>
138*4882a593Smuzhiyun #include "gru.h"
139*4882a593Smuzhiyun #include "grulib.h"
140*4882a593Smuzhiyun #include "gruhandles.h"
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun extern struct gru_stats_s gru_stats;
143*4882a593Smuzhiyun extern struct gru_blade_state *gru_base[];
144*4882a593Smuzhiyun extern unsigned long gru_start_paddr, gru_end_paddr;
145*4882a593Smuzhiyun extern void *gru_start_vaddr;
146*4882a593Smuzhiyun extern unsigned int gru_max_gids;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun #define GRU_MAX_BLADES MAX_NUMNODES
149*4882a593Smuzhiyun #define GRU_MAX_GRUS (GRU_MAX_BLADES * GRU_CHIPLETS_PER_BLADE)
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun #define GRU_DRIVER_ID_STR "SGI GRU Device Driver"
152*4882a593Smuzhiyun #define GRU_DRIVER_VERSION_STR "0.85"
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun /*
155*4882a593Smuzhiyun * GRU statistics.
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun struct gru_stats_s {
158*4882a593Smuzhiyun atomic_long_t vdata_alloc;
159*4882a593Smuzhiyun atomic_long_t vdata_free;
160*4882a593Smuzhiyun atomic_long_t gts_alloc;
161*4882a593Smuzhiyun atomic_long_t gts_free;
162*4882a593Smuzhiyun atomic_long_t gms_alloc;
163*4882a593Smuzhiyun atomic_long_t gms_free;
164*4882a593Smuzhiyun atomic_long_t gts_double_allocate;
165*4882a593Smuzhiyun atomic_long_t assign_context;
166*4882a593Smuzhiyun atomic_long_t assign_context_failed;
167*4882a593Smuzhiyun atomic_long_t free_context;
168*4882a593Smuzhiyun atomic_long_t load_user_context;
169*4882a593Smuzhiyun atomic_long_t load_kernel_context;
170*4882a593Smuzhiyun atomic_long_t lock_kernel_context;
171*4882a593Smuzhiyun atomic_long_t unlock_kernel_context;
172*4882a593Smuzhiyun atomic_long_t steal_user_context;
173*4882a593Smuzhiyun atomic_long_t steal_kernel_context;
174*4882a593Smuzhiyun atomic_long_t steal_context_failed;
175*4882a593Smuzhiyun atomic_long_t nopfn;
176*4882a593Smuzhiyun atomic_long_t asid_new;
177*4882a593Smuzhiyun atomic_long_t asid_next;
178*4882a593Smuzhiyun atomic_long_t asid_wrap;
179*4882a593Smuzhiyun atomic_long_t asid_reuse;
180*4882a593Smuzhiyun atomic_long_t intr;
181*4882a593Smuzhiyun atomic_long_t intr_cbr;
182*4882a593Smuzhiyun atomic_long_t intr_tfh;
183*4882a593Smuzhiyun atomic_long_t intr_spurious;
184*4882a593Smuzhiyun atomic_long_t intr_mm_lock_failed;
185*4882a593Smuzhiyun atomic_long_t call_os;
186*4882a593Smuzhiyun atomic_long_t call_os_wait_queue;
187*4882a593Smuzhiyun atomic_long_t user_flush_tlb;
188*4882a593Smuzhiyun atomic_long_t user_unload_context;
189*4882a593Smuzhiyun atomic_long_t user_exception;
190*4882a593Smuzhiyun atomic_long_t set_context_option;
191*4882a593Smuzhiyun atomic_long_t check_context_retarget_intr;
192*4882a593Smuzhiyun atomic_long_t check_context_unload;
193*4882a593Smuzhiyun atomic_long_t tlb_dropin;
194*4882a593Smuzhiyun atomic_long_t tlb_preload_page;
195*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_no_asid;
196*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_upm;
197*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_invalid;
198*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_range_active;
199*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_idle;
200*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_fmm;
201*4882a593Smuzhiyun atomic_long_t tlb_dropin_fail_no_exception;
202*4882a593Smuzhiyun atomic_long_t tfh_stale_on_fault;
203*4882a593Smuzhiyun atomic_long_t mmu_invalidate_range;
204*4882a593Smuzhiyun atomic_long_t mmu_invalidate_page;
205*4882a593Smuzhiyun atomic_long_t flush_tlb;
206*4882a593Smuzhiyun atomic_long_t flush_tlb_gru;
207*4882a593Smuzhiyun atomic_long_t flush_tlb_gru_tgh;
208*4882a593Smuzhiyun atomic_long_t flush_tlb_gru_zero_asid;
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun atomic_long_t copy_gpa;
211*4882a593Smuzhiyun atomic_long_t read_gpa;
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun atomic_long_t mesq_receive;
214*4882a593Smuzhiyun atomic_long_t mesq_receive_none;
215*4882a593Smuzhiyun atomic_long_t mesq_send;
216*4882a593Smuzhiyun atomic_long_t mesq_send_failed;
217*4882a593Smuzhiyun atomic_long_t mesq_noop;
218*4882a593Smuzhiyun atomic_long_t mesq_send_unexpected_error;
219*4882a593Smuzhiyun atomic_long_t mesq_send_lb_overflow;
220*4882a593Smuzhiyun atomic_long_t mesq_send_qlimit_reached;
221*4882a593Smuzhiyun atomic_long_t mesq_send_amo_nacked;
222*4882a593Smuzhiyun atomic_long_t mesq_send_put_nacked;
223*4882a593Smuzhiyun atomic_long_t mesq_page_overflow;
224*4882a593Smuzhiyun atomic_long_t mesq_qf_locked;
225*4882a593Smuzhiyun atomic_long_t mesq_qf_noop_not_full;
226*4882a593Smuzhiyun atomic_long_t mesq_qf_switch_head_failed;
227*4882a593Smuzhiyun atomic_long_t mesq_qf_unexpected_error;
228*4882a593Smuzhiyun atomic_long_t mesq_noop_unexpected_error;
229*4882a593Smuzhiyun atomic_long_t mesq_noop_lb_overflow;
230*4882a593Smuzhiyun atomic_long_t mesq_noop_qlimit_reached;
231*4882a593Smuzhiyun atomic_long_t mesq_noop_amo_nacked;
232*4882a593Smuzhiyun atomic_long_t mesq_noop_put_nacked;
233*4882a593Smuzhiyun atomic_long_t mesq_noop_page_overflow;
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun enum mcs_op {cchop_allocate, cchop_start, cchop_interrupt, cchop_interrupt_sync,
238*4882a593Smuzhiyun cchop_deallocate, tfhop_write_only, tfhop_write_restart,
239*4882a593Smuzhiyun tghop_invalidate, mcsop_last};
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun struct mcs_op_statistic {
242*4882a593Smuzhiyun atomic_long_t count;
243*4882a593Smuzhiyun atomic_long_t total;
244*4882a593Smuzhiyun unsigned long max;
245*4882a593Smuzhiyun };
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun extern struct mcs_op_statistic mcs_op_statistics[mcsop_last];
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun #define OPT_DPRINT 1
250*4882a593Smuzhiyun #define OPT_STATS 2
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun #define IRQ_GRU 110 /* Starting IRQ number for interrupts */
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* Delay in jiffies between attempts to assign a GRU context */
256*4882a593Smuzhiyun #define GRU_ASSIGN_DELAY ((HZ * 20) / 1000)
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun /*
259*4882a593Smuzhiyun * If a process has it's context stolen, min delay in jiffies before trying to
260*4882a593Smuzhiyun * steal a context from another process.
261*4882a593Smuzhiyun */
262*4882a593Smuzhiyun #define GRU_STEAL_DELAY ((HZ * 200) / 1000)
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun #define STAT(id) do { \
265*4882a593Smuzhiyun if (gru_options & OPT_STATS) \
266*4882a593Smuzhiyun atomic_long_inc(&gru_stats.id); \
267*4882a593Smuzhiyun } while (0)
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun #ifdef CONFIG_SGI_GRU_DEBUG
270*4882a593Smuzhiyun #define gru_dbg(dev, fmt, x...) \
271*4882a593Smuzhiyun do { \
272*4882a593Smuzhiyun if (gru_options & OPT_DPRINT) \
273*4882a593Smuzhiyun printk(KERN_DEBUG "GRU:%d %s: " fmt, smp_processor_id(), __func__, x);\
274*4882a593Smuzhiyun } while (0)
275*4882a593Smuzhiyun #else
276*4882a593Smuzhiyun #define gru_dbg(x...)
277*4882a593Smuzhiyun #endif
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
280*4882a593Smuzhiyun * ASID management
281*4882a593Smuzhiyun */
282*4882a593Smuzhiyun #define MAX_ASID 0xfffff0
283*4882a593Smuzhiyun #define MIN_ASID 8
284*4882a593Smuzhiyun #define ASID_INC 8 /* number of regions */
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun /* Generate a GRU asid value from a GRU base asid & a virtual address. */
287*4882a593Smuzhiyun #define VADDR_HI_BIT 64
288*4882a593Smuzhiyun #define GRUREGION(addr) ((addr) >> (VADDR_HI_BIT - 3) & 3)
289*4882a593Smuzhiyun #define GRUASID(asid, addr) ((asid) + GRUREGION(addr))
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun /*------------------------------------------------------------------------------
292*4882a593Smuzhiyun * File & VMS Tables
293*4882a593Smuzhiyun */
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun struct gru_state;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /*
298*4882a593Smuzhiyun * This structure is pointed to from the mmstruct via the notifier pointer.
299*4882a593Smuzhiyun * There is one of these per address space.
300*4882a593Smuzhiyun */
301*4882a593Smuzhiyun struct gru_mm_tracker { /* pack to reduce size */
302*4882a593Smuzhiyun unsigned int mt_asid_gen:24; /* ASID wrap count */
303*4882a593Smuzhiyun unsigned int mt_asid:24; /* current base ASID for gru */
304*4882a593Smuzhiyun unsigned short mt_ctxbitmap:16;/* bitmap of contexts using
305*4882a593Smuzhiyun asid */
306*4882a593Smuzhiyun } __attribute__ ((packed));
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun struct gru_mm_struct {
309*4882a593Smuzhiyun struct mmu_notifier ms_notifier;
310*4882a593Smuzhiyun spinlock_t ms_asid_lock; /* protects ASID assignment */
311*4882a593Smuzhiyun atomic_t ms_range_active;/* num range_invals active */
312*4882a593Smuzhiyun wait_queue_head_t ms_wait_queue;
313*4882a593Smuzhiyun DECLARE_BITMAP(ms_asidmap, GRU_MAX_GRUS);
314*4882a593Smuzhiyun struct gru_mm_tracker ms_asids[GRU_MAX_GRUS];
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun /*
318*4882a593Smuzhiyun * One of these structures is allocated when a GSEG is mmaped. The
319*4882a593Smuzhiyun * structure is pointed to by the vma->vm_private_data field in the vma struct.
320*4882a593Smuzhiyun */
321*4882a593Smuzhiyun struct gru_vma_data {
322*4882a593Smuzhiyun spinlock_t vd_lock; /* Serialize access to vma */
323*4882a593Smuzhiyun struct list_head vd_head; /* head of linked list of gts */
324*4882a593Smuzhiyun long vd_user_options;/* misc user option flags */
325*4882a593Smuzhiyun int vd_cbr_au_count;
326*4882a593Smuzhiyun int vd_dsr_au_count;
327*4882a593Smuzhiyun unsigned char vd_tlb_preload_count;
328*4882a593Smuzhiyun };
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun /*
331*4882a593Smuzhiyun * One of these is allocated for each thread accessing a mmaped GRU. A linked
332*4882a593Smuzhiyun * list of these structure is hung off the struct gru_vma_data in the mm_struct.
333*4882a593Smuzhiyun */
334*4882a593Smuzhiyun struct gru_thread_state {
335*4882a593Smuzhiyun struct list_head ts_next; /* list - head at vma-private */
336*4882a593Smuzhiyun struct mutex ts_ctxlock; /* load/unload CTX lock */
337*4882a593Smuzhiyun struct mm_struct *ts_mm; /* mm currently mapped to
338*4882a593Smuzhiyun context */
339*4882a593Smuzhiyun struct vm_area_struct *ts_vma; /* vma of GRU context */
340*4882a593Smuzhiyun struct gru_state *ts_gru; /* GRU where the context is
341*4882a593Smuzhiyun loaded */
342*4882a593Smuzhiyun struct gru_mm_struct *ts_gms; /* asid & ioproc struct */
343*4882a593Smuzhiyun unsigned char ts_tlb_preload_count; /* TLB preload pages */
344*4882a593Smuzhiyun unsigned long ts_cbr_map; /* map of allocated CBRs */
345*4882a593Smuzhiyun unsigned long ts_dsr_map; /* map of allocated DATA
346*4882a593Smuzhiyun resources */
347*4882a593Smuzhiyun unsigned long ts_steal_jiffies;/* jiffies when context last
348*4882a593Smuzhiyun stolen */
349*4882a593Smuzhiyun long ts_user_options;/* misc user option flags */
350*4882a593Smuzhiyun pid_t ts_tgid_owner; /* task that is using the
351*4882a593Smuzhiyun context - for migration */
352*4882a593Smuzhiyun short ts_user_blade_id;/* user selected blade */
353*4882a593Smuzhiyun char ts_user_chiplet_id;/* user selected chiplet */
354*4882a593Smuzhiyun unsigned short ts_sizeavail; /* Pagesizes in use */
355*4882a593Smuzhiyun int ts_tsid; /* thread that owns the
356*4882a593Smuzhiyun structure */
357*4882a593Smuzhiyun int ts_tlb_int_select;/* target cpu if interrupts
358*4882a593Smuzhiyun enabled */
359*4882a593Smuzhiyun int ts_ctxnum; /* context number where the
360*4882a593Smuzhiyun context is loaded */
361*4882a593Smuzhiyun atomic_t ts_refcnt; /* reference count GTS */
362*4882a593Smuzhiyun unsigned char ts_dsr_au_count;/* Number of DSR resources
363*4882a593Smuzhiyun required for contest */
364*4882a593Smuzhiyun unsigned char ts_cbr_au_count;/* Number of CBR resources
365*4882a593Smuzhiyun required for contest */
366*4882a593Smuzhiyun char ts_cch_req_slice;/* CCH packet slice */
367*4882a593Smuzhiyun char ts_blade; /* If >= 0, migrate context if
368*4882a593Smuzhiyun ref from different blade */
369*4882a593Smuzhiyun char ts_force_cch_reload;
370*4882a593Smuzhiyun char ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
371*4882a593Smuzhiyun allocated CB */
372*4882a593Smuzhiyun int ts_data_valid; /* Indicates if ts_gdata has
373*4882a593Smuzhiyun valid data */
374*4882a593Smuzhiyun struct gru_gseg_statistics ustats; /* User statistics */
375*4882a593Smuzhiyun unsigned long ts_gdata[]; /* save area for GRU data (CB,
376*4882a593Smuzhiyun DS, CBE) */
377*4882a593Smuzhiyun };
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun /*
380*4882a593Smuzhiyun * Threaded programs actually allocate an array of GSEGs when a context is
381*4882a593Smuzhiyun * created. Each thread uses a separate GSEG. TSID is the index into the GSEG
382*4882a593Smuzhiyun * array.
383*4882a593Smuzhiyun */
384*4882a593Smuzhiyun #define TSID(a, v) (((a) - (v)->vm_start) / GRU_GSEG_PAGESIZE)
385*4882a593Smuzhiyun #define UGRUADDR(gts) ((gts)->ts_vma->vm_start + \
386*4882a593Smuzhiyun (gts)->ts_tsid * GRU_GSEG_PAGESIZE)
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun #define NULLCTX (-1) /* if context not loaded into GRU */
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
391*4882a593Smuzhiyun * GRU State Tables
392*4882a593Smuzhiyun */
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /*
395*4882a593Smuzhiyun * One of these exists for each GRU chiplet.
396*4882a593Smuzhiyun */
397*4882a593Smuzhiyun struct gru_state {
398*4882a593Smuzhiyun struct gru_blade_state *gs_blade; /* GRU state for entire
399*4882a593Smuzhiyun blade */
400*4882a593Smuzhiyun unsigned long gs_gru_base_paddr; /* Physical address of
401*4882a593Smuzhiyun gru segments (64) */
402*4882a593Smuzhiyun void *gs_gru_base_vaddr; /* Virtual address of
403*4882a593Smuzhiyun gru segments (64) */
404*4882a593Smuzhiyun unsigned short gs_gid; /* unique GRU number */
405*4882a593Smuzhiyun unsigned short gs_blade_id; /* blade of GRU */
406*4882a593Smuzhiyun unsigned char gs_chiplet_id; /* blade chiplet of GRU */
407*4882a593Smuzhiyun unsigned char gs_tgh_local_shift; /* used to pick TGH for
408*4882a593Smuzhiyun local flush */
409*4882a593Smuzhiyun unsigned char gs_tgh_first_remote; /* starting TGH# for
410*4882a593Smuzhiyun remote flush */
411*4882a593Smuzhiyun spinlock_t gs_asid_lock; /* lock used for
412*4882a593Smuzhiyun assigning asids */
413*4882a593Smuzhiyun spinlock_t gs_lock; /* lock used for
414*4882a593Smuzhiyun assigning contexts */
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun /* -- the following are protected by the gs_asid_lock spinlock ---- */
417*4882a593Smuzhiyun unsigned int gs_asid; /* Next availe ASID */
418*4882a593Smuzhiyun unsigned int gs_asid_limit; /* Limit of available
419*4882a593Smuzhiyun ASIDs */
420*4882a593Smuzhiyun unsigned int gs_asid_gen; /* asid generation.
421*4882a593Smuzhiyun Inc on wrap */
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun /* --- the following fields are protected by the gs_lock spinlock --- */
424*4882a593Smuzhiyun unsigned long gs_context_map; /* bitmap to manage
425*4882a593Smuzhiyun contexts in use */
426*4882a593Smuzhiyun unsigned long gs_cbr_map; /* bitmap to manage CB
427*4882a593Smuzhiyun resources */
428*4882a593Smuzhiyun unsigned long gs_dsr_map; /* bitmap used to manage
429*4882a593Smuzhiyun DATA resources */
430*4882a593Smuzhiyun unsigned int gs_reserved_cbrs; /* Number of kernel-
431*4882a593Smuzhiyun reserved cbrs */
432*4882a593Smuzhiyun unsigned int gs_reserved_dsr_bytes; /* Bytes of kernel-
433*4882a593Smuzhiyun reserved dsrs */
434*4882a593Smuzhiyun unsigned short gs_active_contexts; /* number of contexts
435*4882a593Smuzhiyun in use */
436*4882a593Smuzhiyun struct gru_thread_state *gs_gts[GRU_NUM_CCH]; /* GTS currently using
437*4882a593Smuzhiyun the context */
438*4882a593Smuzhiyun int gs_irq[GRU_NUM_TFM]; /* Interrupt irqs */
439*4882a593Smuzhiyun };
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun /*
442*4882a593Smuzhiyun * This structure contains the GRU state for all the GRUs on a blade.
443*4882a593Smuzhiyun */
444*4882a593Smuzhiyun struct gru_blade_state {
445*4882a593Smuzhiyun void *kernel_cb; /* First kernel
446*4882a593Smuzhiyun reserved cb */
447*4882a593Smuzhiyun void *kernel_dsr; /* First kernel
448*4882a593Smuzhiyun reserved DSR */
449*4882a593Smuzhiyun struct rw_semaphore bs_kgts_sema; /* lock for kgts */
450*4882a593Smuzhiyun struct gru_thread_state *bs_kgts; /* GTS for kernel use */
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun /* ---- the following are used for managing kernel async GRU CBRs --- */
453*4882a593Smuzhiyun int bs_async_dsr_bytes; /* DSRs for async */
454*4882a593Smuzhiyun int bs_async_cbrs; /* CBRs AU for async */
455*4882a593Smuzhiyun struct completion *bs_async_wq;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun /* ---- the following are protected by the bs_lock spinlock ---- */
458*4882a593Smuzhiyun spinlock_t bs_lock; /* lock used for
459*4882a593Smuzhiyun stealing contexts */
460*4882a593Smuzhiyun int bs_lru_ctxnum; /* STEAL - last context
461*4882a593Smuzhiyun stolen */
462*4882a593Smuzhiyun struct gru_state *bs_lru_gru; /* STEAL - last gru
463*4882a593Smuzhiyun stolen */
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun struct gru_state bs_grus[GRU_CHIPLETS_PER_BLADE];
466*4882a593Smuzhiyun };
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
469*4882a593Smuzhiyun * Address Primitives
470*4882a593Smuzhiyun */
471*4882a593Smuzhiyun #define get_tfm_for_cpu(g, c) \
472*4882a593Smuzhiyun ((struct gru_tlb_fault_map *)get_tfm((g)->gs_gru_base_vaddr, (c)))
473*4882a593Smuzhiyun #define get_tfh_by_index(g, i) \
474*4882a593Smuzhiyun ((struct gru_tlb_fault_handle *)get_tfh((g)->gs_gru_base_vaddr, (i)))
475*4882a593Smuzhiyun #define get_tgh_by_index(g, i) \
476*4882a593Smuzhiyun ((struct gru_tlb_global_handle *)get_tgh((g)->gs_gru_base_vaddr, (i)))
477*4882a593Smuzhiyun #define get_cbe_by_index(g, i) \
478*4882a593Smuzhiyun ((struct gru_control_block_extended *)get_cbe((g)->gs_gru_base_vaddr,\
479*4882a593Smuzhiyun (i)))
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
482*4882a593Smuzhiyun * Useful Macros
483*4882a593Smuzhiyun */
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun /* Given a blade# & chiplet#, get a pointer to the GRU */
486*4882a593Smuzhiyun #define get_gru(b, c) (&gru_base[b]->bs_grus[c])
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /* Number of bytes to save/restore when unloading/loading GRU contexts */
489*4882a593Smuzhiyun #define DSR_BYTES(dsr) ((dsr) * GRU_DSR_AU_BYTES)
490*4882a593Smuzhiyun #define CBR_BYTES(cbr) ((cbr) * GRU_HANDLE_BYTES * GRU_CBR_AU_SIZE * 2)
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun /* Convert a user CB number to the actual CBRNUM */
493*4882a593Smuzhiyun #define thread_cbr_number(gts, n) ((gts)->ts_cbr_idx[(n) / GRU_CBR_AU_SIZE] \
494*4882a593Smuzhiyun * GRU_CBR_AU_SIZE + (n) % GRU_CBR_AU_SIZE)
495*4882a593Smuzhiyun
496*4882a593Smuzhiyun /* Convert a gid to a pointer to the GRU */
497*4882a593Smuzhiyun #define GID_TO_GRU(gid) \
498*4882a593Smuzhiyun (gru_base[(gid) / GRU_CHIPLETS_PER_BLADE] ? \
499*4882a593Smuzhiyun (&gru_base[(gid) / GRU_CHIPLETS_PER_BLADE]-> \
500*4882a593Smuzhiyun bs_grus[(gid) % GRU_CHIPLETS_PER_BLADE]) : \
501*4882a593Smuzhiyun NULL)
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun /* Scan all active GRUs in a GRU bitmap */
504*4882a593Smuzhiyun #define for_each_gru_in_bitmap(gid, map) \
505*4882a593Smuzhiyun for_each_set_bit((gid), (map), GRU_MAX_GRUS)
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun /* Scan all active GRUs on a specific blade */
508*4882a593Smuzhiyun #define for_each_gru_on_blade(gru, nid, i) \
509*4882a593Smuzhiyun for ((gru) = gru_base[nid]->bs_grus, (i) = 0; \
510*4882a593Smuzhiyun (i) < GRU_CHIPLETS_PER_BLADE; \
511*4882a593Smuzhiyun (i)++, (gru)++)
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun /* Scan all GRUs */
514*4882a593Smuzhiyun #define foreach_gid(gid) \
515*4882a593Smuzhiyun for ((gid) = 0; (gid) < gru_max_gids; (gid)++)
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun /* Scan all active GTSs on a gru. Note: must hold ss_lock to use this macro. */
518*4882a593Smuzhiyun #define for_each_gts_on_gru(gts, gru, ctxnum) \
519*4882a593Smuzhiyun for ((ctxnum) = 0; (ctxnum) < GRU_NUM_CCH; (ctxnum)++) \
520*4882a593Smuzhiyun if (((gts) = (gru)->gs_gts[ctxnum]))
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun /* Scan each CBR whose bit is set in a TFM (or copy of) */
523*4882a593Smuzhiyun #define for_each_cbr_in_tfm(i, map) \
524*4882a593Smuzhiyun for_each_set_bit((i), (map), GRU_NUM_CBE)
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun /* Scan each CBR in a CBR bitmap. Note: multiple CBRs in an allocation unit */
527*4882a593Smuzhiyun #define for_each_cbr_in_allocation_map(i, map, k) \
528*4882a593Smuzhiyun for_each_set_bit((k), (map), GRU_CBR_AU) \
529*4882a593Smuzhiyun for ((i) = (k)*GRU_CBR_AU_SIZE; \
530*4882a593Smuzhiyun (i) < ((k) + 1) * GRU_CBR_AU_SIZE; (i)++)
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* Scan each DSR in a DSR bitmap. Note: multiple DSRs in an allocation unit */
533*4882a593Smuzhiyun #define for_each_dsr_in_allocation_map(i, map, k) \
534*4882a593Smuzhiyun for_each_set_bit((k), (const unsigned long *)(map), GRU_DSR_AU) \
535*4882a593Smuzhiyun for ((i) = (k) * GRU_DSR_AU_CL; \
536*4882a593Smuzhiyun (i) < ((k) + 1) * GRU_DSR_AU_CL; (i)++)
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun #define gseg_physical_address(gru, ctxnum) \
539*4882a593Smuzhiyun ((gru)->gs_gru_base_paddr + ctxnum * GRU_GSEG_STRIDE)
540*4882a593Smuzhiyun #define gseg_virtual_address(gru, ctxnum) \
541*4882a593Smuzhiyun ((gru)->gs_gru_base_vaddr + ctxnum * GRU_GSEG_STRIDE)
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
544*4882a593Smuzhiyun * Lock / Unlock GRU handles
545*4882a593Smuzhiyun * Use the "delresp" bit in the handle as a "lock" bit.
546*4882a593Smuzhiyun */
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun /* Lock hierarchy checking enabled only in emulator */
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun /* 0 = lock failed, 1 = locked */
__trylock_handle(void * h)551*4882a593Smuzhiyun static inline int __trylock_handle(void *h)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun return !test_and_set_bit(1, h);
554*4882a593Smuzhiyun }
555*4882a593Smuzhiyun
__lock_handle(void * h)556*4882a593Smuzhiyun static inline void __lock_handle(void *h)
557*4882a593Smuzhiyun {
558*4882a593Smuzhiyun while (test_and_set_bit(1, h))
559*4882a593Smuzhiyun cpu_relax();
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun
__unlock_handle(void * h)562*4882a593Smuzhiyun static inline void __unlock_handle(void *h)
563*4882a593Smuzhiyun {
564*4882a593Smuzhiyun clear_bit(1, h);
565*4882a593Smuzhiyun }
566*4882a593Smuzhiyun
trylock_cch_handle(struct gru_context_configuration_handle * cch)567*4882a593Smuzhiyun static inline int trylock_cch_handle(struct gru_context_configuration_handle *cch)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun return __trylock_handle(cch);
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun
lock_cch_handle(struct gru_context_configuration_handle * cch)572*4882a593Smuzhiyun static inline void lock_cch_handle(struct gru_context_configuration_handle *cch)
573*4882a593Smuzhiyun {
574*4882a593Smuzhiyun __lock_handle(cch);
575*4882a593Smuzhiyun }
576*4882a593Smuzhiyun
unlock_cch_handle(struct gru_context_configuration_handle * cch)577*4882a593Smuzhiyun static inline void unlock_cch_handle(struct gru_context_configuration_handle
578*4882a593Smuzhiyun *cch)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun __unlock_handle(cch);
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun
lock_tgh_handle(struct gru_tlb_global_handle * tgh)583*4882a593Smuzhiyun static inline void lock_tgh_handle(struct gru_tlb_global_handle *tgh)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun __lock_handle(tgh);
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
unlock_tgh_handle(struct gru_tlb_global_handle * tgh)588*4882a593Smuzhiyun static inline void unlock_tgh_handle(struct gru_tlb_global_handle *tgh)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun __unlock_handle(tgh);
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun
is_kernel_context(struct gru_thread_state * gts)593*4882a593Smuzhiyun static inline int is_kernel_context(struct gru_thread_state *gts)
594*4882a593Smuzhiyun {
595*4882a593Smuzhiyun return !gts->ts_mm;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun /*
599*4882a593Smuzhiyun * The following are for Nehelem-EX. A more general scheme is needed for
600*4882a593Smuzhiyun * future processors.
601*4882a593Smuzhiyun */
602*4882a593Smuzhiyun #define UV_MAX_INT_CORES 8
603*4882a593Smuzhiyun #define uv_cpu_socket_number(p) ((cpu_physical_id(p) >> 5) & 1)
604*4882a593Smuzhiyun #define uv_cpu_ht_number(p) (cpu_physical_id(p) & 1)
605*4882a593Smuzhiyun #define uv_cpu_core_number(p) (((cpu_physical_id(p) >> 2) & 4) | \
606*4882a593Smuzhiyun ((cpu_physical_id(p) >> 1) & 3))
607*4882a593Smuzhiyun /*-----------------------------------------------------------------------------
608*4882a593Smuzhiyun * Function prototypes & externs
609*4882a593Smuzhiyun */
610*4882a593Smuzhiyun struct gru_unload_context_req;
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun extern const struct vm_operations_struct gru_vm_ops;
613*4882a593Smuzhiyun extern struct device *grudev;
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun extern struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma,
616*4882a593Smuzhiyun int tsid);
617*4882a593Smuzhiyun extern struct gru_thread_state *gru_find_thread_state(struct vm_area_struct
618*4882a593Smuzhiyun *vma, int tsid);
619*4882a593Smuzhiyun extern struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct
620*4882a593Smuzhiyun *vma, int tsid);
621*4882a593Smuzhiyun extern struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts);
622*4882a593Smuzhiyun extern void gru_load_context(struct gru_thread_state *gts);
623*4882a593Smuzhiyun extern void gru_steal_context(struct gru_thread_state *gts);
624*4882a593Smuzhiyun extern void gru_unload_context(struct gru_thread_state *gts, int savestate);
625*4882a593Smuzhiyun extern int gru_update_cch(struct gru_thread_state *gts);
626*4882a593Smuzhiyun extern void gts_drop(struct gru_thread_state *gts);
627*4882a593Smuzhiyun extern void gru_tgh_flush_init(struct gru_state *gru);
628*4882a593Smuzhiyun extern int gru_kservices_init(void);
629*4882a593Smuzhiyun extern void gru_kservices_exit(void);
630*4882a593Smuzhiyun extern irqreturn_t gru0_intr(int irq, void *dev_id);
631*4882a593Smuzhiyun extern irqreturn_t gru1_intr(int irq, void *dev_id);
632*4882a593Smuzhiyun extern irqreturn_t gru_intr_mblade(int irq, void *dev_id);
633*4882a593Smuzhiyun extern int gru_dump_chiplet_request(unsigned long arg);
634*4882a593Smuzhiyun extern long gru_get_gseg_statistics(unsigned long arg);
635*4882a593Smuzhiyun extern int gru_handle_user_call_os(unsigned long address);
636*4882a593Smuzhiyun extern int gru_user_flush_tlb(unsigned long arg);
637*4882a593Smuzhiyun extern int gru_user_unload_context(unsigned long arg);
638*4882a593Smuzhiyun extern int gru_get_exception_detail(unsigned long arg);
639*4882a593Smuzhiyun extern int gru_set_context_option(unsigned long address);
640*4882a593Smuzhiyun extern void gru_check_context_placement(struct gru_thread_state *gts);
641*4882a593Smuzhiyun extern int gru_cpu_fault_map_id(void);
642*4882a593Smuzhiyun extern struct vm_area_struct *gru_find_vma(unsigned long vaddr);
643*4882a593Smuzhiyun extern void gru_flush_all_tlb(struct gru_state *gru);
644*4882a593Smuzhiyun extern int gru_proc_init(void);
645*4882a593Smuzhiyun extern void gru_proc_exit(void);
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun extern struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
648*4882a593Smuzhiyun int cbr_au_count, int dsr_au_count,
649*4882a593Smuzhiyun unsigned char tlb_preload_count, int options, int tsid);
650*4882a593Smuzhiyun extern unsigned long gru_reserve_cb_resources(struct gru_state *gru,
651*4882a593Smuzhiyun int cbr_au_count, char *cbmap);
652*4882a593Smuzhiyun extern unsigned long gru_reserve_ds_resources(struct gru_state *gru,
653*4882a593Smuzhiyun int dsr_au_count, char *dsmap);
654*4882a593Smuzhiyun extern vm_fault_t gru_fault(struct vm_fault *vmf);
655*4882a593Smuzhiyun extern struct gru_mm_struct *gru_register_mmu_notifier(void);
656*4882a593Smuzhiyun extern void gru_drop_mmu_notifier(struct gru_mm_struct *gms);
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun extern int gru_ktest(unsigned long arg);
659*4882a593Smuzhiyun extern void gru_flush_tlb_range(struct gru_mm_struct *gms, unsigned long start,
660*4882a593Smuzhiyun unsigned long len);
661*4882a593Smuzhiyun
662*4882a593Smuzhiyun extern unsigned long gru_options;
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun #endif /* __GRUTABLES_H__ */
665