1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2005-2007 Jiri Slaby <jirislaby@gmail.com>
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * You need a userspace library to cooperate with this driver. It (and other
6*4882a593Smuzhiyun * info) may be obtained here:
7*4882a593Smuzhiyun * http://www.fi.muni.cz/~xslaby/phantom.html
8*4882a593Smuzhiyun * or alternatively, you might use OpenHaptics provided by Sensable.
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <linux/compat.h>
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun #include <linux/device.h>
15*4882a593Smuzhiyun #include <linux/pci.h>
16*4882a593Smuzhiyun #include <linux/fs.h>
17*4882a593Smuzhiyun #include <linux/poll.h>
18*4882a593Smuzhiyun #include <linux/interrupt.h>
19*4882a593Smuzhiyun #include <linux/cdev.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/phantom.h>
22*4882a593Smuzhiyun #include <linux/sched.h>
23*4882a593Smuzhiyun #include <linux/mutex.h>
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #include <linux/atomic.h>
26*4882a593Smuzhiyun #include <asm/io.h>
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define PHANTOM_VERSION "n0.9.8"
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #define PHANTOM_MAX_MINORS 8
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #define PHN_IRQCTL 0x4c /* irq control in caddr space */
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun #define PHB_RUNNING 1
35*4882a593Smuzhiyun #define PHB_NOT_OH 2
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun static DEFINE_MUTEX(phantom_mutex);
38*4882a593Smuzhiyun static struct class *phantom_class;
39*4882a593Smuzhiyun static int phantom_major;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun struct phantom_device {
42*4882a593Smuzhiyun unsigned int opened;
43*4882a593Smuzhiyun void __iomem *caddr;
44*4882a593Smuzhiyun u32 __iomem *iaddr;
45*4882a593Smuzhiyun u32 __iomem *oaddr;
46*4882a593Smuzhiyun unsigned long status;
47*4882a593Smuzhiyun atomic_t counter;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun wait_queue_head_t wait;
50*4882a593Smuzhiyun struct cdev cdev;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun struct mutex open_lock;
53*4882a593Smuzhiyun spinlock_t regs_lock;
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun /* used in NOT_OH mode */
56*4882a593Smuzhiyun struct phm_regs oregs;
57*4882a593Smuzhiyun u32 ctl_reg;
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static unsigned char phantom_devices[PHANTOM_MAX_MINORS];
61*4882a593Smuzhiyun
phantom_status(struct phantom_device * dev,unsigned long newstat)62*4882a593Smuzhiyun static int phantom_status(struct phantom_device *dev, unsigned long newstat)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun pr_debug("phantom_status %lx %lx\n", dev->status, newstat);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if (!(dev->status & PHB_RUNNING) && (newstat & PHB_RUNNING)) {
67*4882a593Smuzhiyun atomic_set(&dev->counter, 0);
68*4882a593Smuzhiyun iowrite32(PHN_CTL_IRQ, dev->iaddr + PHN_CONTROL);
69*4882a593Smuzhiyun iowrite32(0x43, dev->caddr + PHN_IRQCTL);
70*4882a593Smuzhiyun ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
71*4882a593Smuzhiyun } else if ((dev->status & PHB_RUNNING) && !(newstat & PHB_RUNNING)) {
72*4882a593Smuzhiyun iowrite32(0, dev->caddr + PHN_IRQCTL);
73*4882a593Smuzhiyun ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun dev->status = newstat;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return 0;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /*
82*4882a593Smuzhiyun * File ops
83*4882a593Smuzhiyun */
84*4882a593Smuzhiyun
phantom_ioctl(struct file * file,unsigned int cmd,unsigned long arg)85*4882a593Smuzhiyun static long phantom_ioctl(struct file *file, unsigned int cmd,
86*4882a593Smuzhiyun unsigned long arg)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun struct phantom_device *dev = file->private_data;
89*4882a593Smuzhiyun struct phm_regs rs;
90*4882a593Smuzhiyun struct phm_reg r;
91*4882a593Smuzhiyun void __user *argp = (void __user *)arg;
92*4882a593Smuzhiyun unsigned long flags;
93*4882a593Smuzhiyun unsigned int i;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun switch (cmd) {
96*4882a593Smuzhiyun case PHN_SETREG:
97*4882a593Smuzhiyun case PHN_SET_REG:
98*4882a593Smuzhiyun if (copy_from_user(&r, argp, sizeof(r)))
99*4882a593Smuzhiyun return -EFAULT;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if (r.reg > 7)
102*4882a593Smuzhiyun return -EINVAL;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun spin_lock_irqsave(&dev->regs_lock, flags);
105*4882a593Smuzhiyun if (r.reg == PHN_CONTROL && (r.value & PHN_CTL_IRQ) &&
106*4882a593Smuzhiyun phantom_status(dev, dev->status | PHB_RUNNING)){
107*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->regs_lock, flags);
108*4882a593Smuzhiyun return -ENODEV;
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun pr_debug("phantom: writing %x to %u\n", r.value, r.reg);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun /* preserve amp bit (don't allow to change it when in NOT_OH) */
114*4882a593Smuzhiyun if (r.reg == PHN_CONTROL && (dev->status & PHB_NOT_OH)) {
115*4882a593Smuzhiyun r.value &= ~PHN_CTL_AMP;
116*4882a593Smuzhiyun r.value |= dev->ctl_reg & PHN_CTL_AMP;
117*4882a593Smuzhiyun dev->ctl_reg = r.value;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun iowrite32(r.value, dev->iaddr + r.reg);
121*4882a593Smuzhiyun ioread32(dev->iaddr); /* PCI posting */
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (r.reg == PHN_CONTROL && !(r.value & PHN_CTL_IRQ))
124*4882a593Smuzhiyun phantom_status(dev, dev->status & ~PHB_RUNNING);
125*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->regs_lock, flags);
126*4882a593Smuzhiyun break;
127*4882a593Smuzhiyun case PHN_SETREGS:
128*4882a593Smuzhiyun case PHN_SET_REGS:
129*4882a593Smuzhiyun if (copy_from_user(&rs, argp, sizeof(rs)))
130*4882a593Smuzhiyun return -EFAULT;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun pr_debug("phantom: SRS %u regs %x\n", rs.count, rs.mask);
133*4882a593Smuzhiyun spin_lock_irqsave(&dev->regs_lock, flags);
134*4882a593Smuzhiyun if (dev->status & PHB_NOT_OH)
135*4882a593Smuzhiyun memcpy(&dev->oregs, &rs, sizeof(rs));
136*4882a593Smuzhiyun else {
137*4882a593Smuzhiyun u32 m = min(rs.count, 8U);
138*4882a593Smuzhiyun for (i = 0; i < m; i++)
139*4882a593Smuzhiyun if (rs.mask & BIT(i))
140*4882a593Smuzhiyun iowrite32(rs.values[i], dev->oaddr + i);
141*4882a593Smuzhiyun ioread32(dev->iaddr); /* PCI posting */
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->regs_lock, flags);
144*4882a593Smuzhiyun break;
145*4882a593Smuzhiyun case PHN_GETREG:
146*4882a593Smuzhiyun case PHN_GET_REG:
147*4882a593Smuzhiyun if (copy_from_user(&r, argp, sizeof(r)))
148*4882a593Smuzhiyun return -EFAULT;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun if (r.reg > 7)
151*4882a593Smuzhiyun return -EINVAL;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun r.value = ioread32(dev->iaddr + r.reg);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun if (copy_to_user(argp, &r, sizeof(r)))
156*4882a593Smuzhiyun return -EFAULT;
157*4882a593Smuzhiyun break;
158*4882a593Smuzhiyun case PHN_GETREGS:
159*4882a593Smuzhiyun case PHN_GET_REGS: {
160*4882a593Smuzhiyun u32 m;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun if (copy_from_user(&rs, argp, sizeof(rs)))
163*4882a593Smuzhiyun return -EFAULT;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun m = min(rs.count, 8U);
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun pr_debug("phantom: GRS %u regs %x\n", rs.count, rs.mask);
168*4882a593Smuzhiyun spin_lock_irqsave(&dev->regs_lock, flags);
169*4882a593Smuzhiyun for (i = 0; i < m; i++)
170*4882a593Smuzhiyun if (rs.mask & BIT(i))
171*4882a593Smuzhiyun rs.values[i] = ioread32(dev->iaddr + i);
172*4882a593Smuzhiyun atomic_set(&dev->counter, 0);
173*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->regs_lock, flags);
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (copy_to_user(argp, &rs, sizeof(rs)))
176*4882a593Smuzhiyun return -EFAULT;
177*4882a593Smuzhiyun break;
178*4882a593Smuzhiyun } case PHN_NOT_OH:
179*4882a593Smuzhiyun spin_lock_irqsave(&dev->regs_lock, flags);
180*4882a593Smuzhiyun if (dev->status & PHB_RUNNING) {
181*4882a593Smuzhiyun printk(KERN_ERR "phantom: you need to set NOT_OH "
182*4882a593Smuzhiyun "before you start the device!\n");
183*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->regs_lock, flags);
184*4882a593Smuzhiyun return -EINVAL;
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun dev->status |= PHB_NOT_OH;
187*4882a593Smuzhiyun spin_unlock_irqrestore(&dev->regs_lock, flags);
188*4882a593Smuzhiyun break;
189*4882a593Smuzhiyun default:
190*4882a593Smuzhiyun return -ENOTTY;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun return 0;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun #ifdef CONFIG_COMPAT
phantom_compat_ioctl(struct file * filp,unsigned int cmd,unsigned long arg)197*4882a593Smuzhiyun static long phantom_compat_ioctl(struct file *filp, unsigned int cmd,
198*4882a593Smuzhiyun unsigned long arg)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun if (_IOC_NR(cmd) <= 3 && _IOC_SIZE(cmd) == sizeof(compat_uptr_t)) {
201*4882a593Smuzhiyun cmd &= ~(_IOC_SIZEMASK << _IOC_SIZESHIFT);
202*4882a593Smuzhiyun cmd |= sizeof(void *) << _IOC_SIZESHIFT;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun return phantom_ioctl(filp, cmd, (unsigned long)compat_ptr(arg));
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun #else
207*4882a593Smuzhiyun #define phantom_compat_ioctl NULL
208*4882a593Smuzhiyun #endif
209*4882a593Smuzhiyun
phantom_open(struct inode * inode,struct file * file)210*4882a593Smuzhiyun static int phantom_open(struct inode *inode, struct file *file)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun struct phantom_device *dev = container_of(inode->i_cdev,
213*4882a593Smuzhiyun struct phantom_device, cdev);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun mutex_lock(&phantom_mutex);
216*4882a593Smuzhiyun nonseekable_open(inode, file);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (mutex_lock_interruptible(&dev->open_lock)) {
219*4882a593Smuzhiyun mutex_unlock(&phantom_mutex);
220*4882a593Smuzhiyun return -ERESTARTSYS;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun if (dev->opened) {
224*4882a593Smuzhiyun mutex_unlock(&dev->open_lock);
225*4882a593Smuzhiyun mutex_unlock(&phantom_mutex);
226*4882a593Smuzhiyun return -EINVAL;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun WARN_ON(dev->status & PHB_NOT_OH);
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun file->private_data = dev;
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun atomic_set(&dev->counter, 0);
234*4882a593Smuzhiyun dev->opened++;
235*4882a593Smuzhiyun mutex_unlock(&dev->open_lock);
236*4882a593Smuzhiyun mutex_unlock(&phantom_mutex);
237*4882a593Smuzhiyun return 0;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
phantom_release(struct inode * inode,struct file * file)240*4882a593Smuzhiyun static int phantom_release(struct inode *inode, struct file *file)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun struct phantom_device *dev = file->private_data;
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun mutex_lock(&dev->open_lock);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun dev->opened = 0;
247*4882a593Smuzhiyun phantom_status(dev, dev->status & ~PHB_RUNNING);
248*4882a593Smuzhiyun dev->status &= ~PHB_NOT_OH;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun mutex_unlock(&dev->open_lock);
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun return 0;
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
phantom_poll(struct file * file,poll_table * wait)255*4882a593Smuzhiyun static __poll_t phantom_poll(struct file *file, poll_table *wait)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun struct phantom_device *dev = file->private_data;
258*4882a593Smuzhiyun __poll_t mask = 0;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun pr_debug("phantom_poll: %d\n", atomic_read(&dev->counter));
261*4882a593Smuzhiyun poll_wait(file, &dev->wait, wait);
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (!(dev->status & PHB_RUNNING))
264*4882a593Smuzhiyun mask = EPOLLERR;
265*4882a593Smuzhiyun else if (atomic_read(&dev->counter))
266*4882a593Smuzhiyun mask = EPOLLIN | EPOLLRDNORM;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun pr_debug("phantom_poll end: %x/%d\n", mask, atomic_read(&dev->counter));
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return mask;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun static const struct file_operations phantom_file_ops = {
274*4882a593Smuzhiyun .open = phantom_open,
275*4882a593Smuzhiyun .release = phantom_release,
276*4882a593Smuzhiyun .unlocked_ioctl = phantom_ioctl,
277*4882a593Smuzhiyun .compat_ioctl = phantom_compat_ioctl,
278*4882a593Smuzhiyun .poll = phantom_poll,
279*4882a593Smuzhiyun .llseek = no_llseek,
280*4882a593Smuzhiyun };
281*4882a593Smuzhiyun
phantom_isr(int irq,void * data)282*4882a593Smuzhiyun static irqreturn_t phantom_isr(int irq, void *data)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun struct phantom_device *dev = data;
285*4882a593Smuzhiyun unsigned int i;
286*4882a593Smuzhiyun u32 ctl;
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun spin_lock(&dev->regs_lock);
289*4882a593Smuzhiyun ctl = ioread32(dev->iaddr + PHN_CONTROL);
290*4882a593Smuzhiyun if (!(ctl & PHN_CTL_IRQ)) {
291*4882a593Smuzhiyun spin_unlock(&dev->regs_lock);
292*4882a593Smuzhiyun return IRQ_NONE;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun iowrite32(0, dev->iaddr);
296*4882a593Smuzhiyun iowrite32(0xc0, dev->iaddr);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun if (dev->status & PHB_NOT_OH) {
299*4882a593Smuzhiyun struct phm_regs *r = &dev->oregs;
300*4882a593Smuzhiyun u32 m = min(r->count, 8U);
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun for (i = 0; i < m; i++)
303*4882a593Smuzhiyun if (r->mask & BIT(i))
304*4882a593Smuzhiyun iowrite32(r->values[i], dev->oaddr + i);
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun dev->ctl_reg ^= PHN_CTL_AMP;
307*4882a593Smuzhiyun iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL);
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun spin_unlock(&dev->regs_lock);
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun ioread32(dev->iaddr); /* PCI posting */
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun atomic_inc(&dev->counter);
314*4882a593Smuzhiyun wake_up_interruptible(&dev->wait);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun return IRQ_HANDLED;
317*4882a593Smuzhiyun }
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun /*
320*4882a593Smuzhiyun * Init and deinit driver
321*4882a593Smuzhiyun */
322*4882a593Smuzhiyun
phantom_get_free(void)323*4882a593Smuzhiyun static unsigned int phantom_get_free(void)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun unsigned int i;
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun for (i = 0; i < PHANTOM_MAX_MINORS; i++)
328*4882a593Smuzhiyun if (phantom_devices[i] == 0)
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun return i;
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
phantom_probe(struct pci_dev * pdev,const struct pci_device_id * pci_id)334*4882a593Smuzhiyun static int phantom_probe(struct pci_dev *pdev,
335*4882a593Smuzhiyun const struct pci_device_id *pci_id)
336*4882a593Smuzhiyun {
337*4882a593Smuzhiyun struct phantom_device *pht;
338*4882a593Smuzhiyun unsigned int minor;
339*4882a593Smuzhiyun int retval;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun retval = pci_enable_device(pdev);
342*4882a593Smuzhiyun if (retval) {
343*4882a593Smuzhiyun dev_err(&pdev->dev, "pci_enable_device failed!\n");
344*4882a593Smuzhiyun goto err;
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun minor = phantom_get_free();
348*4882a593Smuzhiyun if (minor == PHANTOM_MAX_MINORS) {
349*4882a593Smuzhiyun dev_err(&pdev->dev, "too many devices found!\n");
350*4882a593Smuzhiyun retval = -EIO;
351*4882a593Smuzhiyun goto err_dis;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun phantom_devices[minor] = 1;
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun retval = pci_request_regions(pdev, "phantom");
357*4882a593Smuzhiyun if (retval) {
358*4882a593Smuzhiyun dev_err(&pdev->dev, "pci_request_regions failed!\n");
359*4882a593Smuzhiyun goto err_null;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun retval = -ENOMEM;
363*4882a593Smuzhiyun pht = kzalloc(sizeof(*pht), GFP_KERNEL);
364*4882a593Smuzhiyun if (pht == NULL) {
365*4882a593Smuzhiyun dev_err(&pdev->dev, "unable to allocate device\n");
366*4882a593Smuzhiyun goto err_reg;
367*4882a593Smuzhiyun }
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun pht->caddr = pci_iomap(pdev, 0, 0);
370*4882a593Smuzhiyun if (pht->caddr == NULL) {
371*4882a593Smuzhiyun dev_err(&pdev->dev, "can't remap conf space\n");
372*4882a593Smuzhiyun goto err_fr;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun pht->iaddr = pci_iomap(pdev, 2, 0);
375*4882a593Smuzhiyun if (pht->iaddr == NULL) {
376*4882a593Smuzhiyun dev_err(&pdev->dev, "can't remap input space\n");
377*4882a593Smuzhiyun goto err_unmc;
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun pht->oaddr = pci_iomap(pdev, 3, 0);
380*4882a593Smuzhiyun if (pht->oaddr == NULL) {
381*4882a593Smuzhiyun dev_err(&pdev->dev, "can't remap output space\n");
382*4882a593Smuzhiyun goto err_unmi;
383*4882a593Smuzhiyun }
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun mutex_init(&pht->open_lock);
386*4882a593Smuzhiyun spin_lock_init(&pht->regs_lock);
387*4882a593Smuzhiyun init_waitqueue_head(&pht->wait);
388*4882a593Smuzhiyun cdev_init(&pht->cdev, &phantom_file_ops);
389*4882a593Smuzhiyun pht->cdev.owner = THIS_MODULE;
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun iowrite32(0, pht->caddr + PHN_IRQCTL);
392*4882a593Smuzhiyun ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
393*4882a593Smuzhiyun retval = request_irq(pdev->irq, phantom_isr,
394*4882a593Smuzhiyun IRQF_SHARED, "phantom", pht);
395*4882a593Smuzhiyun if (retval) {
396*4882a593Smuzhiyun dev_err(&pdev->dev, "can't establish ISR\n");
397*4882a593Smuzhiyun goto err_unmo;
398*4882a593Smuzhiyun }
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun retval = cdev_add(&pht->cdev, MKDEV(phantom_major, minor), 1);
401*4882a593Smuzhiyun if (retval) {
402*4882a593Smuzhiyun dev_err(&pdev->dev, "chardev registration failed\n");
403*4882a593Smuzhiyun goto err_irq;
404*4882a593Smuzhiyun }
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun if (IS_ERR(device_create(phantom_class, &pdev->dev,
407*4882a593Smuzhiyun MKDEV(phantom_major, minor), NULL,
408*4882a593Smuzhiyun "phantom%u", minor)))
409*4882a593Smuzhiyun dev_err(&pdev->dev, "can't create device\n");
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun pci_set_drvdata(pdev, pht);
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun return 0;
414*4882a593Smuzhiyun err_irq:
415*4882a593Smuzhiyun free_irq(pdev->irq, pht);
416*4882a593Smuzhiyun err_unmo:
417*4882a593Smuzhiyun pci_iounmap(pdev, pht->oaddr);
418*4882a593Smuzhiyun err_unmi:
419*4882a593Smuzhiyun pci_iounmap(pdev, pht->iaddr);
420*4882a593Smuzhiyun err_unmc:
421*4882a593Smuzhiyun pci_iounmap(pdev, pht->caddr);
422*4882a593Smuzhiyun err_fr:
423*4882a593Smuzhiyun kfree(pht);
424*4882a593Smuzhiyun err_reg:
425*4882a593Smuzhiyun pci_release_regions(pdev);
426*4882a593Smuzhiyun err_null:
427*4882a593Smuzhiyun phantom_devices[minor] = 0;
428*4882a593Smuzhiyun err_dis:
429*4882a593Smuzhiyun pci_disable_device(pdev);
430*4882a593Smuzhiyun err:
431*4882a593Smuzhiyun return retval;
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun
phantom_remove(struct pci_dev * pdev)434*4882a593Smuzhiyun static void phantom_remove(struct pci_dev *pdev)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun struct phantom_device *pht = pci_get_drvdata(pdev);
437*4882a593Smuzhiyun unsigned int minor = MINOR(pht->cdev.dev);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun device_destroy(phantom_class, MKDEV(phantom_major, minor));
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun cdev_del(&pht->cdev);
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun iowrite32(0, pht->caddr + PHN_IRQCTL);
444*4882a593Smuzhiyun ioread32(pht->caddr + PHN_IRQCTL); /* PCI posting */
445*4882a593Smuzhiyun free_irq(pdev->irq, pht);
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun pci_iounmap(pdev, pht->oaddr);
448*4882a593Smuzhiyun pci_iounmap(pdev, pht->iaddr);
449*4882a593Smuzhiyun pci_iounmap(pdev, pht->caddr);
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun kfree(pht);
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun pci_release_regions(pdev);
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun phantom_devices[minor] = 0;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun pci_disable_device(pdev);
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
phantom_suspend(struct device * dev_d)460*4882a593Smuzhiyun static int __maybe_unused phantom_suspend(struct device *dev_d)
461*4882a593Smuzhiyun {
462*4882a593Smuzhiyun struct phantom_device *dev = dev_get_drvdata(dev_d);
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun iowrite32(0, dev->caddr + PHN_IRQCTL);
465*4882a593Smuzhiyun ioread32(dev->caddr + PHN_IRQCTL); /* PCI posting */
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun synchronize_irq(to_pci_dev(dev_d)->irq);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun return 0;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun
phantom_resume(struct device * dev_d)472*4882a593Smuzhiyun static int __maybe_unused phantom_resume(struct device *dev_d)
473*4882a593Smuzhiyun {
474*4882a593Smuzhiyun struct phantom_device *dev = dev_get_drvdata(dev_d);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun iowrite32(0, dev->caddr + PHN_IRQCTL);
477*4882a593Smuzhiyun
478*4882a593Smuzhiyun return 0;
479*4882a593Smuzhiyun }
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun static struct pci_device_id phantom_pci_tbl[] = {
482*4882a593Smuzhiyun { .vendor = PCI_VENDOR_ID_PLX, .device = PCI_DEVICE_ID_PLX_9050,
483*4882a593Smuzhiyun .subvendor = PCI_VENDOR_ID_PLX, .subdevice = PCI_DEVICE_ID_PLX_9050,
484*4882a593Smuzhiyun .class = PCI_CLASS_BRIDGE_OTHER << 8, .class_mask = 0xffff00 },
485*4882a593Smuzhiyun { 0, }
486*4882a593Smuzhiyun };
487*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, phantom_pci_tbl);
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(phantom_pm_ops, phantom_suspend, phantom_resume);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun static struct pci_driver phantom_pci_driver = {
492*4882a593Smuzhiyun .name = "phantom",
493*4882a593Smuzhiyun .id_table = phantom_pci_tbl,
494*4882a593Smuzhiyun .probe = phantom_probe,
495*4882a593Smuzhiyun .remove = phantom_remove,
496*4882a593Smuzhiyun .driver.pm = &phantom_pm_ops,
497*4882a593Smuzhiyun };
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun static CLASS_ATTR_STRING(version, 0444, PHANTOM_VERSION);
500*4882a593Smuzhiyun
phantom_init(void)501*4882a593Smuzhiyun static int __init phantom_init(void)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun int retval;
504*4882a593Smuzhiyun dev_t dev;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun phantom_class = class_create(THIS_MODULE, "phantom");
507*4882a593Smuzhiyun if (IS_ERR(phantom_class)) {
508*4882a593Smuzhiyun retval = PTR_ERR(phantom_class);
509*4882a593Smuzhiyun printk(KERN_ERR "phantom: can't register phantom class\n");
510*4882a593Smuzhiyun goto err;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun retval = class_create_file(phantom_class, &class_attr_version.attr);
513*4882a593Smuzhiyun if (retval) {
514*4882a593Smuzhiyun printk(KERN_ERR "phantom: can't create sysfs version file\n");
515*4882a593Smuzhiyun goto err_class;
516*4882a593Smuzhiyun }
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun retval = alloc_chrdev_region(&dev, 0, PHANTOM_MAX_MINORS, "phantom");
519*4882a593Smuzhiyun if (retval) {
520*4882a593Smuzhiyun printk(KERN_ERR "phantom: can't register character device\n");
521*4882a593Smuzhiyun goto err_attr;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun phantom_major = MAJOR(dev);
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun retval = pci_register_driver(&phantom_pci_driver);
526*4882a593Smuzhiyun if (retval) {
527*4882a593Smuzhiyun printk(KERN_ERR "phantom: can't register pci driver\n");
528*4882a593Smuzhiyun goto err_unchr;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun printk(KERN_INFO "Phantom Linux Driver, version " PHANTOM_VERSION ", "
532*4882a593Smuzhiyun "init OK\n");
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun return 0;
535*4882a593Smuzhiyun err_unchr:
536*4882a593Smuzhiyun unregister_chrdev_region(dev, PHANTOM_MAX_MINORS);
537*4882a593Smuzhiyun err_attr:
538*4882a593Smuzhiyun class_remove_file(phantom_class, &class_attr_version.attr);
539*4882a593Smuzhiyun err_class:
540*4882a593Smuzhiyun class_destroy(phantom_class);
541*4882a593Smuzhiyun err:
542*4882a593Smuzhiyun return retval;
543*4882a593Smuzhiyun }
544*4882a593Smuzhiyun
phantom_exit(void)545*4882a593Smuzhiyun static void __exit phantom_exit(void)
546*4882a593Smuzhiyun {
547*4882a593Smuzhiyun pci_unregister_driver(&phantom_pci_driver);
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun unregister_chrdev_region(MKDEV(phantom_major, 0), PHANTOM_MAX_MINORS);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun class_remove_file(phantom_class, &class_attr_version.attr);
552*4882a593Smuzhiyun class_destroy(phantom_class);
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun pr_debug("phantom: module successfully removed\n");
555*4882a593Smuzhiyun }
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun module_init(phantom_init);
558*4882a593Smuzhiyun module_exit(phantom_exit);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun MODULE_AUTHOR("Jiri Slaby <jirislaby@gmail.com>");
561*4882a593Smuzhiyun MODULE_DESCRIPTION("Sensable Phantom driver (PCI devices)");
562*4882a593Smuzhiyun MODULE_LICENSE("GPL");
563*4882a593Smuzhiyun MODULE_VERSION(PHANTOM_VERSION);
564