1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * cb710/core.c
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright by Michał Mirosław, 2008-2009
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/pci.h>
10*4882a593Smuzhiyun #include <linux/spinlock.h>
11*4882a593Smuzhiyun #include <linux/idr.h>
12*4882a593Smuzhiyun #include <linux/cb710.h>
13*4882a593Smuzhiyun #include <linux/gfp.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun static DEFINE_IDA(cb710_ida);
16*4882a593Smuzhiyun
cb710_pci_update_config_reg(struct pci_dev * pdev,int reg,uint32_t mask,uint32_t xor)17*4882a593Smuzhiyun void cb710_pci_update_config_reg(struct pci_dev *pdev,
18*4882a593Smuzhiyun int reg, uint32_t mask, uint32_t xor)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun u32 rval;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun pci_read_config_dword(pdev, reg, &rval);
23*4882a593Smuzhiyun rval = (rval & mask) ^ xor;
24*4882a593Smuzhiyun pci_write_config_dword(pdev, reg, rval);
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cb710_pci_update_config_reg);
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* Some magic writes based on Windows driver init code */
cb710_pci_configure(struct pci_dev * pdev)29*4882a593Smuzhiyun static int cb710_pci_configure(struct pci_dev *pdev)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun unsigned int devfn = PCI_DEVFN(PCI_SLOT(pdev->devfn), 0);
32*4882a593Smuzhiyun struct pci_dev *pdev0;
33*4882a593Smuzhiyun u32 val;
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun cb710_pci_update_config_reg(pdev, 0x48,
36*4882a593Smuzhiyun ~0x000000FF, 0x0000003F);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun pci_read_config_dword(pdev, 0x48, &val);
39*4882a593Smuzhiyun if (val & 0x80000000)
40*4882a593Smuzhiyun return 0;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun pdev0 = pci_get_slot(pdev->bus, devfn);
43*4882a593Smuzhiyun if (!pdev0)
44*4882a593Smuzhiyun return -ENODEV;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun if (pdev0->vendor == PCI_VENDOR_ID_ENE
47*4882a593Smuzhiyun && pdev0->device == PCI_DEVICE_ID_ENE_720) {
48*4882a593Smuzhiyun cb710_pci_update_config_reg(pdev0, 0x8C,
49*4882a593Smuzhiyun ~0x00F00000, 0x00100000);
50*4882a593Smuzhiyun cb710_pci_update_config_reg(pdev0, 0xB0,
51*4882a593Smuzhiyun ~0x08000000, 0x08000000);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun cb710_pci_update_config_reg(pdev0, 0x8C,
55*4882a593Smuzhiyun ~0x00000F00, 0x00000200);
56*4882a593Smuzhiyun cb710_pci_update_config_reg(pdev0, 0x90,
57*4882a593Smuzhiyun ~0x00060000, 0x00040000);
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun pci_dev_put(pdev0);
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return 0;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
cb710_irq_handler(int irq,void * data)64*4882a593Smuzhiyun static irqreturn_t cb710_irq_handler(int irq, void *data)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun struct cb710_chip *chip = data;
67*4882a593Smuzhiyun struct cb710_slot *slot = &chip->slot[0];
68*4882a593Smuzhiyun irqreturn_t handled = IRQ_NONE;
69*4882a593Smuzhiyun unsigned nr;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun spin_lock(&chip->irq_lock); /* incl. smp_rmb() */
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun for (nr = chip->slots; nr; ++slot, --nr) {
74*4882a593Smuzhiyun cb710_irq_handler_t handler_func = slot->irq_handler;
75*4882a593Smuzhiyun if (handler_func && handler_func(slot))
76*4882a593Smuzhiyun handled = IRQ_HANDLED;
77*4882a593Smuzhiyun }
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun spin_unlock(&chip->irq_lock);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun return handled;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
cb710_release_slot(struct device * dev)84*4882a593Smuzhiyun static void cb710_release_slot(struct device *dev)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun #ifdef CONFIG_CB710_DEBUG_ASSUMPTIONS
87*4882a593Smuzhiyun struct cb710_slot *slot = cb710_pdev_to_slot(to_platform_device(dev));
88*4882a593Smuzhiyun struct cb710_chip *chip = cb710_slot_to_chip(slot);
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun /* slot struct can be freed now */
91*4882a593Smuzhiyun atomic_dec(&chip->slot_refs_count);
92*4882a593Smuzhiyun #endif
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
cb710_register_slot(struct cb710_chip * chip,unsigned slot_mask,unsigned io_offset,const char * name)95*4882a593Smuzhiyun static int cb710_register_slot(struct cb710_chip *chip,
96*4882a593Smuzhiyun unsigned slot_mask, unsigned io_offset, const char *name)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun int nr = chip->slots;
99*4882a593Smuzhiyun struct cb710_slot *slot = &chip->slot[nr];
100*4882a593Smuzhiyun int err;
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun dev_dbg(cb710_chip_dev(chip),
103*4882a593Smuzhiyun "register: %s.%d; slot %d; mask %d; IO offset: 0x%02X\n",
104*4882a593Smuzhiyun name, chip->platform_id, nr, slot_mask, io_offset);
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun /* slot->irq_handler == NULL here; this needs to be
107*4882a593Smuzhiyun * seen before platform_device_register() */
108*4882a593Smuzhiyun ++chip->slots;
109*4882a593Smuzhiyun smp_wmb();
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun slot->iobase = chip->iobase + io_offset;
112*4882a593Smuzhiyun slot->pdev.name = name;
113*4882a593Smuzhiyun slot->pdev.id = chip->platform_id;
114*4882a593Smuzhiyun slot->pdev.dev.parent = &chip->pdev->dev;
115*4882a593Smuzhiyun slot->pdev.dev.release = cb710_release_slot;
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun err = platform_device_register(&slot->pdev);
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun #ifdef CONFIG_CB710_DEBUG_ASSUMPTIONS
120*4882a593Smuzhiyun atomic_inc(&chip->slot_refs_count);
121*4882a593Smuzhiyun #endif
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (err) {
124*4882a593Smuzhiyun /* device_initialize() called from platform_device_register()
125*4882a593Smuzhiyun * wants this on error path */
126*4882a593Smuzhiyun platform_device_put(&slot->pdev);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* slot->irq_handler == NULL here anyway, so no lock needed */
129*4882a593Smuzhiyun --chip->slots;
130*4882a593Smuzhiyun return err;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun chip->slot_mask |= slot_mask;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
cb710_unregister_slot(struct cb710_chip * chip,unsigned slot_mask)138*4882a593Smuzhiyun static void cb710_unregister_slot(struct cb710_chip *chip,
139*4882a593Smuzhiyun unsigned slot_mask)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun int nr = chip->slots - 1;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun if (!(chip->slot_mask & slot_mask))
144*4882a593Smuzhiyun return;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun platform_device_unregister(&chip->slot[nr].pdev);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun /* complementary to spin_unlock() in cb710_set_irq_handler() */
149*4882a593Smuzhiyun smp_rmb();
150*4882a593Smuzhiyun BUG_ON(chip->slot[nr].irq_handler != NULL);
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* slot->irq_handler == NULL here, so no lock needed */
153*4882a593Smuzhiyun --chip->slots;
154*4882a593Smuzhiyun chip->slot_mask &= ~slot_mask;
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
cb710_set_irq_handler(struct cb710_slot * slot,cb710_irq_handler_t handler)157*4882a593Smuzhiyun void cb710_set_irq_handler(struct cb710_slot *slot,
158*4882a593Smuzhiyun cb710_irq_handler_t handler)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun struct cb710_chip *chip = cb710_slot_to_chip(slot);
161*4882a593Smuzhiyun unsigned long flags;
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun spin_lock_irqsave(&chip->irq_lock, flags);
164*4882a593Smuzhiyun slot->irq_handler = handler;
165*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->irq_lock, flags);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(cb710_set_irq_handler);
168*4882a593Smuzhiyun
cb710_suspend(struct device * dev_d)169*4882a593Smuzhiyun static int __maybe_unused cb710_suspend(struct device *dev_d)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(dev_d);
172*4882a593Smuzhiyun struct cb710_chip *chip = pci_get_drvdata(pdev);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun devm_free_irq(&pdev->dev, pdev->irq, chip);
175*4882a593Smuzhiyun return 0;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
cb710_resume(struct device * dev_d)178*4882a593Smuzhiyun static int __maybe_unused cb710_resume(struct device *dev_d)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(dev_d);
181*4882a593Smuzhiyun struct cb710_chip *chip = pci_get_drvdata(pdev);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun return devm_request_irq(&pdev->dev, pdev->irq,
184*4882a593Smuzhiyun cb710_irq_handler, IRQF_SHARED, KBUILD_MODNAME, chip);
185*4882a593Smuzhiyun }
186*4882a593Smuzhiyun
cb710_probe(struct pci_dev * pdev,const struct pci_device_id * ent)187*4882a593Smuzhiyun static int cb710_probe(struct pci_dev *pdev,
188*4882a593Smuzhiyun const struct pci_device_id *ent)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun struct cb710_chip *chip;
191*4882a593Smuzhiyun u32 val;
192*4882a593Smuzhiyun int err;
193*4882a593Smuzhiyun int n = 0;
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun err = cb710_pci_configure(pdev);
196*4882a593Smuzhiyun if (err)
197*4882a593Smuzhiyun return err;
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun /* this is actually magic... */
200*4882a593Smuzhiyun pci_read_config_dword(pdev, 0x48, &val);
201*4882a593Smuzhiyun if (!(val & 0x80000000)) {
202*4882a593Smuzhiyun pci_write_config_dword(pdev, 0x48, val|0x71000000);
203*4882a593Smuzhiyun pci_read_config_dword(pdev, 0x48, &val);
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun dev_dbg(&pdev->dev, "PCI config[0x48] = 0x%08X\n", val);
207*4882a593Smuzhiyun if (!(val & 0x70000000))
208*4882a593Smuzhiyun return -ENODEV;
209*4882a593Smuzhiyun val = (val >> 28) & 7;
210*4882a593Smuzhiyun if (val & CB710_SLOT_MMC)
211*4882a593Smuzhiyun ++n;
212*4882a593Smuzhiyun if (val & CB710_SLOT_MS)
213*4882a593Smuzhiyun ++n;
214*4882a593Smuzhiyun if (val & CB710_SLOT_SM)
215*4882a593Smuzhiyun ++n;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun chip = devm_kzalloc(&pdev->dev, struct_size(chip, slot, n),
218*4882a593Smuzhiyun GFP_KERNEL);
219*4882a593Smuzhiyun if (!chip)
220*4882a593Smuzhiyun return -ENOMEM;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun err = pcim_enable_device(pdev);
223*4882a593Smuzhiyun if (err)
224*4882a593Smuzhiyun return err;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun err = pcim_iomap_regions(pdev, 0x0001, KBUILD_MODNAME);
227*4882a593Smuzhiyun if (err)
228*4882a593Smuzhiyun return err;
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun spin_lock_init(&chip->irq_lock);
231*4882a593Smuzhiyun chip->pdev = pdev;
232*4882a593Smuzhiyun chip->iobase = pcim_iomap_table(pdev)[0];
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun pci_set_drvdata(pdev, chip);
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun err = devm_request_irq(&pdev->dev, pdev->irq,
237*4882a593Smuzhiyun cb710_irq_handler, IRQF_SHARED, KBUILD_MODNAME, chip);
238*4882a593Smuzhiyun if (err)
239*4882a593Smuzhiyun return err;
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun err = ida_alloc(&cb710_ida, GFP_KERNEL);
242*4882a593Smuzhiyun if (err < 0)
243*4882a593Smuzhiyun return err;
244*4882a593Smuzhiyun chip->platform_id = err;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun dev_info(&pdev->dev, "id %d, IO 0x%p, IRQ %d\n",
247*4882a593Smuzhiyun chip->platform_id, chip->iobase, pdev->irq);
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun if (val & CB710_SLOT_MMC) { /* MMC/SD slot */
250*4882a593Smuzhiyun err = cb710_register_slot(chip,
251*4882a593Smuzhiyun CB710_SLOT_MMC, 0x00, "cb710-mmc");
252*4882a593Smuzhiyun if (err)
253*4882a593Smuzhiyun return err;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun if (val & CB710_SLOT_MS) { /* MemoryStick slot */
257*4882a593Smuzhiyun err = cb710_register_slot(chip,
258*4882a593Smuzhiyun CB710_SLOT_MS, 0x40, "cb710-ms");
259*4882a593Smuzhiyun if (err)
260*4882a593Smuzhiyun goto unreg_mmc;
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (val & CB710_SLOT_SM) { /* SmartMedia slot */
264*4882a593Smuzhiyun err = cb710_register_slot(chip,
265*4882a593Smuzhiyun CB710_SLOT_SM, 0x60, "cb710-sm");
266*4882a593Smuzhiyun if (err)
267*4882a593Smuzhiyun goto unreg_ms;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun return 0;
271*4882a593Smuzhiyun unreg_ms:
272*4882a593Smuzhiyun cb710_unregister_slot(chip, CB710_SLOT_MS);
273*4882a593Smuzhiyun unreg_mmc:
274*4882a593Smuzhiyun cb710_unregister_slot(chip, CB710_SLOT_MMC);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun #ifdef CONFIG_CB710_DEBUG_ASSUMPTIONS
277*4882a593Smuzhiyun BUG_ON(atomic_read(&chip->slot_refs_count) != 0);
278*4882a593Smuzhiyun #endif
279*4882a593Smuzhiyun return err;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
cb710_remove_one(struct pci_dev * pdev)282*4882a593Smuzhiyun static void cb710_remove_one(struct pci_dev *pdev)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun struct cb710_chip *chip = pci_get_drvdata(pdev);
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun cb710_unregister_slot(chip, CB710_SLOT_SM);
287*4882a593Smuzhiyun cb710_unregister_slot(chip, CB710_SLOT_MS);
288*4882a593Smuzhiyun cb710_unregister_slot(chip, CB710_SLOT_MMC);
289*4882a593Smuzhiyun #ifdef CONFIG_CB710_DEBUG_ASSUMPTIONS
290*4882a593Smuzhiyun BUG_ON(atomic_read(&chip->slot_refs_count) != 0);
291*4882a593Smuzhiyun #endif
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun ida_free(&cb710_ida, chip->platform_id);
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun static const struct pci_device_id cb710_pci_tbl[] = {
297*4882a593Smuzhiyun { PCI_VENDOR_ID_ENE, PCI_DEVICE_ID_ENE_CB710_FLASH,
298*4882a593Smuzhiyun PCI_ANY_ID, PCI_ANY_ID, },
299*4882a593Smuzhiyun { 0, }
300*4882a593Smuzhiyun };
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(cb710_pm_ops, cb710_suspend, cb710_resume);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun static struct pci_driver cb710_driver = {
305*4882a593Smuzhiyun .name = KBUILD_MODNAME,
306*4882a593Smuzhiyun .id_table = cb710_pci_tbl,
307*4882a593Smuzhiyun .probe = cb710_probe,
308*4882a593Smuzhiyun .remove = cb710_remove_one,
309*4882a593Smuzhiyun .driver.pm = &cb710_pm_ops,
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun
cb710_init_module(void)312*4882a593Smuzhiyun static int __init cb710_init_module(void)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun return pci_register_driver(&cb710_driver);
315*4882a593Smuzhiyun }
316*4882a593Smuzhiyun
cb710_cleanup_module(void)317*4882a593Smuzhiyun static void __exit cb710_cleanup_module(void)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun pci_unregister_driver(&cb710_driver);
320*4882a593Smuzhiyun ida_destroy(&cb710_ida);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun module_init(cb710_init_module);
324*4882a593Smuzhiyun module_exit(cb710_cleanup_module);
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>");
327*4882a593Smuzhiyun MODULE_DESCRIPTION("ENE CB710 memory card reader driver");
328*4882a593Smuzhiyun MODULE_LICENSE("GPL");
329*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, cb710_pci_tbl);
330