xref: /OK3568_Linux_fs/kernel/drivers/misc/apds990x.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * This file is part of the APDS990x sensor driver.
4*4882a593Smuzhiyun  * Chip is combined proximity and ambient light sensor.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2010 Nokia Corporation and/or its subsidiary(-ies).
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include <linux/kernel.h>
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/i2c.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/mutex.h>
16*4882a593Smuzhiyun #include <linux/regulator/consumer.h>
17*4882a593Smuzhiyun #include <linux/pm_runtime.h>
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/wait.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun #include <linux/platform_data/apds990x.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun /* Register map */
24*4882a593Smuzhiyun #define APDS990X_ENABLE	 0x00 /* Enable of states and interrupts */
25*4882a593Smuzhiyun #define APDS990X_ATIME	 0x01 /* ALS ADC time  */
26*4882a593Smuzhiyun #define APDS990X_PTIME	 0x02 /* Proximity ADC time  */
27*4882a593Smuzhiyun #define APDS990X_WTIME	 0x03 /* Wait time  */
28*4882a593Smuzhiyun #define APDS990X_AILTL	 0x04 /* ALS interrupt low threshold low byte */
29*4882a593Smuzhiyun #define APDS990X_AILTH	 0x05 /* ALS interrupt low threshold hi byte */
30*4882a593Smuzhiyun #define APDS990X_AIHTL	 0x06 /* ALS interrupt hi threshold low byte */
31*4882a593Smuzhiyun #define APDS990X_AIHTH	 0x07 /* ALS interrupt hi threshold hi byte */
32*4882a593Smuzhiyun #define APDS990X_PILTL	 0x08 /* Proximity interrupt low threshold low byte */
33*4882a593Smuzhiyun #define APDS990X_PILTH	 0x09 /* Proximity interrupt low threshold hi byte */
34*4882a593Smuzhiyun #define APDS990X_PIHTL	 0x0a /* Proximity interrupt hi threshold low byte */
35*4882a593Smuzhiyun #define APDS990X_PIHTH	 0x0b /* Proximity interrupt hi threshold hi byte */
36*4882a593Smuzhiyun #define APDS990X_PERS	 0x0c /* Interrupt persistence filters */
37*4882a593Smuzhiyun #define APDS990X_CONFIG	 0x0d /* Configuration */
38*4882a593Smuzhiyun #define APDS990X_PPCOUNT 0x0e /* Proximity pulse count */
39*4882a593Smuzhiyun #define APDS990X_CONTROL 0x0f /* Gain control register */
40*4882a593Smuzhiyun #define APDS990X_REV	 0x11 /* Revision Number */
41*4882a593Smuzhiyun #define APDS990X_ID	 0x12 /* Device ID */
42*4882a593Smuzhiyun #define APDS990X_STATUS	 0x13 /* Device status */
43*4882a593Smuzhiyun #define APDS990X_CDATAL	 0x14 /* Clear ADC low data register */
44*4882a593Smuzhiyun #define APDS990X_CDATAH	 0x15 /* Clear ADC high data register */
45*4882a593Smuzhiyun #define APDS990X_IRDATAL 0x16 /* IR ADC low data register */
46*4882a593Smuzhiyun #define APDS990X_IRDATAH 0x17 /* IR ADC high data register */
47*4882a593Smuzhiyun #define APDS990X_PDATAL	 0x18 /* Proximity ADC low data register */
48*4882a593Smuzhiyun #define APDS990X_PDATAH	 0x19 /* Proximity ADC high data register */
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun /* Control */
51*4882a593Smuzhiyun #define APDS990X_MAX_AGAIN	3
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun /* Enable register */
54*4882a593Smuzhiyun #define APDS990X_EN_PIEN	(0x1 << 5)
55*4882a593Smuzhiyun #define APDS990X_EN_AIEN	(0x1 << 4)
56*4882a593Smuzhiyun #define APDS990X_EN_WEN		(0x1 << 3)
57*4882a593Smuzhiyun #define APDS990X_EN_PEN		(0x1 << 2)
58*4882a593Smuzhiyun #define APDS990X_EN_AEN		(0x1 << 1)
59*4882a593Smuzhiyun #define APDS990X_EN_PON		(0x1 << 0)
60*4882a593Smuzhiyun #define APDS990X_EN_DISABLE_ALL 0
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /* Status register */
63*4882a593Smuzhiyun #define APDS990X_ST_PINT	(0x1 << 5)
64*4882a593Smuzhiyun #define APDS990X_ST_AINT	(0x1 << 4)
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun /* I2C access types */
67*4882a593Smuzhiyun #define APDS990x_CMD_TYPE_MASK	(0x03 << 5)
68*4882a593Smuzhiyun #define APDS990x_CMD_TYPE_RB	(0x00 << 5) /* Repeated byte */
69*4882a593Smuzhiyun #define APDS990x_CMD_TYPE_INC	(0x01 << 5) /* Auto increment */
70*4882a593Smuzhiyun #define APDS990x_CMD_TYPE_SPE	(0x03 << 5) /* Special function */
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #define APDS990x_ADDR_SHIFT	0
73*4882a593Smuzhiyun #define APDS990x_CMD		0x80
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun /* Interrupt ack commands */
76*4882a593Smuzhiyun #define APDS990X_INT_ACK_ALS	0x6
77*4882a593Smuzhiyun #define APDS990X_INT_ACK_PS	0x5
78*4882a593Smuzhiyun #define APDS990X_INT_ACK_BOTH	0x7
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* ptime */
81*4882a593Smuzhiyun #define APDS990X_PTIME_DEFAULT	0xff /* Recommended conversion time 2.7ms*/
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /* wtime */
84*4882a593Smuzhiyun #define APDS990X_WTIME_DEFAULT	0xee /* ~50ms wait time */
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun #define APDS990X_TIME_TO_ADC	1024 /* One timetick as ADC count value */
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun /* Persistence */
89*4882a593Smuzhiyun #define APDS990X_APERS_SHIFT	0
90*4882a593Smuzhiyun #define APDS990X_PPERS_SHIFT	4
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun /* Supported ID:s */
93*4882a593Smuzhiyun #define APDS990X_ID_0		0x0
94*4882a593Smuzhiyun #define APDS990X_ID_4		0x4
95*4882a593Smuzhiyun #define APDS990X_ID_29		0x29
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /* pgain and pdiode settings */
98*4882a593Smuzhiyun #define APDS_PGAIN_1X	       0x0
99*4882a593Smuzhiyun #define APDS_PDIODE_IR	       0x2
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define APDS990X_LUX_OUTPUT_SCALE 10
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /* Reverse chip factors for threshold calculation */
104*4882a593Smuzhiyun struct reverse_factors {
105*4882a593Smuzhiyun 	u32 afactor;
106*4882a593Smuzhiyun 	int cf1;
107*4882a593Smuzhiyun 	int irf1;
108*4882a593Smuzhiyun 	int cf2;
109*4882a593Smuzhiyun 	int irf2;
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
112*4882a593Smuzhiyun struct apds990x_chip {
113*4882a593Smuzhiyun 	struct apds990x_platform_data	*pdata;
114*4882a593Smuzhiyun 	struct i2c_client		*client;
115*4882a593Smuzhiyun 	struct mutex			mutex; /* avoid parallel access */
116*4882a593Smuzhiyun 	struct regulator_bulk_data	regs[2];
117*4882a593Smuzhiyun 	wait_queue_head_t		wait;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	int	prox_en;
120*4882a593Smuzhiyun 	bool	prox_continuous_mode;
121*4882a593Smuzhiyun 	bool	lux_wait_fresh_res;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	/* Chip parameters */
124*4882a593Smuzhiyun 	struct	apds990x_chip_factors	cf;
125*4882a593Smuzhiyun 	struct	reverse_factors		rcf;
126*4882a593Smuzhiyun 	u16	atime;		/* als integration time */
127*4882a593Smuzhiyun 	u16	arate;		/* als reporting rate */
128*4882a593Smuzhiyun 	u16	a_max_result;	/* Max possible ADC value with current atime */
129*4882a593Smuzhiyun 	u8	again_meas;	/* Gain used in last measurement */
130*4882a593Smuzhiyun 	u8	again_next;	/* Next calculated gain */
131*4882a593Smuzhiyun 	u8	pgain;
132*4882a593Smuzhiyun 	u8	pdiode;
133*4882a593Smuzhiyun 	u8	pdrive;
134*4882a593Smuzhiyun 	u8	lux_persistence;
135*4882a593Smuzhiyun 	u8	prox_persistence;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	u32	lux_raw;
138*4882a593Smuzhiyun 	u32	lux;
139*4882a593Smuzhiyun 	u16	lux_clear;
140*4882a593Smuzhiyun 	u16	lux_ir;
141*4882a593Smuzhiyun 	u16	lux_calib;
142*4882a593Smuzhiyun 	u32	lux_thres_hi;
143*4882a593Smuzhiyun 	u32	lux_thres_lo;
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	u32	prox_thres;
146*4882a593Smuzhiyun 	u16	prox_data;
147*4882a593Smuzhiyun 	u16	prox_calib;
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun 	char	chipname[10];
150*4882a593Smuzhiyun 	u8	revision;
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun #define APDS_CALIB_SCALER		8192
154*4882a593Smuzhiyun #define APDS_LUX_NEUTRAL_CALIB_VALUE	(1 * APDS_CALIB_SCALER)
155*4882a593Smuzhiyun #define APDS_PROX_NEUTRAL_CALIB_VALUE	(1 * APDS_CALIB_SCALER)
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun #define APDS_PROX_DEF_THRES		600
158*4882a593Smuzhiyun #define APDS_PROX_HYSTERESIS		50
159*4882a593Smuzhiyun #define APDS_LUX_DEF_THRES_HI		101
160*4882a593Smuzhiyun #define APDS_LUX_DEF_THRES_LO		100
161*4882a593Smuzhiyun #define APDS_DEFAULT_PROX_PERS		1
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun #define APDS_TIMEOUT			2000
164*4882a593Smuzhiyun #define APDS_STARTUP_DELAY		25000 /* us */
165*4882a593Smuzhiyun #define APDS_RANGE			65535
166*4882a593Smuzhiyun #define APDS_PROX_RANGE			1023
167*4882a593Smuzhiyun #define APDS_LUX_GAIN_LO_LIMIT		100
168*4882a593Smuzhiyun #define APDS_LUX_GAIN_LO_LIMIT_STRICT	25
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun #define TIMESTEP			87 /* 2.7ms is about 87 / 32 */
171*4882a593Smuzhiyun #define TIME_STEP_SCALER		32
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun #define APDS_LUX_AVERAGING_TIME		50 /* tolerates 50/60Hz ripple */
174*4882a593Smuzhiyun #define APDS_LUX_DEFAULT_RATE		200
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun static const u8 again[]	= {1, 8, 16, 120}; /* ALS gain steps */
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun /* Following two tables must match i.e 10Hz rate means 1 as persistence value */
179*4882a593Smuzhiyun static const u16 arates_hz[] = {10, 5, 2, 1};
180*4882a593Smuzhiyun static const u8 apersis[] = {1, 2, 4, 5};
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun /* Regulators */
183*4882a593Smuzhiyun static const char reg_vcc[] = "Vdd";
184*4882a593Smuzhiyun static const char reg_vled[] = "Vled";
185*4882a593Smuzhiyun 
apds990x_read_byte(struct apds990x_chip * chip,u8 reg,u8 * data)186*4882a593Smuzhiyun static int apds990x_read_byte(struct apds990x_chip *chip, u8 reg, u8 *data)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun 	struct i2c_client *client = chip->client;
189*4882a593Smuzhiyun 	s32 ret;
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	reg &= ~APDS990x_CMD_TYPE_MASK;
192*4882a593Smuzhiyun 	reg |= APDS990x_CMD | APDS990x_CMD_TYPE_RB;
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, reg);
195*4882a593Smuzhiyun 	*data = ret;
196*4882a593Smuzhiyun 	return (int)ret;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
apds990x_read_word(struct apds990x_chip * chip,u8 reg,u16 * data)199*4882a593Smuzhiyun static int apds990x_read_word(struct apds990x_chip *chip, u8 reg, u16 *data)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	struct i2c_client *client = chip->client;
202*4882a593Smuzhiyun 	s32 ret;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	reg &= ~APDS990x_CMD_TYPE_MASK;
205*4882a593Smuzhiyun 	reg |= APDS990x_CMD | APDS990x_CMD_TYPE_INC;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	ret = i2c_smbus_read_word_data(client, reg);
208*4882a593Smuzhiyun 	*data = ret;
209*4882a593Smuzhiyun 	return (int)ret;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun 
apds990x_write_byte(struct apds990x_chip * chip,u8 reg,u8 data)212*4882a593Smuzhiyun static int apds990x_write_byte(struct apds990x_chip *chip, u8 reg, u8 data)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun 	struct i2c_client *client = chip->client;
215*4882a593Smuzhiyun 	s32 ret;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	reg &= ~APDS990x_CMD_TYPE_MASK;
218*4882a593Smuzhiyun 	reg |= APDS990x_CMD | APDS990x_CMD_TYPE_RB;
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(client, reg, data);
221*4882a593Smuzhiyun 	return (int)ret;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun 
apds990x_write_word(struct apds990x_chip * chip,u8 reg,u16 data)224*4882a593Smuzhiyun static int apds990x_write_word(struct apds990x_chip *chip, u8 reg, u16 data)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun 	struct i2c_client *client = chip->client;
227*4882a593Smuzhiyun 	s32 ret;
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	reg &= ~APDS990x_CMD_TYPE_MASK;
230*4882a593Smuzhiyun 	reg |= APDS990x_CMD | APDS990x_CMD_TYPE_INC;
231*4882a593Smuzhiyun 
232*4882a593Smuzhiyun 	ret = i2c_smbus_write_word_data(client, reg, data);
233*4882a593Smuzhiyun 	return (int)ret;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun 
apds990x_mode_on(struct apds990x_chip * chip)236*4882a593Smuzhiyun static int apds990x_mode_on(struct apds990x_chip *chip)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun 	/* ALS is mandatory, proximity optional */
239*4882a593Smuzhiyun 	u8 reg = APDS990X_EN_AIEN | APDS990X_EN_PON | APDS990X_EN_AEN |
240*4882a593Smuzhiyun 		APDS990X_EN_WEN;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	if (chip->prox_en)
243*4882a593Smuzhiyun 		reg |= APDS990X_EN_PIEN | APDS990X_EN_PEN;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	return apds990x_write_byte(chip, APDS990X_ENABLE, reg);
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun 
apds990x_lux_to_threshold(struct apds990x_chip * chip,u32 lux)248*4882a593Smuzhiyun static u16 apds990x_lux_to_threshold(struct apds990x_chip *chip, u32 lux)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun 	u32 thres;
251*4882a593Smuzhiyun 	u32 cpl;
252*4882a593Smuzhiyun 	u32 ir;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	if (lux == 0)
255*4882a593Smuzhiyun 		return 0;
256*4882a593Smuzhiyun 	else if (lux == APDS_RANGE)
257*4882a593Smuzhiyun 		return APDS_RANGE;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	/*
260*4882a593Smuzhiyun 	 * Reported LUX value is a combination of the IR and CLEAR channel
261*4882a593Smuzhiyun 	 * values. However, interrupt threshold is only for clear channel.
262*4882a593Smuzhiyun 	 * This function approximates needed HW threshold value for a given
263*4882a593Smuzhiyun 	 * LUX value in the current lightning type.
264*4882a593Smuzhiyun 	 * IR level compared to visible light varies heavily depending on the
265*4882a593Smuzhiyun 	 * source of the light
266*4882a593Smuzhiyun 	 *
267*4882a593Smuzhiyun 	 * Calculate threshold value for the next measurement period.
268*4882a593Smuzhiyun 	 * Math: threshold = lux * cpl where
269*4882a593Smuzhiyun 	 * cpl = atime * again / (glass_attenuation * device_factor)
270*4882a593Smuzhiyun 	 * (count-per-lux)
271*4882a593Smuzhiyun 	 *
272*4882a593Smuzhiyun 	 * First remove calibration. Division by four is to avoid overflow
273*4882a593Smuzhiyun 	 */
274*4882a593Smuzhiyun 	lux = lux * (APDS_CALIB_SCALER / 4) / (chip->lux_calib / 4);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	/* Multiplication by 64 is to increase accuracy */
277*4882a593Smuzhiyun 	cpl = ((u32)chip->atime * (u32)again[chip->again_next] *
278*4882a593Smuzhiyun 		APDS_PARAM_SCALE * 64) / (chip->cf.ga * chip->cf.df);
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	thres = lux * cpl / 64;
281*4882a593Smuzhiyun 	/*
282*4882a593Smuzhiyun 	 * Convert IR light from the latest result to match with
283*4882a593Smuzhiyun 	 * new gain step. This helps to adapt with the current
284*4882a593Smuzhiyun 	 * source of light.
285*4882a593Smuzhiyun 	 */
286*4882a593Smuzhiyun 	ir = (u32)chip->lux_ir * (u32)again[chip->again_next] /
287*4882a593Smuzhiyun 		(u32)again[chip->again_meas];
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	/*
290*4882a593Smuzhiyun 	 * Compensate count with IR light impact
291*4882a593Smuzhiyun 	 * IAC1 > IAC2 (see apds990x_get_lux for formulas)
292*4882a593Smuzhiyun 	 */
293*4882a593Smuzhiyun 	if (chip->lux_clear * APDS_PARAM_SCALE >=
294*4882a593Smuzhiyun 		chip->rcf.afactor * chip->lux_ir)
295*4882a593Smuzhiyun 		thres = (chip->rcf.cf1 * thres + chip->rcf.irf1 * ir) /
296*4882a593Smuzhiyun 			APDS_PARAM_SCALE;
297*4882a593Smuzhiyun 	else
298*4882a593Smuzhiyun 		thres = (chip->rcf.cf2 * thres + chip->rcf.irf2 * ir) /
299*4882a593Smuzhiyun 			APDS_PARAM_SCALE;
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (thres >= chip->a_max_result)
302*4882a593Smuzhiyun 		thres = chip->a_max_result - 1;
303*4882a593Smuzhiyun 	return thres;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun 
apds990x_set_atime(struct apds990x_chip * chip,u32 time_ms)306*4882a593Smuzhiyun static inline int apds990x_set_atime(struct apds990x_chip *chip, u32 time_ms)
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun 	u8 reg_value;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	chip->atime = time_ms;
311*4882a593Smuzhiyun 	/* Formula is specified in the data sheet */
312*4882a593Smuzhiyun 	reg_value = 256 - ((time_ms * TIME_STEP_SCALER) / TIMESTEP);
313*4882a593Smuzhiyun 	/* Calculate max ADC value for given integration time */
314*4882a593Smuzhiyun 	chip->a_max_result = (u16)(256 - reg_value) * APDS990X_TIME_TO_ADC;
315*4882a593Smuzhiyun 	return apds990x_write_byte(chip, APDS990X_ATIME, reg_value);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun /* Called always with mutex locked */
apds990x_refresh_pthres(struct apds990x_chip * chip,int data)319*4882a593Smuzhiyun static int apds990x_refresh_pthres(struct apds990x_chip *chip, int data)
320*4882a593Smuzhiyun {
321*4882a593Smuzhiyun 	int ret, lo, hi;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* If the chip is not in use, don't try to access it */
324*4882a593Smuzhiyun 	if (pm_runtime_suspended(&chip->client->dev))
325*4882a593Smuzhiyun 		return 0;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	if (data < chip->prox_thres) {
328*4882a593Smuzhiyun 		lo = 0;
329*4882a593Smuzhiyun 		hi = chip->prox_thres;
330*4882a593Smuzhiyun 	} else {
331*4882a593Smuzhiyun 		lo = chip->prox_thres - APDS_PROX_HYSTERESIS;
332*4882a593Smuzhiyun 		if (chip->prox_continuous_mode)
333*4882a593Smuzhiyun 			hi = chip->prox_thres;
334*4882a593Smuzhiyun 		else
335*4882a593Smuzhiyun 			hi = APDS_RANGE;
336*4882a593Smuzhiyun 	}
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	ret = apds990x_write_word(chip, APDS990X_PILTL, lo);
339*4882a593Smuzhiyun 	ret |= apds990x_write_word(chip, APDS990X_PIHTL, hi);
340*4882a593Smuzhiyun 	return ret;
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun 
343*4882a593Smuzhiyun /* Called always with mutex locked */
apds990x_refresh_athres(struct apds990x_chip * chip)344*4882a593Smuzhiyun static int apds990x_refresh_athres(struct apds990x_chip *chip)
345*4882a593Smuzhiyun {
346*4882a593Smuzhiyun 	int ret;
347*4882a593Smuzhiyun 	/* If the chip is not in use, don't try to access it */
348*4882a593Smuzhiyun 	if (pm_runtime_suspended(&chip->client->dev))
349*4882a593Smuzhiyun 		return 0;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	ret = apds990x_write_word(chip, APDS990X_AILTL,
352*4882a593Smuzhiyun 			apds990x_lux_to_threshold(chip, chip->lux_thres_lo));
353*4882a593Smuzhiyun 	ret |= apds990x_write_word(chip, APDS990X_AIHTL,
354*4882a593Smuzhiyun 			apds990x_lux_to_threshold(chip, chip->lux_thres_hi));
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	return ret;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun /* Called always with mutex locked */
apds990x_force_a_refresh(struct apds990x_chip * chip)360*4882a593Smuzhiyun static void apds990x_force_a_refresh(struct apds990x_chip *chip)
361*4882a593Smuzhiyun {
362*4882a593Smuzhiyun 	/* This will force ALS interrupt after the next measurement. */
363*4882a593Smuzhiyun 	apds990x_write_word(chip, APDS990X_AILTL, APDS_LUX_DEF_THRES_LO);
364*4882a593Smuzhiyun 	apds990x_write_word(chip, APDS990X_AIHTL, APDS_LUX_DEF_THRES_HI);
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun /* Called always with mutex locked */
apds990x_force_p_refresh(struct apds990x_chip * chip)368*4882a593Smuzhiyun static void apds990x_force_p_refresh(struct apds990x_chip *chip)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun 	/* This will force proximity interrupt after the next measurement. */
371*4882a593Smuzhiyun 	apds990x_write_word(chip, APDS990X_PILTL, APDS_PROX_DEF_THRES - 1);
372*4882a593Smuzhiyun 	apds990x_write_word(chip, APDS990X_PIHTL, APDS_PROX_DEF_THRES);
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun /* Called always with mutex locked */
apds990x_calc_again(struct apds990x_chip * chip)376*4882a593Smuzhiyun static int apds990x_calc_again(struct apds990x_chip *chip)
377*4882a593Smuzhiyun {
378*4882a593Smuzhiyun 	int curr_again = chip->again_meas;
379*4882a593Smuzhiyun 	int next_again = chip->again_meas;
380*4882a593Smuzhiyun 	int ret = 0;
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun 	/* Calculate suitable als gain */
383*4882a593Smuzhiyun 	if (chip->lux_clear == chip->a_max_result)
384*4882a593Smuzhiyun 		next_again -= 2; /* ALS saturated. Decrease gain by 2 steps */
385*4882a593Smuzhiyun 	else if (chip->lux_clear > chip->a_max_result / 2)
386*4882a593Smuzhiyun 		next_again--;
387*4882a593Smuzhiyun 	else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT)
388*4882a593Smuzhiyun 		next_again += 2; /* Too dark. Increase gain by 2 steps */
389*4882a593Smuzhiyun 	else if (chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT)
390*4882a593Smuzhiyun 		next_again++;
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	/* Limit gain to available range */
393*4882a593Smuzhiyun 	if (next_again < 0)
394*4882a593Smuzhiyun 		next_again = 0;
395*4882a593Smuzhiyun 	else if (next_again > APDS990X_MAX_AGAIN)
396*4882a593Smuzhiyun 		next_again = APDS990X_MAX_AGAIN;
397*4882a593Smuzhiyun 
398*4882a593Smuzhiyun 	/* Let's check can we trust the measured result */
399*4882a593Smuzhiyun 	if (chip->lux_clear == chip->a_max_result)
400*4882a593Smuzhiyun 		/* Result can be totally garbage due to saturation */
401*4882a593Smuzhiyun 		ret = -ERANGE;
402*4882a593Smuzhiyun 	else if (next_again != curr_again &&
403*4882a593Smuzhiyun 		chip->lux_clear < APDS_LUX_GAIN_LO_LIMIT_STRICT)
404*4882a593Smuzhiyun 		/*
405*4882a593Smuzhiyun 		 * Gain is changed and measurement result is very small.
406*4882a593Smuzhiyun 		 * Result can be totally garbage due to underflow
407*4882a593Smuzhiyun 		 */
408*4882a593Smuzhiyun 		ret = -ERANGE;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	chip->again_next = next_again;
411*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_CONTROL,
412*4882a593Smuzhiyun 			(chip->pdrive << 6) |
413*4882a593Smuzhiyun 			(chip->pdiode << 4) |
414*4882a593Smuzhiyun 			(chip->pgain << 2) |
415*4882a593Smuzhiyun 			(chip->again_next << 0));
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	/*
418*4882a593Smuzhiyun 	 * Error means bad result -> re-measurement is needed. The forced
419*4882a593Smuzhiyun 	 * refresh uses fastest possible persistence setting to get result
420*4882a593Smuzhiyun 	 * as soon as possible.
421*4882a593Smuzhiyun 	 */
422*4882a593Smuzhiyun 	if (ret < 0)
423*4882a593Smuzhiyun 		apds990x_force_a_refresh(chip);
424*4882a593Smuzhiyun 	else
425*4882a593Smuzhiyun 		apds990x_refresh_athres(chip);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	return ret;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun /* Called always with mutex locked */
apds990x_get_lux(struct apds990x_chip * chip,int clear,int ir)431*4882a593Smuzhiyun static int apds990x_get_lux(struct apds990x_chip *chip, int clear, int ir)
432*4882a593Smuzhiyun {
433*4882a593Smuzhiyun 	int iac, iac1, iac2; /* IR adjusted counts */
434*4882a593Smuzhiyun 	u32 lpc; /* Lux per count */
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	/* Formulas:
437*4882a593Smuzhiyun 	 * iac1 = CF1 * CLEAR_CH - IRF1 * IR_CH
438*4882a593Smuzhiyun 	 * iac2 = CF2 * CLEAR_CH - IRF2 * IR_CH
439*4882a593Smuzhiyun 	 */
440*4882a593Smuzhiyun 	iac1 = (chip->cf.cf1 * clear - chip->cf.irf1 * ir) / APDS_PARAM_SCALE;
441*4882a593Smuzhiyun 	iac2 = (chip->cf.cf2 * clear - chip->cf.irf2 * ir) / APDS_PARAM_SCALE;
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	iac = max(iac1, iac2);
444*4882a593Smuzhiyun 	iac = max(iac, 0);
445*4882a593Smuzhiyun 
446*4882a593Smuzhiyun 	lpc = APDS990X_LUX_OUTPUT_SCALE * (chip->cf.df * chip->cf.ga) /
447*4882a593Smuzhiyun 		(u32)(again[chip->again_meas] * (u32)chip->atime);
448*4882a593Smuzhiyun 
449*4882a593Smuzhiyun 	return (iac * lpc) / APDS_PARAM_SCALE;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun 
apds990x_ack_int(struct apds990x_chip * chip,u8 mode)452*4882a593Smuzhiyun static int apds990x_ack_int(struct apds990x_chip *chip, u8 mode)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun 	struct i2c_client *client = chip->client;
455*4882a593Smuzhiyun 	s32 ret;
456*4882a593Smuzhiyun 	u8 reg = APDS990x_CMD | APDS990x_CMD_TYPE_SPE;
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	switch (mode & (APDS990X_ST_AINT | APDS990X_ST_PINT)) {
459*4882a593Smuzhiyun 	case APDS990X_ST_AINT:
460*4882a593Smuzhiyun 		reg |= APDS990X_INT_ACK_ALS;
461*4882a593Smuzhiyun 		break;
462*4882a593Smuzhiyun 	case APDS990X_ST_PINT:
463*4882a593Smuzhiyun 		reg |= APDS990X_INT_ACK_PS;
464*4882a593Smuzhiyun 		break;
465*4882a593Smuzhiyun 	default:
466*4882a593Smuzhiyun 		reg |= APDS990X_INT_ACK_BOTH;
467*4882a593Smuzhiyun 		break;
468*4882a593Smuzhiyun 	}
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(client, reg);
471*4882a593Smuzhiyun 	return (int)ret;
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun 
apds990x_irq(int irq,void * data)474*4882a593Smuzhiyun static irqreturn_t apds990x_irq(int irq, void *data)
475*4882a593Smuzhiyun {
476*4882a593Smuzhiyun 	struct apds990x_chip *chip = data;
477*4882a593Smuzhiyun 	u8 status;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	apds990x_read_byte(chip, APDS990X_STATUS, &status);
480*4882a593Smuzhiyun 	apds990x_ack_int(chip, status);
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
483*4882a593Smuzhiyun 	if (!pm_runtime_suspended(&chip->client->dev)) {
484*4882a593Smuzhiyun 		if (status & APDS990X_ST_AINT) {
485*4882a593Smuzhiyun 			apds990x_read_word(chip, APDS990X_CDATAL,
486*4882a593Smuzhiyun 					&chip->lux_clear);
487*4882a593Smuzhiyun 			apds990x_read_word(chip, APDS990X_IRDATAL,
488*4882a593Smuzhiyun 					&chip->lux_ir);
489*4882a593Smuzhiyun 			/* Store used gain for calculations */
490*4882a593Smuzhiyun 			chip->again_meas = chip->again_next;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 			chip->lux_raw = apds990x_get_lux(chip,
493*4882a593Smuzhiyun 							chip->lux_clear,
494*4882a593Smuzhiyun 							chip->lux_ir);
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun 			if (apds990x_calc_again(chip) == 0) {
497*4882a593Smuzhiyun 				/* Result is valid */
498*4882a593Smuzhiyun 				chip->lux = chip->lux_raw;
499*4882a593Smuzhiyun 				chip->lux_wait_fresh_res = false;
500*4882a593Smuzhiyun 				wake_up(&chip->wait);
501*4882a593Smuzhiyun 				sysfs_notify(&chip->client->dev.kobj,
502*4882a593Smuzhiyun 					NULL, "lux0_input");
503*4882a593Smuzhiyun 			}
504*4882a593Smuzhiyun 		}
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 		if ((status & APDS990X_ST_PINT) && chip->prox_en) {
507*4882a593Smuzhiyun 			u16 clr_ch;
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 			apds990x_read_word(chip, APDS990X_CDATAL, &clr_ch);
510*4882a593Smuzhiyun 			/*
511*4882a593Smuzhiyun 			 * If ALS channel is saturated at min gain,
512*4882a593Smuzhiyun 			 * proximity gives false posivite values.
513*4882a593Smuzhiyun 			 * Just ignore them.
514*4882a593Smuzhiyun 			 */
515*4882a593Smuzhiyun 			if (chip->again_meas == 0 &&
516*4882a593Smuzhiyun 				clr_ch == chip->a_max_result)
517*4882a593Smuzhiyun 				chip->prox_data = 0;
518*4882a593Smuzhiyun 			else
519*4882a593Smuzhiyun 				apds990x_read_word(chip,
520*4882a593Smuzhiyun 						APDS990X_PDATAL,
521*4882a593Smuzhiyun 						&chip->prox_data);
522*4882a593Smuzhiyun 
523*4882a593Smuzhiyun 			apds990x_refresh_pthres(chip, chip->prox_data);
524*4882a593Smuzhiyun 			if (chip->prox_data < chip->prox_thres)
525*4882a593Smuzhiyun 				chip->prox_data = 0;
526*4882a593Smuzhiyun 			else if (!chip->prox_continuous_mode)
527*4882a593Smuzhiyun 				chip->prox_data = APDS_PROX_RANGE;
528*4882a593Smuzhiyun 			sysfs_notify(&chip->client->dev.kobj,
529*4882a593Smuzhiyun 				NULL, "prox0_raw");
530*4882a593Smuzhiyun 		}
531*4882a593Smuzhiyun 	}
532*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
533*4882a593Smuzhiyun 	return IRQ_HANDLED;
534*4882a593Smuzhiyun }
535*4882a593Smuzhiyun 
apds990x_configure(struct apds990x_chip * chip)536*4882a593Smuzhiyun static int apds990x_configure(struct apds990x_chip *chip)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun 	/* It is recommended to use disabled mode during these operations */
539*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL);
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	/* conversion and wait times for different state machince states */
542*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_PTIME, APDS990X_PTIME_DEFAULT);
543*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_WTIME, APDS990X_WTIME_DEFAULT);
544*4882a593Smuzhiyun 	apds990x_set_atime(chip, APDS_LUX_AVERAGING_TIME);
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_CONFIG, 0);
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 	/* Persistence levels */
549*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_PERS,
550*4882a593Smuzhiyun 			(chip->lux_persistence << APDS990X_APERS_SHIFT) |
551*4882a593Smuzhiyun 			(chip->prox_persistence << APDS990X_PPERS_SHIFT));
552*4882a593Smuzhiyun 
553*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_PPCOUNT, chip->pdata->ppcount);
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	/* Start with relatively small gain */
556*4882a593Smuzhiyun 	chip->again_meas = 1;
557*4882a593Smuzhiyun 	chip->again_next = 1;
558*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_CONTROL,
559*4882a593Smuzhiyun 			(chip->pdrive << 6) |
560*4882a593Smuzhiyun 			(chip->pdiode << 4) |
561*4882a593Smuzhiyun 			(chip->pgain << 2) |
562*4882a593Smuzhiyun 			(chip->again_next << 0));
563*4882a593Smuzhiyun 	return 0;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun 
apds990x_detect(struct apds990x_chip * chip)566*4882a593Smuzhiyun static int apds990x_detect(struct apds990x_chip *chip)
567*4882a593Smuzhiyun {
568*4882a593Smuzhiyun 	struct i2c_client *client = chip->client;
569*4882a593Smuzhiyun 	int ret;
570*4882a593Smuzhiyun 	u8 id;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 	ret = apds990x_read_byte(chip, APDS990X_ID, &id);
573*4882a593Smuzhiyun 	if (ret < 0) {
574*4882a593Smuzhiyun 		dev_err(&client->dev, "ID read failed\n");
575*4882a593Smuzhiyun 		return ret;
576*4882a593Smuzhiyun 	}
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	ret = apds990x_read_byte(chip, APDS990X_REV, &chip->revision);
579*4882a593Smuzhiyun 	if (ret < 0) {
580*4882a593Smuzhiyun 		dev_err(&client->dev, "REV read failed\n");
581*4882a593Smuzhiyun 		return ret;
582*4882a593Smuzhiyun 	}
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	switch (id) {
585*4882a593Smuzhiyun 	case APDS990X_ID_0:
586*4882a593Smuzhiyun 	case APDS990X_ID_4:
587*4882a593Smuzhiyun 	case APDS990X_ID_29:
588*4882a593Smuzhiyun 		snprintf(chip->chipname, sizeof(chip->chipname), "APDS-990x");
589*4882a593Smuzhiyun 		break;
590*4882a593Smuzhiyun 	default:
591*4882a593Smuzhiyun 		ret = -ENODEV;
592*4882a593Smuzhiyun 		break;
593*4882a593Smuzhiyun 	}
594*4882a593Smuzhiyun 	return ret;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun 
597*4882a593Smuzhiyun #ifdef CONFIG_PM
apds990x_chip_on(struct apds990x_chip * chip)598*4882a593Smuzhiyun static int apds990x_chip_on(struct apds990x_chip *chip)
599*4882a593Smuzhiyun {
600*4882a593Smuzhiyun 	int err	 = regulator_bulk_enable(ARRAY_SIZE(chip->regs),
601*4882a593Smuzhiyun 					chip->regs);
602*4882a593Smuzhiyun 	if (err < 0)
603*4882a593Smuzhiyun 		return err;
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	usleep_range(APDS_STARTUP_DELAY, 2 * APDS_STARTUP_DELAY);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	/* Refresh all configs in case of regulators were off */
608*4882a593Smuzhiyun 	chip->prox_data = 0;
609*4882a593Smuzhiyun 	apds990x_configure(chip);
610*4882a593Smuzhiyun 	apds990x_mode_on(chip);
611*4882a593Smuzhiyun 	return 0;
612*4882a593Smuzhiyun }
613*4882a593Smuzhiyun #endif
614*4882a593Smuzhiyun 
apds990x_chip_off(struct apds990x_chip * chip)615*4882a593Smuzhiyun static int apds990x_chip_off(struct apds990x_chip *chip)
616*4882a593Smuzhiyun {
617*4882a593Smuzhiyun 	apds990x_write_byte(chip, APDS990X_ENABLE, APDS990X_EN_DISABLE_ALL);
618*4882a593Smuzhiyun 	regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
619*4882a593Smuzhiyun 	return 0;
620*4882a593Smuzhiyun }
621*4882a593Smuzhiyun 
apds990x_lux_show(struct device * dev,struct device_attribute * attr,char * buf)622*4882a593Smuzhiyun static ssize_t apds990x_lux_show(struct device *dev,
623*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
624*4882a593Smuzhiyun {
625*4882a593Smuzhiyun 	struct apds990x_chip *chip = dev_get_drvdata(dev);
626*4882a593Smuzhiyun 	ssize_t ret;
627*4882a593Smuzhiyun 	u32 result;
628*4882a593Smuzhiyun 	long timeout;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	if (pm_runtime_suspended(dev))
631*4882a593Smuzhiyun 		return -EIO;
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	timeout = wait_event_interruptible_timeout(chip->wait,
634*4882a593Smuzhiyun 						!chip->lux_wait_fresh_res,
635*4882a593Smuzhiyun 						msecs_to_jiffies(APDS_TIMEOUT));
636*4882a593Smuzhiyun 	if (!timeout)
637*4882a593Smuzhiyun 		return -EIO;
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
640*4882a593Smuzhiyun 	result = (chip->lux * chip->lux_calib) / APDS_CALIB_SCALER;
641*4882a593Smuzhiyun 	if (result > (APDS_RANGE * APDS990X_LUX_OUTPUT_SCALE))
642*4882a593Smuzhiyun 		result = APDS_RANGE * APDS990X_LUX_OUTPUT_SCALE;
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun 	ret = sprintf(buf, "%d.%d\n",
645*4882a593Smuzhiyun 		result / APDS990X_LUX_OUTPUT_SCALE,
646*4882a593Smuzhiyun 		result % APDS990X_LUX_OUTPUT_SCALE);
647*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
648*4882a593Smuzhiyun 	return ret;
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun 
651*4882a593Smuzhiyun static DEVICE_ATTR(lux0_input, S_IRUGO, apds990x_lux_show, NULL);
652*4882a593Smuzhiyun 
apds990x_lux_range_show(struct device * dev,struct device_attribute * attr,char * buf)653*4882a593Smuzhiyun static ssize_t apds990x_lux_range_show(struct device *dev,
654*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
655*4882a593Smuzhiyun {
656*4882a593Smuzhiyun 	return sprintf(buf, "%u\n", APDS_RANGE);
657*4882a593Smuzhiyun }
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun static DEVICE_ATTR(lux0_sensor_range, S_IRUGO, apds990x_lux_range_show, NULL);
660*4882a593Smuzhiyun 
apds990x_lux_calib_format_show(struct device * dev,struct device_attribute * attr,char * buf)661*4882a593Smuzhiyun static ssize_t apds990x_lux_calib_format_show(struct device *dev,
662*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
663*4882a593Smuzhiyun {
664*4882a593Smuzhiyun 	return sprintf(buf, "%u\n", APDS_CALIB_SCALER);
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun static DEVICE_ATTR(lux0_calibscale_default, S_IRUGO,
668*4882a593Smuzhiyun 		apds990x_lux_calib_format_show, NULL);
669*4882a593Smuzhiyun 
apds990x_lux_calib_show(struct device * dev,struct device_attribute * attr,char * buf)670*4882a593Smuzhiyun static ssize_t apds990x_lux_calib_show(struct device *dev,
671*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	struct apds990x_chip *chip = dev_get_drvdata(dev);
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	return sprintf(buf, "%u\n", chip->lux_calib);
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun 
apds990x_lux_calib_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)678*4882a593Smuzhiyun static ssize_t apds990x_lux_calib_store(struct device *dev,
679*4882a593Smuzhiyun 				  struct device_attribute *attr,
680*4882a593Smuzhiyun 				  const char *buf, size_t len)
681*4882a593Smuzhiyun {
682*4882a593Smuzhiyun 	struct apds990x_chip *chip = dev_get_drvdata(dev);
683*4882a593Smuzhiyun 	unsigned long value;
684*4882a593Smuzhiyun 	int ret;
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	ret = kstrtoul(buf, 0, &value);
687*4882a593Smuzhiyun 	if (ret)
688*4882a593Smuzhiyun 		return ret;
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	chip->lux_calib = value;
691*4882a593Smuzhiyun 
692*4882a593Smuzhiyun 	return len;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun static DEVICE_ATTR(lux0_calibscale, S_IRUGO | S_IWUSR, apds990x_lux_calib_show,
696*4882a593Smuzhiyun 		apds990x_lux_calib_store);
697*4882a593Smuzhiyun 
apds990x_rate_avail(struct device * dev,struct device_attribute * attr,char * buf)698*4882a593Smuzhiyun static ssize_t apds990x_rate_avail(struct device *dev,
699*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
700*4882a593Smuzhiyun {
701*4882a593Smuzhiyun 	int i;
702*4882a593Smuzhiyun 	int pos = 0;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(arates_hz); i++)
705*4882a593Smuzhiyun 		pos += sprintf(buf + pos, "%d ", arates_hz[i]);
706*4882a593Smuzhiyun 	sprintf(buf + pos - 1, "\n");
707*4882a593Smuzhiyun 	return pos;
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun 
apds990x_rate_show(struct device * dev,struct device_attribute * attr,char * buf)710*4882a593Smuzhiyun static ssize_t apds990x_rate_show(struct device *dev,
711*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
712*4882a593Smuzhiyun {
713*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", chip->arate);
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun 
apds990x_set_arate(struct apds990x_chip * chip,int rate)718*4882a593Smuzhiyun static int apds990x_set_arate(struct apds990x_chip *chip, int rate)
719*4882a593Smuzhiyun {
720*4882a593Smuzhiyun 	int i;
721*4882a593Smuzhiyun 
722*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(arates_hz); i++)
723*4882a593Smuzhiyun 		if (rate >= arates_hz[i])
724*4882a593Smuzhiyun 			break;
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	if (i == ARRAY_SIZE(arates_hz))
727*4882a593Smuzhiyun 		return -EINVAL;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	/* Pick up corresponding persistence value */
730*4882a593Smuzhiyun 	chip->lux_persistence = apersis[i];
731*4882a593Smuzhiyun 	chip->arate = arates_hz[i];
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 	/* If the chip is not in use, don't try to access it */
734*4882a593Smuzhiyun 	if (pm_runtime_suspended(&chip->client->dev))
735*4882a593Smuzhiyun 		return 0;
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	/* Persistence levels */
738*4882a593Smuzhiyun 	return apds990x_write_byte(chip, APDS990X_PERS,
739*4882a593Smuzhiyun 			(chip->lux_persistence << APDS990X_APERS_SHIFT) |
740*4882a593Smuzhiyun 			(chip->prox_persistence << APDS990X_PPERS_SHIFT));
741*4882a593Smuzhiyun }
742*4882a593Smuzhiyun 
apds990x_rate_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)743*4882a593Smuzhiyun static ssize_t apds990x_rate_store(struct device *dev,
744*4882a593Smuzhiyun 				  struct device_attribute *attr,
745*4882a593Smuzhiyun 				  const char *buf, size_t len)
746*4882a593Smuzhiyun {
747*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
748*4882a593Smuzhiyun 	unsigned long value;
749*4882a593Smuzhiyun 	int ret;
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	ret = kstrtoul(buf, 0, &value);
752*4882a593Smuzhiyun 	if (ret)
753*4882a593Smuzhiyun 		return ret;
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
756*4882a593Smuzhiyun 	ret = apds990x_set_arate(chip, value);
757*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 	if (ret < 0)
760*4882a593Smuzhiyun 		return ret;
761*4882a593Smuzhiyun 	return len;
762*4882a593Smuzhiyun }
763*4882a593Smuzhiyun 
764*4882a593Smuzhiyun static DEVICE_ATTR(lux0_rate_avail, S_IRUGO, apds990x_rate_avail, NULL);
765*4882a593Smuzhiyun 
766*4882a593Smuzhiyun static DEVICE_ATTR(lux0_rate, S_IRUGO | S_IWUSR, apds990x_rate_show,
767*4882a593Smuzhiyun 						 apds990x_rate_store);
768*4882a593Smuzhiyun 
apds990x_prox_show(struct device * dev,struct device_attribute * attr,char * buf)769*4882a593Smuzhiyun static ssize_t apds990x_prox_show(struct device *dev,
770*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
771*4882a593Smuzhiyun {
772*4882a593Smuzhiyun 	ssize_t ret;
773*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
774*4882a593Smuzhiyun 
775*4882a593Smuzhiyun 	if (pm_runtime_suspended(dev) || !chip->prox_en)
776*4882a593Smuzhiyun 		return -EIO;
777*4882a593Smuzhiyun 
778*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
779*4882a593Smuzhiyun 	ret = sprintf(buf, "%d\n", chip->prox_data);
780*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
781*4882a593Smuzhiyun 	return ret;
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun static DEVICE_ATTR(prox0_raw, S_IRUGO, apds990x_prox_show, NULL);
785*4882a593Smuzhiyun 
apds990x_prox_range_show(struct device * dev,struct device_attribute * attr,char * buf)786*4882a593Smuzhiyun static ssize_t apds990x_prox_range_show(struct device *dev,
787*4882a593Smuzhiyun 				 struct device_attribute *attr, char *buf)
788*4882a593Smuzhiyun {
789*4882a593Smuzhiyun 	return sprintf(buf, "%u\n", APDS_PROX_RANGE);
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun 
792*4882a593Smuzhiyun static DEVICE_ATTR(prox0_sensor_range, S_IRUGO, apds990x_prox_range_show, NULL);
793*4882a593Smuzhiyun 
apds990x_prox_enable_show(struct device * dev,struct device_attribute * attr,char * buf)794*4882a593Smuzhiyun static ssize_t apds990x_prox_enable_show(struct device *dev,
795*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
796*4882a593Smuzhiyun {
797*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", chip->prox_en);
800*4882a593Smuzhiyun }
801*4882a593Smuzhiyun 
apds990x_prox_enable_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)802*4882a593Smuzhiyun static ssize_t apds990x_prox_enable_store(struct device *dev,
803*4882a593Smuzhiyun 				  struct device_attribute *attr,
804*4882a593Smuzhiyun 				  const char *buf, size_t len)
805*4882a593Smuzhiyun {
806*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
807*4882a593Smuzhiyun 	unsigned long value;
808*4882a593Smuzhiyun 	int ret;
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun 	ret = kstrtoul(buf, 0, &value);
811*4882a593Smuzhiyun 	if (ret)
812*4882a593Smuzhiyun 		return ret;
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	if (!chip->prox_en)
817*4882a593Smuzhiyun 		chip->prox_data = 0;
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	if (value)
820*4882a593Smuzhiyun 		chip->prox_en++;
821*4882a593Smuzhiyun 	else if (chip->prox_en > 0)
822*4882a593Smuzhiyun 		chip->prox_en--;
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	if (!pm_runtime_suspended(dev))
825*4882a593Smuzhiyun 		apds990x_mode_on(chip);
826*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
827*4882a593Smuzhiyun 	return len;
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun static DEVICE_ATTR(prox0_raw_en, S_IRUGO | S_IWUSR, apds990x_prox_enable_show,
831*4882a593Smuzhiyun 						   apds990x_prox_enable_store);
832*4882a593Smuzhiyun 
833*4882a593Smuzhiyun static const char *reporting_modes[] = {"trigger", "periodic"};
834*4882a593Smuzhiyun 
apds990x_prox_reporting_mode_show(struct device * dev,struct device_attribute * attr,char * buf)835*4882a593Smuzhiyun static ssize_t apds990x_prox_reporting_mode_show(struct device *dev,
836*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 	return sprintf(buf, "%s\n",
841*4882a593Smuzhiyun 		reporting_modes[!!chip->prox_continuous_mode]);
842*4882a593Smuzhiyun }
843*4882a593Smuzhiyun 
apds990x_prox_reporting_mode_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)844*4882a593Smuzhiyun static ssize_t apds990x_prox_reporting_mode_store(struct device *dev,
845*4882a593Smuzhiyun 				  struct device_attribute *attr,
846*4882a593Smuzhiyun 				  const char *buf, size_t len)
847*4882a593Smuzhiyun {
848*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
849*4882a593Smuzhiyun 	int ret;
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	ret = sysfs_match_string(reporting_modes, buf);
852*4882a593Smuzhiyun 	if (ret < 0)
853*4882a593Smuzhiyun 		return ret;
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 	chip->prox_continuous_mode = ret;
856*4882a593Smuzhiyun 	return len;
857*4882a593Smuzhiyun }
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun static DEVICE_ATTR(prox0_reporting_mode, S_IRUGO | S_IWUSR,
860*4882a593Smuzhiyun 		apds990x_prox_reporting_mode_show,
861*4882a593Smuzhiyun 		apds990x_prox_reporting_mode_store);
862*4882a593Smuzhiyun 
apds990x_prox_reporting_avail_show(struct device * dev,struct device_attribute * attr,char * buf)863*4882a593Smuzhiyun static ssize_t apds990x_prox_reporting_avail_show(struct device *dev,
864*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
865*4882a593Smuzhiyun {
866*4882a593Smuzhiyun 	return sprintf(buf, "%s %s\n", reporting_modes[0], reporting_modes[1]);
867*4882a593Smuzhiyun }
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun static DEVICE_ATTR(prox0_reporting_mode_avail, S_IRUGO | S_IWUSR,
870*4882a593Smuzhiyun 		apds990x_prox_reporting_avail_show, NULL);
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 
apds990x_lux_thresh_above_show(struct device * dev,struct device_attribute * attr,char * buf)873*4882a593Smuzhiyun static ssize_t apds990x_lux_thresh_above_show(struct device *dev,
874*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
875*4882a593Smuzhiyun {
876*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
877*4882a593Smuzhiyun 
878*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", chip->lux_thres_hi);
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun 
apds990x_lux_thresh_below_show(struct device * dev,struct device_attribute * attr,char * buf)881*4882a593Smuzhiyun static ssize_t apds990x_lux_thresh_below_show(struct device *dev,
882*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
883*4882a593Smuzhiyun {
884*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", chip->lux_thres_lo);
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun 
apds990x_set_lux_thresh(struct apds990x_chip * chip,u32 * target,const char * buf)889*4882a593Smuzhiyun static ssize_t apds990x_set_lux_thresh(struct apds990x_chip *chip, u32 *target,
890*4882a593Smuzhiyun 				const char *buf)
891*4882a593Smuzhiyun {
892*4882a593Smuzhiyun 	unsigned long thresh;
893*4882a593Smuzhiyun 	int ret;
894*4882a593Smuzhiyun 
895*4882a593Smuzhiyun 	ret = kstrtoul(buf, 0, &thresh);
896*4882a593Smuzhiyun 	if (ret)
897*4882a593Smuzhiyun 		return ret;
898*4882a593Smuzhiyun 
899*4882a593Smuzhiyun 	if (thresh > APDS_RANGE)
900*4882a593Smuzhiyun 		return -EINVAL;
901*4882a593Smuzhiyun 
902*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
903*4882a593Smuzhiyun 	*target = thresh;
904*4882a593Smuzhiyun 	/*
905*4882a593Smuzhiyun 	 * Don't update values in HW if we are still waiting for
906*4882a593Smuzhiyun 	 * first interrupt to come after device handle open call.
907*4882a593Smuzhiyun 	 */
908*4882a593Smuzhiyun 	if (!chip->lux_wait_fresh_res)
909*4882a593Smuzhiyun 		apds990x_refresh_athres(chip);
910*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
911*4882a593Smuzhiyun 	return ret;
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun }
914*4882a593Smuzhiyun 
apds990x_lux_thresh_above_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)915*4882a593Smuzhiyun static ssize_t apds990x_lux_thresh_above_store(struct device *dev,
916*4882a593Smuzhiyun 				  struct device_attribute *attr,
917*4882a593Smuzhiyun 				  const char *buf, size_t len)
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
920*4882a593Smuzhiyun 	int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_hi, buf);
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	if (ret < 0)
923*4882a593Smuzhiyun 		return ret;
924*4882a593Smuzhiyun 	return len;
925*4882a593Smuzhiyun }
926*4882a593Smuzhiyun 
apds990x_lux_thresh_below_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)927*4882a593Smuzhiyun static ssize_t apds990x_lux_thresh_below_store(struct device *dev,
928*4882a593Smuzhiyun 				  struct device_attribute *attr,
929*4882a593Smuzhiyun 				  const char *buf, size_t len)
930*4882a593Smuzhiyun {
931*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
932*4882a593Smuzhiyun 	int ret = apds990x_set_lux_thresh(chip, &chip->lux_thres_lo, buf);
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	if (ret < 0)
935*4882a593Smuzhiyun 		return ret;
936*4882a593Smuzhiyun 	return len;
937*4882a593Smuzhiyun }
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun static DEVICE_ATTR(lux0_thresh_above_value, S_IRUGO | S_IWUSR,
940*4882a593Smuzhiyun 		apds990x_lux_thresh_above_show,
941*4882a593Smuzhiyun 		apds990x_lux_thresh_above_store);
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun static DEVICE_ATTR(lux0_thresh_below_value, S_IRUGO | S_IWUSR,
944*4882a593Smuzhiyun 		apds990x_lux_thresh_below_show,
945*4882a593Smuzhiyun 		apds990x_lux_thresh_below_store);
946*4882a593Smuzhiyun 
apds990x_prox_threshold_show(struct device * dev,struct device_attribute * attr,char * buf)947*4882a593Smuzhiyun static ssize_t apds990x_prox_threshold_show(struct device *dev,
948*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", chip->prox_thres);
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun 
apds990x_prox_threshold_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)955*4882a593Smuzhiyun static ssize_t apds990x_prox_threshold_store(struct device *dev,
956*4882a593Smuzhiyun 				  struct device_attribute *attr,
957*4882a593Smuzhiyun 				  const char *buf, size_t len)
958*4882a593Smuzhiyun {
959*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
960*4882a593Smuzhiyun 	unsigned long value;
961*4882a593Smuzhiyun 	int ret;
962*4882a593Smuzhiyun 
963*4882a593Smuzhiyun 	ret = kstrtoul(buf, 0, &value);
964*4882a593Smuzhiyun 	if (ret)
965*4882a593Smuzhiyun 		return ret;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	if ((value > APDS_RANGE) || (value == 0) ||
968*4882a593Smuzhiyun 		(value < APDS_PROX_HYSTERESIS))
969*4882a593Smuzhiyun 		return -EINVAL;
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun 	mutex_lock(&chip->mutex);
972*4882a593Smuzhiyun 	chip->prox_thres = value;
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 	apds990x_force_p_refresh(chip);
975*4882a593Smuzhiyun 	mutex_unlock(&chip->mutex);
976*4882a593Smuzhiyun 	return len;
977*4882a593Smuzhiyun }
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun static DEVICE_ATTR(prox0_thresh_above_value, S_IRUGO | S_IWUSR,
980*4882a593Smuzhiyun 		apds990x_prox_threshold_show,
981*4882a593Smuzhiyun 		apds990x_prox_threshold_store);
982*4882a593Smuzhiyun 
apds990x_power_state_show(struct device * dev,struct device_attribute * attr,char * buf)983*4882a593Smuzhiyun static ssize_t apds990x_power_state_show(struct device *dev,
984*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
985*4882a593Smuzhiyun {
986*4882a593Smuzhiyun 	return sprintf(buf, "%d\n", !pm_runtime_suspended(dev));
987*4882a593Smuzhiyun 	return 0;
988*4882a593Smuzhiyun }
989*4882a593Smuzhiyun 
apds990x_power_state_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)990*4882a593Smuzhiyun static ssize_t apds990x_power_state_store(struct device *dev,
991*4882a593Smuzhiyun 				  struct device_attribute *attr,
992*4882a593Smuzhiyun 				  const char *buf, size_t len)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
995*4882a593Smuzhiyun 	unsigned long value;
996*4882a593Smuzhiyun 	int ret;
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	ret = kstrtoul(buf, 0, &value);
999*4882a593Smuzhiyun 	if (ret)
1000*4882a593Smuzhiyun 		return ret;
1001*4882a593Smuzhiyun 
1002*4882a593Smuzhiyun 	if (value) {
1003*4882a593Smuzhiyun 		pm_runtime_get_sync(dev);
1004*4882a593Smuzhiyun 		mutex_lock(&chip->mutex);
1005*4882a593Smuzhiyun 		chip->lux_wait_fresh_res = true;
1006*4882a593Smuzhiyun 		apds990x_force_a_refresh(chip);
1007*4882a593Smuzhiyun 		apds990x_force_p_refresh(chip);
1008*4882a593Smuzhiyun 		mutex_unlock(&chip->mutex);
1009*4882a593Smuzhiyun 	} else {
1010*4882a593Smuzhiyun 		if (!pm_runtime_suspended(dev))
1011*4882a593Smuzhiyun 			pm_runtime_put(dev);
1012*4882a593Smuzhiyun 	}
1013*4882a593Smuzhiyun 	return len;
1014*4882a593Smuzhiyun }
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun static DEVICE_ATTR(power_state, S_IRUGO | S_IWUSR,
1017*4882a593Smuzhiyun 		apds990x_power_state_show,
1018*4882a593Smuzhiyun 		apds990x_power_state_store);
1019*4882a593Smuzhiyun 
apds990x_chip_id_show(struct device * dev,struct device_attribute * attr,char * buf)1020*4882a593Smuzhiyun static ssize_t apds990x_chip_id_show(struct device *dev,
1021*4882a593Smuzhiyun 				   struct device_attribute *attr, char *buf)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun 	struct apds990x_chip *chip =  dev_get_drvdata(dev);
1024*4882a593Smuzhiyun 
1025*4882a593Smuzhiyun 	return sprintf(buf, "%s %d\n", chip->chipname, chip->revision);
1026*4882a593Smuzhiyun }
1027*4882a593Smuzhiyun 
1028*4882a593Smuzhiyun static DEVICE_ATTR(chip_id, S_IRUGO, apds990x_chip_id_show, NULL);
1029*4882a593Smuzhiyun 
1030*4882a593Smuzhiyun static struct attribute *sysfs_attrs_ctrl[] = {
1031*4882a593Smuzhiyun 	&dev_attr_lux0_calibscale.attr,
1032*4882a593Smuzhiyun 	&dev_attr_lux0_calibscale_default.attr,
1033*4882a593Smuzhiyun 	&dev_attr_lux0_input.attr,
1034*4882a593Smuzhiyun 	&dev_attr_lux0_sensor_range.attr,
1035*4882a593Smuzhiyun 	&dev_attr_lux0_rate.attr,
1036*4882a593Smuzhiyun 	&dev_attr_lux0_rate_avail.attr,
1037*4882a593Smuzhiyun 	&dev_attr_lux0_thresh_above_value.attr,
1038*4882a593Smuzhiyun 	&dev_attr_lux0_thresh_below_value.attr,
1039*4882a593Smuzhiyun 	&dev_attr_prox0_raw_en.attr,
1040*4882a593Smuzhiyun 	&dev_attr_prox0_raw.attr,
1041*4882a593Smuzhiyun 	&dev_attr_prox0_sensor_range.attr,
1042*4882a593Smuzhiyun 	&dev_attr_prox0_thresh_above_value.attr,
1043*4882a593Smuzhiyun 	&dev_attr_prox0_reporting_mode.attr,
1044*4882a593Smuzhiyun 	&dev_attr_prox0_reporting_mode_avail.attr,
1045*4882a593Smuzhiyun 	&dev_attr_chip_id.attr,
1046*4882a593Smuzhiyun 	&dev_attr_power_state.attr,
1047*4882a593Smuzhiyun 	NULL
1048*4882a593Smuzhiyun };
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun static const struct attribute_group apds990x_attribute_group[] = {
1051*4882a593Smuzhiyun 	{.attrs = sysfs_attrs_ctrl },
1052*4882a593Smuzhiyun };
1053*4882a593Smuzhiyun 
apds990x_probe(struct i2c_client * client,const struct i2c_device_id * id)1054*4882a593Smuzhiyun static int apds990x_probe(struct i2c_client *client,
1055*4882a593Smuzhiyun 				const struct i2c_device_id *id)
1056*4882a593Smuzhiyun {
1057*4882a593Smuzhiyun 	struct apds990x_chip *chip;
1058*4882a593Smuzhiyun 	int err;
1059*4882a593Smuzhiyun 
1060*4882a593Smuzhiyun 	chip = kzalloc(sizeof *chip, GFP_KERNEL);
1061*4882a593Smuzhiyun 	if (!chip)
1062*4882a593Smuzhiyun 		return -ENOMEM;
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	i2c_set_clientdata(client, chip);
1065*4882a593Smuzhiyun 	chip->client  = client;
1066*4882a593Smuzhiyun 
1067*4882a593Smuzhiyun 	init_waitqueue_head(&chip->wait);
1068*4882a593Smuzhiyun 	mutex_init(&chip->mutex);
1069*4882a593Smuzhiyun 	chip->pdata	= client->dev.platform_data;
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 	if (chip->pdata == NULL) {
1072*4882a593Smuzhiyun 		dev_err(&client->dev, "platform data is mandatory\n");
1073*4882a593Smuzhiyun 		err = -EINVAL;
1074*4882a593Smuzhiyun 		goto fail1;
1075*4882a593Smuzhiyun 	}
1076*4882a593Smuzhiyun 
1077*4882a593Smuzhiyun 	if (chip->pdata->cf.ga == 0) {
1078*4882a593Smuzhiyun 		/* set uncovered sensor default parameters */
1079*4882a593Smuzhiyun 		chip->cf.ga = 1966; /* 0.48 * APDS_PARAM_SCALE */
1080*4882a593Smuzhiyun 		chip->cf.cf1 = 4096; /* 1.00 * APDS_PARAM_SCALE */
1081*4882a593Smuzhiyun 		chip->cf.irf1 = 9134; /* 2.23 * APDS_PARAM_SCALE */
1082*4882a593Smuzhiyun 		chip->cf.cf2 = 2867; /* 0.70 * APDS_PARAM_SCALE */
1083*4882a593Smuzhiyun 		chip->cf.irf2 = 5816; /* 1.42 * APDS_PARAM_SCALE */
1084*4882a593Smuzhiyun 		chip->cf.df = 52;
1085*4882a593Smuzhiyun 	} else {
1086*4882a593Smuzhiyun 		chip->cf = chip->pdata->cf;
1087*4882a593Smuzhiyun 	}
1088*4882a593Smuzhiyun 
1089*4882a593Smuzhiyun 	/* precalculate inverse chip factors for threshold control */
1090*4882a593Smuzhiyun 	chip->rcf.afactor =
1091*4882a593Smuzhiyun 		(chip->cf.irf1 - chip->cf.irf2) * APDS_PARAM_SCALE /
1092*4882a593Smuzhiyun 		(chip->cf.cf1 - chip->cf.cf2);
1093*4882a593Smuzhiyun 	chip->rcf.cf1 = APDS_PARAM_SCALE * APDS_PARAM_SCALE /
1094*4882a593Smuzhiyun 		chip->cf.cf1;
1095*4882a593Smuzhiyun 	chip->rcf.irf1 = chip->cf.irf1 * APDS_PARAM_SCALE /
1096*4882a593Smuzhiyun 		chip->cf.cf1;
1097*4882a593Smuzhiyun 	chip->rcf.cf2 = APDS_PARAM_SCALE * APDS_PARAM_SCALE /
1098*4882a593Smuzhiyun 		chip->cf.cf2;
1099*4882a593Smuzhiyun 	chip->rcf.irf2 = chip->cf.irf2 * APDS_PARAM_SCALE /
1100*4882a593Smuzhiyun 		chip->cf.cf2;
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun 	/* Set something to start with */
1103*4882a593Smuzhiyun 	chip->lux_thres_hi = APDS_LUX_DEF_THRES_HI;
1104*4882a593Smuzhiyun 	chip->lux_thres_lo = APDS_LUX_DEF_THRES_LO;
1105*4882a593Smuzhiyun 	chip->lux_calib = APDS_LUX_NEUTRAL_CALIB_VALUE;
1106*4882a593Smuzhiyun 
1107*4882a593Smuzhiyun 	chip->prox_thres = APDS_PROX_DEF_THRES;
1108*4882a593Smuzhiyun 	chip->pdrive = chip->pdata->pdrive;
1109*4882a593Smuzhiyun 	chip->pdiode = APDS_PDIODE_IR;
1110*4882a593Smuzhiyun 	chip->pgain = APDS_PGAIN_1X;
1111*4882a593Smuzhiyun 	chip->prox_calib = APDS_PROX_NEUTRAL_CALIB_VALUE;
1112*4882a593Smuzhiyun 	chip->prox_persistence = APDS_DEFAULT_PROX_PERS;
1113*4882a593Smuzhiyun 	chip->prox_continuous_mode = false;
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	chip->regs[0].supply = reg_vcc;
1116*4882a593Smuzhiyun 	chip->regs[1].supply = reg_vled;
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	err = regulator_bulk_get(&client->dev,
1119*4882a593Smuzhiyun 				 ARRAY_SIZE(chip->regs), chip->regs);
1120*4882a593Smuzhiyun 	if (err < 0) {
1121*4882a593Smuzhiyun 		dev_err(&client->dev, "Cannot get regulators\n");
1122*4882a593Smuzhiyun 		goto fail1;
1123*4882a593Smuzhiyun 	}
1124*4882a593Smuzhiyun 
1125*4882a593Smuzhiyun 	err = regulator_bulk_enable(ARRAY_SIZE(chip->regs), chip->regs);
1126*4882a593Smuzhiyun 	if (err < 0) {
1127*4882a593Smuzhiyun 		dev_err(&client->dev, "Cannot enable regulators\n");
1128*4882a593Smuzhiyun 		goto fail2;
1129*4882a593Smuzhiyun 	}
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun 	usleep_range(APDS_STARTUP_DELAY, 2 * APDS_STARTUP_DELAY);
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	err = apds990x_detect(chip);
1134*4882a593Smuzhiyun 	if (err < 0) {
1135*4882a593Smuzhiyun 		dev_err(&client->dev, "APDS990X not found\n");
1136*4882a593Smuzhiyun 		goto fail3;
1137*4882a593Smuzhiyun 	}
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	pm_runtime_set_active(&client->dev);
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 	apds990x_configure(chip);
1142*4882a593Smuzhiyun 	apds990x_set_arate(chip, APDS_LUX_DEFAULT_RATE);
1143*4882a593Smuzhiyun 	apds990x_mode_on(chip);
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	pm_runtime_enable(&client->dev);
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	if (chip->pdata->setup_resources) {
1148*4882a593Smuzhiyun 		err = chip->pdata->setup_resources();
1149*4882a593Smuzhiyun 		if (err) {
1150*4882a593Smuzhiyun 			err = -EINVAL;
1151*4882a593Smuzhiyun 			goto fail3;
1152*4882a593Smuzhiyun 		}
1153*4882a593Smuzhiyun 	}
1154*4882a593Smuzhiyun 
1155*4882a593Smuzhiyun 	err = sysfs_create_group(&chip->client->dev.kobj,
1156*4882a593Smuzhiyun 				apds990x_attribute_group);
1157*4882a593Smuzhiyun 	if (err < 0) {
1158*4882a593Smuzhiyun 		dev_err(&chip->client->dev, "Sysfs registration failed\n");
1159*4882a593Smuzhiyun 		goto fail4;
1160*4882a593Smuzhiyun 	}
1161*4882a593Smuzhiyun 
1162*4882a593Smuzhiyun 	err = request_threaded_irq(client->irq, NULL,
1163*4882a593Smuzhiyun 				apds990x_irq,
1164*4882a593Smuzhiyun 				IRQF_TRIGGER_FALLING | IRQF_TRIGGER_LOW |
1165*4882a593Smuzhiyun 				IRQF_ONESHOT,
1166*4882a593Smuzhiyun 				"apds990x", chip);
1167*4882a593Smuzhiyun 	if (err) {
1168*4882a593Smuzhiyun 		dev_err(&client->dev, "could not get IRQ %d\n",
1169*4882a593Smuzhiyun 			client->irq);
1170*4882a593Smuzhiyun 		goto fail5;
1171*4882a593Smuzhiyun 	}
1172*4882a593Smuzhiyun 	return err;
1173*4882a593Smuzhiyun fail5:
1174*4882a593Smuzhiyun 	sysfs_remove_group(&chip->client->dev.kobj,
1175*4882a593Smuzhiyun 			&apds990x_attribute_group[0]);
1176*4882a593Smuzhiyun fail4:
1177*4882a593Smuzhiyun 	if (chip->pdata && chip->pdata->release_resources)
1178*4882a593Smuzhiyun 		chip->pdata->release_resources();
1179*4882a593Smuzhiyun fail3:
1180*4882a593Smuzhiyun 	regulator_bulk_disable(ARRAY_SIZE(chip->regs), chip->regs);
1181*4882a593Smuzhiyun fail2:
1182*4882a593Smuzhiyun 	regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
1183*4882a593Smuzhiyun fail1:
1184*4882a593Smuzhiyun 	kfree(chip);
1185*4882a593Smuzhiyun 	return err;
1186*4882a593Smuzhiyun }
1187*4882a593Smuzhiyun 
apds990x_remove(struct i2c_client * client)1188*4882a593Smuzhiyun static int apds990x_remove(struct i2c_client *client)
1189*4882a593Smuzhiyun {
1190*4882a593Smuzhiyun 	struct apds990x_chip *chip = i2c_get_clientdata(client);
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun 	free_irq(client->irq, chip);
1193*4882a593Smuzhiyun 	sysfs_remove_group(&chip->client->dev.kobj,
1194*4882a593Smuzhiyun 			apds990x_attribute_group);
1195*4882a593Smuzhiyun 
1196*4882a593Smuzhiyun 	if (chip->pdata && chip->pdata->release_resources)
1197*4882a593Smuzhiyun 		chip->pdata->release_resources();
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	if (!pm_runtime_suspended(&client->dev))
1200*4882a593Smuzhiyun 		apds990x_chip_off(chip);
1201*4882a593Smuzhiyun 
1202*4882a593Smuzhiyun 	pm_runtime_disable(&client->dev);
1203*4882a593Smuzhiyun 	pm_runtime_set_suspended(&client->dev);
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 	regulator_bulk_free(ARRAY_SIZE(chip->regs), chip->regs);
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 	kfree(chip);
1208*4882a593Smuzhiyun 	return 0;
1209*4882a593Smuzhiyun }
1210*4882a593Smuzhiyun 
1211*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
apds990x_suspend(struct device * dev)1212*4882a593Smuzhiyun static int apds990x_suspend(struct device *dev)
1213*4882a593Smuzhiyun {
1214*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1215*4882a593Smuzhiyun 	struct apds990x_chip *chip = i2c_get_clientdata(client);
1216*4882a593Smuzhiyun 
1217*4882a593Smuzhiyun 	apds990x_chip_off(chip);
1218*4882a593Smuzhiyun 	return 0;
1219*4882a593Smuzhiyun }
1220*4882a593Smuzhiyun 
apds990x_resume(struct device * dev)1221*4882a593Smuzhiyun static int apds990x_resume(struct device *dev)
1222*4882a593Smuzhiyun {
1223*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1224*4882a593Smuzhiyun 	struct apds990x_chip *chip = i2c_get_clientdata(client);
1225*4882a593Smuzhiyun 
1226*4882a593Smuzhiyun 	/*
1227*4882a593Smuzhiyun 	 * If we were enabled at suspend time, it is expected
1228*4882a593Smuzhiyun 	 * everything works nice and smoothly. Chip_on is enough
1229*4882a593Smuzhiyun 	 */
1230*4882a593Smuzhiyun 	apds990x_chip_on(chip);
1231*4882a593Smuzhiyun 
1232*4882a593Smuzhiyun 	return 0;
1233*4882a593Smuzhiyun }
1234*4882a593Smuzhiyun #endif
1235*4882a593Smuzhiyun 
1236*4882a593Smuzhiyun #ifdef CONFIG_PM
apds990x_runtime_suspend(struct device * dev)1237*4882a593Smuzhiyun static int apds990x_runtime_suspend(struct device *dev)
1238*4882a593Smuzhiyun {
1239*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1240*4882a593Smuzhiyun 	struct apds990x_chip *chip = i2c_get_clientdata(client);
1241*4882a593Smuzhiyun 
1242*4882a593Smuzhiyun 	apds990x_chip_off(chip);
1243*4882a593Smuzhiyun 	return 0;
1244*4882a593Smuzhiyun }
1245*4882a593Smuzhiyun 
apds990x_runtime_resume(struct device * dev)1246*4882a593Smuzhiyun static int apds990x_runtime_resume(struct device *dev)
1247*4882a593Smuzhiyun {
1248*4882a593Smuzhiyun 	struct i2c_client *client = to_i2c_client(dev);
1249*4882a593Smuzhiyun 	struct apds990x_chip *chip = i2c_get_clientdata(client);
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 	apds990x_chip_on(chip);
1252*4882a593Smuzhiyun 	return 0;
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun #endif
1256*4882a593Smuzhiyun 
1257*4882a593Smuzhiyun static const struct i2c_device_id apds990x_id[] = {
1258*4882a593Smuzhiyun 	{"apds990x", 0 },
1259*4882a593Smuzhiyun 	{}
1260*4882a593Smuzhiyun };
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, apds990x_id);
1263*4882a593Smuzhiyun 
1264*4882a593Smuzhiyun static const struct dev_pm_ops apds990x_pm_ops = {
1265*4882a593Smuzhiyun 	SET_SYSTEM_SLEEP_PM_OPS(apds990x_suspend, apds990x_resume)
1266*4882a593Smuzhiyun 	SET_RUNTIME_PM_OPS(apds990x_runtime_suspend,
1267*4882a593Smuzhiyun 			apds990x_runtime_resume,
1268*4882a593Smuzhiyun 			NULL)
1269*4882a593Smuzhiyun };
1270*4882a593Smuzhiyun 
1271*4882a593Smuzhiyun static struct i2c_driver apds990x_driver = {
1272*4882a593Smuzhiyun 	.driver	 = {
1273*4882a593Smuzhiyun 		.name	= "apds990x",
1274*4882a593Smuzhiyun 		.pm	= &apds990x_pm_ops,
1275*4882a593Smuzhiyun 	},
1276*4882a593Smuzhiyun 	.probe	  = apds990x_probe,
1277*4882a593Smuzhiyun 	.remove	  = apds990x_remove,
1278*4882a593Smuzhiyun 	.id_table = apds990x_id,
1279*4882a593Smuzhiyun };
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun module_i2c_driver(apds990x_driver);
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun MODULE_DESCRIPTION("APDS990X combined ALS and proximity sensor");
1284*4882a593Smuzhiyun MODULE_AUTHOR("Samu Onkalo, Nokia Corporation");
1285*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
1286