1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Driver for the Analog Devices digital potentiometers 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2010 Michael Hennerich, Analog Devices Inc. 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _AD_DPOT_H_ 9*4882a593Smuzhiyun #define _AD_DPOT_H_ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <linux/types.h> 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun #define DPOT_CONF(features, wipers, max_pos, uid) \ 14*4882a593Smuzhiyun (((features) << 18) | (((wipers) & 0xFF) << 10) | \ 15*4882a593Smuzhiyun ((max_pos & 0xF) << 6) | (uid & 0x3F)) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define DPOT_UID(conf) (conf & 0x3F) 18*4882a593Smuzhiyun #define DPOT_MAX_POS(conf) ((conf >> 6) & 0xF) 19*4882a593Smuzhiyun #define DPOT_WIPERS(conf) ((conf >> 10) & 0xFF) 20*4882a593Smuzhiyun #define DPOT_FEAT(conf) (conf >> 18) 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #define BRDAC0 (1 << 0) 23*4882a593Smuzhiyun #define BRDAC1 (1 << 1) 24*4882a593Smuzhiyun #define BRDAC2 (1 << 2) 25*4882a593Smuzhiyun #define BRDAC3 (1 << 3) 26*4882a593Smuzhiyun #define BRDAC4 (1 << 4) 27*4882a593Smuzhiyun #define BRDAC5 (1 << 5) 28*4882a593Smuzhiyun #define MAX_RDACS 6 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun #define F_CMD_INC (1 << 0) /* Features INC/DEC ALL, 6dB */ 31*4882a593Smuzhiyun #define F_CMD_EEP (1 << 1) /* Features EEPROM */ 32*4882a593Smuzhiyun #define F_CMD_OTP (1 << 2) /* Features OTP */ 33*4882a593Smuzhiyun #define F_CMD_TOL (1 << 3) /* RDACS feature Tolerance REG */ 34*4882a593Smuzhiyun #define F_RDACS_RW (1 << 4) /* RDACS are Read/Write */ 35*4882a593Smuzhiyun #define F_RDACS_WONLY (1 << 5) /* RDACS are Write only */ 36*4882a593Smuzhiyun #define F_AD_APPDATA (1 << 6) /* RDAC Address append to data */ 37*4882a593Smuzhiyun #define F_SPI_8BIT (1 << 7) /* All SPI XFERS are 8-bit */ 38*4882a593Smuzhiyun #define F_SPI_16BIT (1 << 8) /* All SPI XFERS are 16-bit */ 39*4882a593Smuzhiyun #define F_SPI_24BIT (1 << 9) /* All SPI XFERS are 24-bit */ 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun #define F_RDACS_RW_TOL (F_RDACS_RW | F_CMD_EEP | F_CMD_TOL) 42*4882a593Smuzhiyun #define F_RDACS_RW_EEP (F_RDACS_RW | F_CMD_EEP) 43*4882a593Smuzhiyun #define F_SPI (F_SPI_8BIT | F_SPI_16BIT | F_SPI_24BIT) 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun enum dpot_devid { 46*4882a593Smuzhiyun AD5258_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 6, 0), /* I2C */ 47*4882a593Smuzhiyun AD5259_ID = DPOT_CONF(F_RDACS_RW_TOL, BRDAC0, 8, 1), 48*4882a593Smuzhiyun AD5251_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 49*4882a593Smuzhiyun BRDAC1 | BRDAC3, 6, 2), 50*4882a593Smuzhiyun AD5252_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 51*4882a593Smuzhiyun BRDAC1 | BRDAC3, 8, 3), 52*4882a593Smuzhiyun AD5253_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 53*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 4), 54*4882a593Smuzhiyun AD5254_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 55*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 5), 56*4882a593Smuzhiyun AD5255_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 57*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2, 9, 6), 58*4882a593Smuzhiyun AD5160_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 59*4882a593Smuzhiyun BRDAC0, 8, 7), /* SPI */ 60*4882a593Smuzhiyun AD5161_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 61*4882a593Smuzhiyun BRDAC0, 8, 8), 62*4882a593Smuzhiyun AD5162_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 63*4882a593Smuzhiyun BRDAC0 | BRDAC1, 8, 9), 64*4882a593Smuzhiyun AD5165_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 65*4882a593Smuzhiyun BRDAC0, 8, 10), 66*4882a593Smuzhiyun AD5200_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 67*4882a593Smuzhiyun BRDAC0, 8, 11), 68*4882a593Smuzhiyun AD5201_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 69*4882a593Smuzhiyun BRDAC0, 5, 12), 70*4882a593Smuzhiyun AD5203_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 71*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 13), 72*4882a593Smuzhiyun AD5204_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 73*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 14), 74*4882a593Smuzhiyun AD5206_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 75*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3 | BRDAC4 | BRDAC5, 76*4882a593Smuzhiyun 8, 15), 77*4882a593Smuzhiyun AD5207_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 78*4882a593Smuzhiyun BRDAC0 | BRDAC1, 8, 16), 79*4882a593Smuzhiyun AD5231_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_24BIT, 80*4882a593Smuzhiyun BRDAC0, 10, 17), 81*4882a593Smuzhiyun AD5232_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_16BIT, 82*4882a593Smuzhiyun BRDAC0 | BRDAC1, 8, 18), 83*4882a593Smuzhiyun AD5233_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_16BIT, 84*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 6, 19), 85*4882a593Smuzhiyun AD5235_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_24BIT, 86*4882a593Smuzhiyun BRDAC0 | BRDAC1, 10, 20), 87*4882a593Smuzhiyun AD5260_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 88*4882a593Smuzhiyun BRDAC0, 8, 21), 89*4882a593Smuzhiyun AD5262_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 90*4882a593Smuzhiyun BRDAC0 | BRDAC1, 8, 22), 91*4882a593Smuzhiyun AD5263_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 92*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 23), 93*4882a593Smuzhiyun AD5290_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 94*4882a593Smuzhiyun BRDAC0, 8, 24), 95*4882a593Smuzhiyun AD5291_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP, 96*4882a593Smuzhiyun BRDAC0, 8, 25), 97*4882a593Smuzhiyun AD5292_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP, 98*4882a593Smuzhiyun BRDAC0, 10, 26), 99*4882a593Smuzhiyun AD5293_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 27), 100*4882a593Smuzhiyun AD7376_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT, 101*4882a593Smuzhiyun BRDAC0, 7, 28), 102*4882a593Smuzhiyun AD8400_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 103*4882a593Smuzhiyun BRDAC0, 8, 29), 104*4882a593Smuzhiyun AD8402_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 105*4882a593Smuzhiyun BRDAC0 | BRDAC1, 8, 30), 106*4882a593Smuzhiyun AD8403_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_16BIT, 107*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2, 8, 31), 108*4882a593Smuzhiyun ADN2850_ID = DPOT_CONF(F_RDACS_RW_EEP | F_CMD_INC | F_SPI_24BIT, 109*4882a593Smuzhiyun BRDAC0 | BRDAC1, 10, 32), 110*4882a593Smuzhiyun AD5241_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 8, 33), 111*4882a593Smuzhiyun AD5242_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 34), 112*4882a593Smuzhiyun AD5243_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 35), 113*4882a593Smuzhiyun AD5245_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 8, 36), 114*4882a593Smuzhiyun AD5246_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 7, 37), 115*4882a593Smuzhiyun AD5247_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 7, 38), 116*4882a593Smuzhiyun AD5248_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 39), 117*4882a593Smuzhiyun AD5280_ID = DPOT_CONF(F_RDACS_RW, BRDAC0, 8, 40), 118*4882a593Smuzhiyun AD5282_ID = DPOT_CONF(F_RDACS_RW, BRDAC0 | BRDAC1, 8, 41), 119*4882a593Smuzhiyun ADN2860_ID = DPOT_CONF(F_RDACS_RW_TOL | F_CMD_INC, 120*4882a593Smuzhiyun BRDAC0 | BRDAC1 | BRDAC2, 9, 42), 121*4882a593Smuzhiyun AD5273_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 6, 43), 122*4882a593Smuzhiyun AD5171_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 6, 44), 123*4882a593Smuzhiyun AD5170_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 45), 124*4882a593Smuzhiyun AD5172_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 46), 125*4882a593Smuzhiyun AD5173_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 47), 126*4882a593Smuzhiyun AD5270_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT, 127*4882a593Smuzhiyun BRDAC0, 10, 48), 128*4882a593Smuzhiyun AD5271_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT, 129*4882a593Smuzhiyun BRDAC0, 8, 49), 130*4882a593Smuzhiyun AD5272_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 10, 50), 131*4882a593Smuzhiyun AD5274_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 51), 132*4882a593Smuzhiyun }; 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define DPOT_RDAC0 0 135*4882a593Smuzhiyun #define DPOT_RDAC1 1 136*4882a593Smuzhiyun #define DPOT_RDAC2 2 137*4882a593Smuzhiyun #define DPOT_RDAC3 3 138*4882a593Smuzhiyun #define DPOT_RDAC4 4 139*4882a593Smuzhiyun #define DPOT_RDAC5 5 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun #define DPOT_RDAC_MASK 0x1F 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun #define DPOT_REG_TOL 0x18 144*4882a593Smuzhiyun #define DPOT_TOL_RDAC0 (DPOT_REG_TOL | DPOT_RDAC0) 145*4882a593Smuzhiyun #define DPOT_TOL_RDAC1 (DPOT_REG_TOL | DPOT_RDAC1) 146*4882a593Smuzhiyun #define DPOT_TOL_RDAC2 (DPOT_REG_TOL | DPOT_RDAC2) 147*4882a593Smuzhiyun #define DPOT_TOL_RDAC3 (DPOT_REG_TOL | DPOT_RDAC3) 148*4882a593Smuzhiyun #define DPOT_TOL_RDAC4 (DPOT_REG_TOL | DPOT_RDAC4) 149*4882a593Smuzhiyun #define DPOT_TOL_RDAC5 (DPOT_REG_TOL | DPOT_RDAC5) 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun /* RDAC-to-EEPROM Interface Commands */ 152*4882a593Smuzhiyun #define DPOT_ADDR_RDAC (0x0 << 5) 153*4882a593Smuzhiyun #define DPOT_ADDR_EEPROM (0x1 << 5) 154*4882a593Smuzhiyun #define DPOT_ADDR_OTP (0x1 << 6) 155*4882a593Smuzhiyun #define DPOT_ADDR_CMD (0x1 << 7) 156*4882a593Smuzhiyun #define DPOT_ADDR_OTP_EN (0x1 << 9) 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun #define DPOT_DEC_ALL_6DB (DPOT_ADDR_CMD | (0x4 << 3)) 159*4882a593Smuzhiyun #define DPOT_INC_ALL_6DB (DPOT_ADDR_CMD | (0x9 << 3)) 160*4882a593Smuzhiyun #define DPOT_DEC_ALL (DPOT_ADDR_CMD | (0x6 << 3)) 161*4882a593Smuzhiyun #define DPOT_INC_ALL (DPOT_ADDR_CMD | (0xB << 3)) 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun #define DPOT_SPI_RDAC 0xB0 164*4882a593Smuzhiyun #define DPOT_SPI_EEPROM 0x30 165*4882a593Smuzhiyun #define DPOT_SPI_READ_RDAC 0xA0 166*4882a593Smuzhiyun #define DPOT_SPI_READ_EEPROM 0x90 167*4882a593Smuzhiyun #define DPOT_SPI_DEC_ALL_6DB 0x50 168*4882a593Smuzhiyun #define DPOT_SPI_INC_ALL_6DB 0xD0 169*4882a593Smuzhiyun #define DPOT_SPI_DEC_ALL 0x70 170*4882a593Smuzhiyun #define DPOT_SPI_INC_ALL 0xF0 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun /* AD5291/2/3 use special commands */ 173*4882a593Smuzhiyun #define DPOT_AD5291_RDAC 0x01 174*4882a593Smuzhiyun #define DPOT_AD5291_READ_RDAC 0x02 175*4882a593Smuzhiyun #define DPOT_AD5291_STORE_XTPM 0x03 176*4882a593Smuzhiyun #define DPOT_AD5291_CTRLREG 0x06 177*4882a593Smuzhiyun #define DPOT_AD5291_UNLOCK_CMD 0x03 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun /* AD5270/1/2/4 use special commands */ 180*4882a593Smuzhiyun #define DPOT_AD5270_1_2_4_RDAC 0x01 181*4882a593Smuzhiyun #define DPOT_AD5270_1_2_4_READ_RDAC 0x02 182*4882a593Smuzhiyun #define DPOT_AD5270_1_2_4_STORE_XTPM 0x03 183*4882a593Smuzhiyun #define DPOT_AD5270_1_2_4_CTRLREG 0x07 184*4882a593Smuzhiyun #define DPOT_AD5270_1_2_4_UNLOCK_CMD 0x03 185*4882a593Smuzhiyun 186*4882a593Smuzhiyun #define DPOT_AD5282_RDAC_AB 0x80 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun #define DPOT_AD5273_FUSE 0x80 189*4882a593Smuzhiyun #define DPOT_AD5170_2_3_FUSE 0x20 190*4882a593Smuzhiyun #define DPOT_AD5170_2_3_OW 0x08 191*4882a593Smuzhiyun #define DPOT_AD5172_3_A0 0x08 192*4882a593Smuzhiyun #define DPOT_AD5170_2FUSE 0x80 193*4882a593Smuzhiyun 194*4882a593Smuzhiyun struct dpot_data; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun struct ad_dpot_bus_ops { 197*4882a593Smuzhiyun int (*read_d8)(void *client); 198*4882a593Smuzhiyun int (*read_r8d8)(void *client, u8 reg); 199*4882a593Smuzhiyun int (*read_r8d16)(void *client, u8 reg); 200*4882a593Smuzhiyun int (*write_d8)(void *client, u8 val); 201*4882a593Smuzhiyun int (*write_r8d8)(void *client, u8 reg, u8 val); 202*4882a593Smuzhiyun int (*write_r8d16)(void *client, u8 reg, u16 val); 203*4882a593Smuzhiyun }; 204*4882a593Smuzhiyun 205*4882a593Smuzhiyun struct ad_dpot_bus_data { 206*4882a593Smuzhiyun void *client; 207*4882a593Smuzhiyun const struct ad_dpot_bus_ops *bops; 208*4882a593Smuzhiyun }; 209*4882a593Smuzhiyun 210*4882a593Smuzhiyun int ad_dpot_probe(struct device *dev, struct ad_dpot_bus_data *bdata, 211*4882a593Smuzhiyun unsigned long devid, const char *name); 212*4882a593Smuzhiyun int ad_dpot_remove(struct device *dev); 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun #endif 215