xref: /OK3568_Linux_fs/kernel/drivers/mfd/wm8350-gpio.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * wm8350-core.c  --  Device access for Wolfson WM8350
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Author: Liam Girdwood
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/errno.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #include <linux/mfd/wm8350/core.h>
15*4882a593Smuzhiyun #include <linux/mfd/wm8350/gpio.h>
16*4882a593Smuzhiyun #include <linux/mfd/wm8350/pmic.h>
17*4882a593Smuzhiyun 
gpio_set_dir(struct wm8350 * wm8350,int gpio,int dir)18*4882a593Smuzhiyun static int gpio_set_dir(struct wm8350 *wm8350, int gpio, int dir)
19*4882a593Smuzhiyun {
20*4882a593Smuzhiyun 	int ret;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	wm8350_reg_unlock(wm8350);
23*4882a593Smuzhiyun 	if (dir == WM8350_GPIO_DIR_OUT)
24*4882a593Smuzhiyun 		ret = wm8350_clear_bits(wm8350,
25*4882a593Smuzhiyun 					WM8350_GPIO_CONFIGURATION_I_O,
26*4882a593Smuzhiyun 					1 << gpio);
27*4882a593Smuzhiyun 	else
28*4882a593Smuzhiyun 		ret = wm8350_set_bits(wm8350,
29*4882a593Smuzhiyun 				      WM8350_GPIO_CONFIGURATION_I_O,
30*4882a593Smuzhiyun 				      1 << gpio);
31*4882a593Smuzhiyun 	wm8350_reg_lock(wm8350);
32*4882a593Smuzhiyun 	return ret;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
wm8350_gpio_set_debounce(struct wm8350 * wm8350,int gpio,int db)35*4882a593Smuzhiyun static int wm8350_gpio_set_debounce(struct wm8350 *wm8350, int gpio, int db)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun 	if (db == WM8350_GPIO_DEBOUNCE_ON)
38*4882a593Smuzhiyun 		return wm8350_set_bits(wm8350, WM8350_GPIO_DEBOUNCE,
39*4882a593Smuzhiyun 				       1 << gpio);
40*4882a593Smuzhiyun 	else
41*4882a593Smuzhiyun 		return wm8350_clear_bits(wm8350,
42*4882a593Smuzhiyun 					 WM8350_GPIO_DEBOUNCE, 1 << gpio);
43*4882a593Smuzhiyun }
44*4882a593Smuzhiyun 
gpio_set_func(struct wm8350 * wm8350,int gpio,int func)45*4882a593Smuzhiyun static int gpio_set_func(struct wm8350 *wm8350, int gpio, int func)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun 	u16 reg;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	wm8350_reg_unlock(wm8350);
50*4882a593Smuzhiyun 	switch (gpio) {
51*4882a593Smuzhiyun 	case 0:
52*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
53*4882a593Smuzhiyun 		    & ~WM8350_GP0_FN_MASK;
54*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
55*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 0));
56*4882a593Smuzhiyun 		break;
57*4882a593Smuzhiyun 	case 1:
58*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
59*4882a593Smuzhiyun 		    & ~WM8350_GP1_FN_MASK;
60*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
61*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 4));
62*4882a593Smuzhiyun 		break;
63*4882a593Smuzhiyun 	case 2:
64*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
65*4882a593Smuzhiyun 		    & ~WM8350_GP2_FN_MASK;
66*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
67*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 8));
68*4882a593Smuzhiyun 		break;
69*4882a593Smuzhiyun 	case 3:
70*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_1)
71*4882a593Smuzhiyun 		    & ~WM8350_GP3_FN_MASK;
72*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_1,
73*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 12));
74*4882a593Smuzhiyun 		break;
75*4882a593Smuzhiyun 	case 4:
76*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
77*4882a593Smuzhiyun 		    & ~WM8350_GP4_FN_MASK;
78*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
79*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 0));
80*4882a593Smuzhiyun 		break;
81*4882a593Smuzhiyun 	case 5:
82*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
83*4882a593Smuzhiyun 		    & ~WM8350_GP5_FN_MASK;
84*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
85*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 4));
86*4882a593Smuzhiyun 		break;
87*4882a593Smuzhiyun 	case 6:
88*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
89*4882a593Smuzhiyun 		    & ~WM8350_GP6_FN_MASK;
90*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
91*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 8));
92*4882a593Smuzhiyun 		break;
93*4882a593Smuzhiyun 	case 7:
94*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_2)
95*4882a593Smuzhiyun 		    & ~WM8350_GP7_FN_MASK;
96*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_2,
97*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 12));
98*4882a593Smuzhiyun 		break;
99*4882a593Smuzhiyun 	case 8:
100*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
101*4882a593Smuzhiyun 		    & ~WM8350_GP8_FN_MASK;
102*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
103*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 0));
104*4882a593Smuzhiyun 		break;
105*4882a593Smuzhiyun 	case 9:
106*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
107*4882a593Smuzhiyun 		    & ~WM8350_GP9_FN_MASK;
108*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
109*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 4));
110*4882a593Smuzhiyun 		break;
111*4882a593Smuzhiyun 	case 10:
112*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
113*4882a593Smuzhiyun 		    & ~WM8350_GP10_FN_MASK;
114*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
115*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 8));
116*4882a593Smuzhiyun 		break;
117*4882a593Smuzhiyun 	case 11:
118*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_3)
119*4882a593Smuzhiyun 		    & ~WM8350_GP11_FN_MASK;
120*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_3,
121*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 12));
122*4882a593Smuzhiyun 		break;
123*4882a593Smuzhiyun 	case 12:
124*4882a593Smuzhiyun 		reg = wm8350_reg_read(wm8350, WM8350_GPIO_FUNCTION_SELECT_4)
125*4882a593Smuzhiyun 		    & ~WM8350_GP12_FN_MASK;
126*4882a593Smuzhiyun 		wm8350_reg_write(wm8350, WM8350_GPIO_FUNCTION_SELECT_4,
127*4882a593Smuzhiyun 				 reg | ((func & 0xf) << 0));
128*4882a593Smuzhiyun 		break;
129*4882a593Smuzhiyun 	default:
130*4882a593Smuzhiyun 		wm8350_reg_lock(wm8350);
131*4882a593Smuzhiyun 		return -EINVAL;
132*4882a593Smuzhiyun 	}
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun 	wm8350_reg_lock(wm8350);
135*4882a593Smuzhiyun 	return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun 
gpio_set_pull_up(struct wm8350 * wm8350,int gpio,int up)138*4882a593Smuzhiyun static int gpio_set_pull_up(struct wm8350 *wm8350, int gpio, int up)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun 	if (up)
141*4882a593Smuzhiyun 		return wm8350_set_bits(wm8350,
142*4882a593Smuzhiyun 				       WM8350_GPIO_PIN_PULL_UP_CONTROL,
143*4882a593Smuzhiyun 				       1 << gpio);
144*4882a593Smuzhiyun 	else
145*4882a593Smuzhiyun 		return wm8350_clear_bits(wm8350,
146*4882a593Smuzhiyun 					 WM8350_GPIO_PIN_PULL_UP_CONTROL,
147*4882a593Smuzhiyun 					 1 << gpio);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
gpio_set_pull_down(struct wm8350 * wm8350,int gpio,int down)150*4882a593Smuzhiyun static int gpio_set_pull_down(struct wm8350 *wm8350, int gpio, int down)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	if (down)
153*4882a593Smuzhiyun 		return wm8350_set_bits(wm8350,
154*4882a593Smuzhiyun 				       WM8350_GPIO_PULL_DOWN_CONTROL,
155*4882a593Smuzhiyun 				       1 << gpio);
156*4882a593Smuzhiyun 	else
157*4882a593Smuzhiyun 		return wm8350_clear_bits(wm8350,
158*4882a593Smuzhiyun 					 WM8350_GPIO_PULL_DOWN_CONTROL,
159*4882a593Smuzhiyun 					 1 << gpio);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun 
gpio_set_polarity(struct wm8350 * wm8350,int gpio,int pol)162*4882a593Smuzhiyun static int gpio_set_polarity(struct wm8350 *wm8350, int gpio, int pol)
163*4882a593Smuzhiyun {
164*4882a593Smuzhiyun 	if (pol == WM8350_GPIO_ACTIVE_HIGH)
165*4882a593Smuzhiyun 		return wm8350_set_bits(wm8350,
166*4882a593Smuzhiyun 				       WM8350_GPIO_PIN_POLARITY_TYPE,
167*4882a593Smuzhiyun 				       1 << gpio);
168*4882a593Smuzhiyun 	else
169*4882a593Smuzhiyun 		return wm8350_clear_bits(wm8350,
170*4882a593Smuzhiyun 					 WM8350_GPIO_PIN_POLARITY_TYPE,
171*4882a593Smuzhiyun 					 1 << gpio);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun 
gpio_set_invert(struct wm8350 * wm8350,int gpio,int invert)174*4882a593Smuzhiyun static int gpio_set_invert(struct wm8350 *wm8350, int gpio, int invert)
175*4882a593Smuzhiyun {
176*4882a593Smuzhiyun 	if (invert == WM8350_GPIO_INVERT_ON)
177*4882a593Smuzhiyun 		return wm8350_set_bits(wm8350, WM8350_GPIO_INT_MODE, 1 << gpio);
178*4882a593Smuzhiyun 	else
179*4882a593Smuzhiyun 		return wm8350_clear_bits(wm8350,
180*4882a593Smuzhiyun 					 WM8350_GPIO_INT_MODE, 1 << gpio);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
wm8350_gpio_config(struct wm8350 * wm8350,int gpio,int dir,int func,int pol,int pull,int invert,int debounce)183*4882a593Smuzhiyun int wm8350_gpio_config(struct wm8350 *wm8350, int gpio, int dir, int func,
184*4882a593Smuzhiyun 		       int pol, int pull, int invert, int debounce)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	/* make sure we never pull up and down at the same time */
187*4882a593Smuzhiyun 	if (pull == WM8350_GPIO_PULL_NONE) {
188*4882a593Smuzhiyun 		if (gpio_set_pull_up(wm8350, gpio, 0))
189*4882a593Smuzhiyun 			goto err;
190*4882a593Smuzhiyun 		if (gpio_set_pull_down(wm8350, gpio, 0))
191*4882a593Smuzhiyun 			goto err;
192*4882a593Smuzhiyun 	} else if (pull == WM8350_GPIO_PULL_UP) {
193*4882a593Smuzhiyun 		if (gpio_set_pull_down(wm8350, gpio, 0))
194*4882a593Smuzhiyun 			goto err;
195*4882a593Smuzhiyun 		if (gpio_set_pull_up(wm8350, gpio, 1))
196*4882a593Smuzhiyun 			goto err;
197*4882a593Smuzhiyun 	} else if (pull == WM8350_GPIO_PULL_DOWN) {
198*4882a593Smuzhiyun 		if (gpio_set_pull_up(wm8350, gpio, 0))
199*4882a593Smuzhiyun 			goto err;
200*4882a593Smuzhiyun 		if (gpio_set_pull_down(wm8350, gpio, 1))
201*4882a593Smuzhiyun 			goto err;
202*4882a593Smuzhiyun 	}
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	if (gpio_set_invert(wm8350, gpio, invert))
205*4882a593Smuzhiyun 		goto err;
206*4882a593Smuzhiyun 	if (gpio_set_polarity(wm8350, gpio, pol))
207*4882a593Smuzhiyun 		goto err;
208*4882a593Smuzhiyun 	if (wm8350_gpio_set_debounce(wm8350, gpio, debounce))
209*4882a593Smuzhiyun 		goto err;
210*4882a593Smuzhiyun 	if (gpio_set_dir(wm8350, gpio, dir))
211*4882a593Smuzhiyun 		goto err;
212*4882a593Smuzhiyun 	return gpio_set_func(wm8350, gpio, func);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun err:
215*4882a593Smuzhiyun 	return -EIO;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm8350_gpio_config);
218