1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * wm831x-core.c -- Device access for Wolfson WM831x PMICs
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2009 Wolfson Microelectronics PLC.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/export.h>
13*4882a593Smuzhiyun #include <linux/bcd.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/mfd/core.h>
16*4882a593Smuzhiyun #include <linux/slab.h>
17*4882a593Smuzhiyun #include <linux/err.h>
18*4882a593Smuzhiyun #include <linux/of.h>
19*4882a593Smuzhiyun #include <linux/of_device.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/mfd/wm831x/core.h>
22*4882a593Smuzhiyun #include <linux/mfd/wm831x/pdata.h>
23*4882a593Smuzhiyun #include <linux/mfd/wm831x/irq.h>
24*4882a593Smuzhiyun #include <linux/mfd/wm831x/auxadc.h>
25*4882a593Smuzhiyun #include <linux/mfd/wm831x/otp.h>
26*4882a593Smuzhiyun #include <linux/mfd/wm831x/pmu.h>
27*4882a593Smuzhiyun #include <linux/mfd/wm831x/regulator.h>
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* Current settings - values are 2*2^(reg_val/4) microamps. These are
30*4882a593Smuzhiyun * exported since they are used by multiple drivers.
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun const unsigned int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL + 1] = {
33*4882a593Smuzhiyun 2,
34*4882a593Smuzhiyun 2,
35*4882a593Smuzhiyun 3,
36*4882a593Smuzhiyun 3,
37*4882a593Smuzhiyun 4,
38*4882a593Smuzhiyun 5,
39*4882a593Smuzhiyun 6,
40*4882a593Smuzhiyun 7,
41*4882a593Smuzhiyun 8,
42*4882a593Smuzhiyun 10,
43*4882a593Smuzhiyun 11,
44*4882a593Smuzhiyun 13,
45*4882a593Smuzhiyun 16,
46*4882a593Smuzhiyun 19,
47*4882a593Smuzhiyun 23,
48*4882a593Smuzhiyun 27,
49*4882a593Smuzhiyun 32,
50*4882a593Smuzhiyun 38,
51*4882a593Smuzhiyun 45,
52*4882a593Smuzhiyun 54,
53*4882a593Smuzhiyun 64,
54*4882a593Smuzhiyun 76,
55*4882a593Smuzhiyun 91,
56*4882a593Smuzhiyun 108,
57*4882a593Smuzhiyun 128,
58*4882a593Smuzhiyun 152,
59*4882a593Smuzhiyun 181,
60*4882a593Smuzhiyun 215,
61*4882a593Smuzhiyun 256,
62*4882a593Smuzhiyun 304,
63*4882a593Smuzhiyun 362,
64*4882a593Smuzhiyun 431,
65*4882a593Smuzhiyun 512,
66*4882a593Smuzhiyun 609,
67*4882a593Smuzhiyun 724,
68*4882a593Smuzhiyun 861,
69*4882a593Smuzhiyun 1024,
70*4882a593Smuzhiyun 1218,
71*4882a593Smuzhiyun 1448,
72*4882a593Smuzhiyun 1722,
73*4882a593Smuzhiyun 2048,
74*4882a593Smuzhiyun 2435,
75*4882a593Smuzhiyun 2896,
76*4882a593Smuzhiyun 3444,
77*4882a593Smuzhiyun 4096,
78*4882a593Smuzhiyun 4871,
79*4882a593Smuzhiyun 5793,
80*4882a593Smuzhiyun 6889,
81*4882a593Smuzhiyun 8192,
82*4882a593Smuzhiyun 9742,
83*4882a593Smuzhiyun 11585,
84*4882a593Smuzhiyun 13777,
85*4882a593Smuzhiyun 16384,
86*4882a593Smuzhiyun 19484,
87*4882a593Smuzhiyun 23170,
88*4882a593Smuzhiyun 27554,
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
91*4882a593Smuzhiyun
wm831x_reg_locked(struct wm831x * wm831x,unsigned short reg)92*4882a593Smuzhiyun static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun if (!wm831x->locked)
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun switch (reg) {
98*4882a593Smuzhiyun case WM831X_WATCHDOG:
99*4882a593Smuzhiyun case WM831X_DC4_CONTROL:
100*4882a593Smuzhiyun case WM831X_ON_PIN_CONTROL:
101*4882a593Smuzhiyun case WM831X_BACKUP_CHARGER_CONTROL:
102*4882a593Smuzhiyun case WM831X_CHARGER_CONTROL_1:
103*4882a593Smuzhiyun case WM831X_CHARGER_CONTROL_2:
104*4882a593Smuzhiyun return 1;
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun default:
107*4882a593Smuzhiyun return 0;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun /**
112*4882a593Smuzhiyun * wm831x_reg_unlock: Unlock user keyed registers
113*4882a593Smuzhiyun *
114*4882a593Smuzhiyun * The WM831x has a user key preventing writes to particularly
115*4882a593Smuzhiyun * critical registers. This function locks those registers,
116*4882a593Smuzhiyun * allowing writes to them.
117*4882a593Smuzhiyun *
118*4882a593Smuzhiyun * @wm831x: pointer to local driver data structure
119*4882a593Smuzhiyun */
wm831x_reg_lock(struct wm831x * wm831x)120*4882a593Smuzhiyun void wm831x_reg_lock(struct wm831x *wm831x)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun int ret;
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
125*4882a593Smuzhiyun if (ret == 0) {
126*4882a593Smuzhiyun dev_vdbg(wm831x->dev, "Registers locked\n");
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun mutex_lock(&wm831x->io_lock);
129*4882a593Smuzhiyun WARN_ON(wm831x->locked);
130*4882a593Smuzhiyun wm831x->locked = 1;
131*4882a593Smuzhiyun mutex_unlock(&wm831x->io_lock);
132*4882a593Smuzhiyun } else {
133*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_reg_lock);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /**
140*4882a593Smuzhiyun * wm831x_reg_unlock: Unlock user keyed registers
141*4882a593Smuzhiyun *
142*4882a593Smuzhiyun * The WM831x has a user key preventing writes to particularly
143*4882a593Smuzhiyun * critical registers. This function locks those registers,
144*4882a593Smuzhiyun * preventing spurious writes.
145*4882a593Smuzhiyun *
146*4882a593Smuzhiyun * @wm831x: pointer to local driver data structure
147*4882a593Smuzhiyun */
wm831x_reg_unlock(struct wm831x * wm831x)148*4882a593Smuzhiyun int wm831x_reg_unlock(struct wm831x *wm831x)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun int ret;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* 0x9716 is the value required to unlock the registers */
153*4882a593Smuzhiyun ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
154*4882a593Smuzhiyun if (ret == 0) {
155*4882a593Smuzhiyun dev_vdbg(wm831x->dev, "Registers unlocked\n");
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun mutex_lock(&wm831x->io_lock);
158*4882a593Smuzhiyun WARN_ON(!wm831x->locked);
159*4882a593Smuzhiyun wm831x->locked = 0;
160*4882a593Smuzhiyun mutex_unlock(&wm831x->io_lock);
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun return ret;
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
166*4882a593Smuzhiyun
wm831x_reg_readable(struct device * dev,unsigned int reg)167*4882a593Smuzhiyun static bool wm831x_reg_readable(struct device *dev, unsigned int reg)
168*4882a593Smuzhiyun {
169*4882a593Smuzhiyun switch (reg) {
170*4882a593Smuzhiyun case WM831X_RESET_ID:
171*4882a593Smuzhiyun case WM831X_REVISION:
172*4882a593Smuzhiyun case WM831X_PARENT_ID:
173*4882a593Smuzhiyun case WM831X_SYSVDD_CONTROL:
174*4882a593Smuzhiyun case WM831X_THERMAL_MONITORING:
175*4882a593Smuzhiyun case WM831X_POWER_STATE:
176*4882a593Smuzhiyun case WM831X_WATCHDOG:
177*4882a593Smuzhiyun case WM831X_ON_PIN_CONTROL:
178*4882a593Smuzhiyun case WM831X_RESET_CONTROL:
179*4882a593Smuzhiyun case WM831X_CONTROL_INTERFACE:
180*4882a593Smuzhiyun case WM831X_SECURITY_KEY:
181*4882a593Smuzhiyun case WM831X_SOFTWARE_SCRATCH:
182*4882a593Smuzhiyun case WM831X_OTP_CONTROL:
183*4882a593Smuzhiyun case WM831X_GPIO_LEVEL:
184*4882a593Smuzhiyun case WM831X_SYSTEM_STATUS:
185*4882a593Smuzhiyun case WM831X_ON_SOURCE:
186*4882a593Smuzhiyun case WM831X_OFF_SOURCE:
187*4882a593Smuzhiyun case WM831X_SYSTEM_INTERRUPTS:
188*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_1:
189*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_2:
190*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_3:
191*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_4:
192*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_5:
193*4882a593Smuzhiyun case WM831X_IRQ_CONFIG:
194*4882a593Smuzhiyun case WM831X_SYSTEM_INTERRUPTS_MASK:
195*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_1_MASK:
196*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_2_MASK:
197*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_3_MASK:
198*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_4_MASK:
199*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_5_MASK:
200*4882a593Smuzhiyun case WM831X_RTC_WRITE_COUNTER:
201*4882a593Smuzhiyun case WM831X_RTC_TIME_1:
202*4882a593Smuzhiyun case WM831X_RTC_TIME_2:
203*4882a593Smuzhiyun case WM831X_RTC_ALARM_1:
204*4882a593Smuzhiyun case WM831X_RTC_ALARM_2:
205*4882a593Smuzhiyun case WM831X_RTC_CONTROL:
206*4882a593Smuzhiyun case WM831X_RTC_TRIM:
207*4882a593Smuzhiyun case WM831X_TOUCH_CONTROL_1:
208*4882a593Smuzhiyun case WM831X_TOUCH_CONTROL_2:
209*4882a593Smuzhiyun case WM831X_TOUCH_DATA_X:
210*4882a593Smuzhiyun case WM831X_TOUCH_DATA_Y:
211*4882a593Smuzhiyun case WM831X_TOUCH_DATA_Z:
212*4882a593Smuzhiyun case WM831X_AUXADC_DATA:
213*4882a593Smuzhiyun case WM831X_AUXADC_CONTROL:
214*4882a593Smuzhiyun case WM831X_AUXADC_SOURCE:
215*4882a593Smuzhiyun case WM831X_COMPARATOR_CONTROL:
216*4882a593Smuzhiyun case WM831X_COMPARATOR_1:
217*4882a593Smuzhiyun case WM831X_COMPARATOR_2:
218*4882a593Smuzhiyun case WM831X_COMPARATOR_3:
219*4882a593Smuzhiyun case WM831X_COMPARATOR_4:
220*4882a593Smuzhiyun case WM831X_GPIO1_CONTROL:
221*4882a593Smuzhiyun case WM831X_GPIO2_CONTROL:
222*4882a593Smuzhiyun case WM831X_GPIO3_CONTROL:
223*4882a593Smuzhiyun case WM831X_GPIO4_CONTROL:
224*4882a593Smuzhiyun case WM831X_GPIO5_CONTROL:
225*4882a593Smuzhiyun case WM831X_GPIO6_CONTROL:
226*4882a593Smuzhiyun case WM831X_GPIO7_CONTROL:
227*4882a593Smuzhiyun case WM831X_GPIO8_CONTROL:
228*4882a593Smuzhiyun case WM831X_GPIO9_CONTROL:
229*4882a593Smuzhiyun case WM831X_GPIO10_CONTROL:
230*4882a593Smuzhiyun case WM831X_GPIO11_CONTROL:
231*4882a593Smuzhiyun case WM831X_GPIO12_CONTROL:
232*4882a593Smuzhiyun case WM831X_GPIO13_CONTROL:
233*4882a593Smuzhiyun case WM831X_GPIO14_CONTROL:
234*4882a593Smuzhiyun case WM831X_GPIO15_CONTROL:
235*4882a593Smuzhiyun case WM831X_GPIO16_CONTROL:
236*4882a593Smuzhiyun case WM831X_CHARGER_CONTROL_1:
237*4882a593Smuzhiyun case WM831X_CHARGER_CONTROL_2:
238*4882a593Smuzhiyun case WM831X_CHARGER_STATUS:
239*4882a593Smuzhiyun case WM831X_BACKUP_CHARGER_CONTROL:
240*4882a593Smuzhiyun case WM831X_STATUS_LED_1:
241*4882a593Smuzhiyun case WM831X_STATUS_LED_2:
242*4882a593Smuzhiyun case WM831X_CURRENT_SINK_1:
243*4882a593Smuzhiyun case WM831X_CURRENT_SINK_2:
244*4882a593Smuzhiyun case WM831X_DCDC_ENABLE:
245*4882a593Smuzhiyun case WM831X_LDO_ENABLE:
246*4882a593Smuzhiyun case WM831X_DCDC_STATUS:
247*4882a593Smuzhiyun case WM831X_LDO_STATUS:
248*4882a593Smuzhiyun case WM831X_DCDC_UV_STATUS:
249*4882a593Smuzhiyun case WM831X_LDO_UV_STATUS:
250*4882a593Smuzhiyun case WM831X_DC1_CONTROL_1:
251*4882a593Smuzhiyun case WM831X_DC1_CONTROL_2:
252*4882a593Smuzhiyun case WM831X_DC1_ON_CONFIG:
253*4882a593Smuzhiyun case WM831X_DC1_SLEEP_CONTROL:
254*4882a593Smuzhiyun case WM831X_DC1_DVS_CONTROL:
255*4882a593Smuzhiyun case WM831X_DC2_CONTROL_1:
256*4882a593Smuzhiyun case WM831X_DC2_CONTROL_2:
257*4882a593Smuzhiyun case WM831X_DC2_ON_CONFIG:
258*4882a593Smuzhiyun case WM831X_DC2_SLEEP_CONTROL:
259*4882a593Smuzhiyun case WM831X_DC2_DVS_CONTROL:
260*4882a593Smuzhiyun case WM831X_DC3_CONTROL_1:
261*4882a593Smuzhiyun case WM831X_DC3_CONTROL_2:
262*4882a593Smuzhiyun case WM831X_DC3_ON_CONFIG:
263*4882a593Smuzhiyun case WM831X_DC3_SLEEP_CONTROL:
264*4882a593Smuzhiyun case WM831X_DC4_CONTROL:
265*4882a593Smuzhiyun case WM831X_DC4_SLEEP_CONTROL:
266*4882a593Smuzhiyun case WM831X_EPE1_CONTROL:
267*4882a593Smuzhiyun case WM831X_EPE2_CONTROL:
268*4882a593Smuzhiyun case WM831X_LDO1_CONTROL:
269*4882a593Smuzhiyun case WM831X_LDO1_ON_CONTROL:
270*4882a593Smuzhiyun case WM831X_LDO1_SLEEP_CONTROL:
271*4882a593Smuzhiyun case WM831X_LDO2_CONTROL:
272*4882a593Smuzhiyun case WM831X_LDO2_ON_CONTROL:
273*4882a593Smuzhiyun case WM831X_LDO2_SLEEP_CONTROL:
274*4882a593Smuzhiyun case WM831X_LDO3_CONTROL:
275*4882a593Smuzhiyun case WM831X_LDO3_ON_CONTROL:
276*4882a593Smuzhiyun case WM831X_LDO3_SLEEP_CONTROL:
277*4882a593Smuzhiyun case WM831X_LDO4_CONTROL:
278*4882a593Smuzhiyun case WM831X_LDO4_ON_CONTROL:
279*4882a593Smuzhiyun case WM831X_LDO4_SLEEP_CONTROL:
280*4882a593Smuzhiyun case WM831X_LDO5_CONTROL:
281*4882a593Smuzhiyun case WM831X_LDO5_ON_CONTROL:
282*4882a593Smuzhiyun case WM831X_LDO5_SLEEP_CONTROL:
283*4882a593Smuzhiyun case WM831X_LDO6_CONTROL:
284*4882a593Smuzhiyun case WM831X_LDO6_ON_CONTROL:
285*4882a593Smuzhiyun case WM831X_LDO6_SLEEP_CONTROL:
286*4882a593Smuzhiyun case WM831X_LDO7_CONTROL:
287*4882a593Smuzhiyun case WM831X_LDO7_ON_CONTROL:
288*4882a593Smuzhiyun case WM831X_LDO7_SLEEP_CONTROL:
289*4882a593Smuzhiyun case WM831X_LDO8_CONTROL:
290*4882a593Smuzhiyun case WM831X_LDO8_ON_CONTROL:
291*4882a593Smuzhiyun case WM831X_LDO8_SLEEP_CONTROL:
292*4882a593Smuzhiyun case WM831X_LDO9_CONTROL:
293*4882a593Smuzhiyun case WM831X_LDO9_ON_CONTROL:
294*4882a593Smuzhiyun case WM831X_LDO9_SLEEP_CONTROL:
295*4882a593Smuzhiyun case WM831X_LDO10_CONTROL:
296*4882a593Smuzhiyun case WM831X_LDO10_ON_CONTROL:
297*4882a593Smuzhiyun case WM831X_LDO10_SLEEP_CONTROL:
298*4882a593Smuzhiyun case WM831X_LDO11_ON_CONTROL:
299*4882a593Smuzhiyun case WM831X_LDO11_SLEEP_CONTROL:
300*4882a593Smuzhiyun case WM831X_POWER_GOOD_SOURCE_1:
301*4882a593Smuzhiyun case WM831X_POWER_GOOD_SOURCE_2:
302*4882a593Smuzhiyun case WM831X_CLOCK_CONTROL_1:
303*4882a593Smuzhiyun case WM831X_CLOCK_CONTROL_2:
304*4882a593Smuzhiyun case WM831X_FLL_CONTROL_1:
305*4882a593Smuzhiyun case WM831X_FLL_CONTROL_2:
306*4882a593Smuzhiyun case WM831X_FLL_CONTROL_3:
307*4882a593Smuzhiyun case WM831X_FLL_CONTROL_4:
308*4882a593Smuzhiyun case WM831X_FLL_CONTROL_5:
309*4882a593Smuzhiyun case WM831X_UNIQUE_ID_1:
310*4882a593Smuzhiyun case WM831X_UNIQUE_ID_2:
311*4882a593Smuzhiyun case WM831X_UNIQUE_ID_3:
312*4882a593Smuzhiyun case WM831X_UNIQUE_ID_4:
313*4882a593Smuzhiyun case WM831X_UNIQUE_ID_5:
314*4882a593Smuzhiyun case WM831X_UNIQUE_ID_6:
315*4882a593Smuzhiyun case WM831X_UNIQUE_ID_7:
316*4882a593Smuzhiyun case WM831X_UNIQUE_ID_8:
317*4882a593Smuzhiyun case WM831X_FACTORY_OTP_ID:
318*4882a593Smuzhiyun case WM831X_FACTORY_OTP_1:
319*4882a593Smuzhiyun case WM831X_FACTORY_OTP_2:
320*4882a593Smuzhiyun case WM831X_FACTORY_OTP_3:
321*4882a593Smuzhiyun case WM831X_FACTORY_OTP_4:
322*4882a593Smuzhiyun case WM831X_FACTORY_OTP_5:
323*4882a593Smuzhiyun case WM831X_CUSTOMER_OTP_ID:
324*4882a593Smuzhiyun case WM831X_DC1_OTP_CONTROL:
325*4882a593Smuzhiyun case WM831X_DC2_OTP_CONTROL:
326*4882a593Smuzhiyun case WM831X_DC3_OTP_CONTROL:
327*4882a593Smuzhiyun case WM831X_LDO1_2_OTP_CONTROL:
328*4882a593Smuzhiyun case WM831X_LDO3_4_OTP_CONTROL:
329*4882a593Smuzhiyun case WM831X_LDO5_6_OTP_CONTROL:
330*4882a593Smuzhiyun case WM831X_LDO7_8_OTP_CONTROL:
331*4882a593Smuzhiyun case WM831X_LDO9_10_OTP_CONTROL:
332*4882a593Smuzhiyun case WM831X_LDO11_EPE_CONTROL:
333*4882a593Smuzhiyun case WM831X_GPIO1_OTP_CONTROL:
334*4882a593Smuzhiyun case WM831X_GPIO2_OTP_CONTROL:
335*4882a593Smuzhiyun case WM831X_GPIO3_OTP_CONTROL:
336*4882a593Smuzhiyun case WM831X_GPIO4_OTP_CONTROL:
337*4882a593Smuzhiyun case WM831X_GPIO5_OTP_CONTROL:
338*4882a593Smuzhiyun case WM831X_GPIO6_OTP_CONTROL:
339*4882a593Smuzhiyun case WM831X_DBE_CHECK_DATA:
340*4882a593Smuzhiyun return true;
341*4882a593Smuzhiyun default:
342*4882a593Smuzhiyun return false;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
wm831x_reg_writeable(struct device * dev,unsigned int reg)346*4882a593Smuzhiyun static bool wm831x_reg_writeable(struct device *dev, unsigned int reg)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct wm831x *wm831x = dev_get_drvdata(dev);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun if (wm831x_reg_locked(wm831x, reg))
351*4882a593Smuzhiyun return false;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun switch (reg) {
354*4882a593Smuzhiyun case WM831X_SYSVDD_CONTROL:
355*4882a593Smuzhiyun case WM831X_THERMAL_MONITORING:
356*4882a593Smuzhiyun case WM831X_POWER_STATE:
357*4882a593Smuzhiyun case WM831X_WATCHDOG:
358*4882a593Smuzhiyun case WM831X_ON_PIN_CONTROL:
359*4882a593Smuzhiyun case WM831X_RESET_CONTROL:
360*4882a593Smuzhiyun case WM831X_CONTROL_INTERFACE:
361*4882a593Smuzhiyun case WM831X_SECURITY_KEY:
362*4882a593Smuzhiyun case WM831X_SOFTWARE_SCRATCH:
363*4882a593Smuzhiyun case WM831X_OTP_CONTROL:
364*4882a593Smuzhiyun case WM831X_GPIO_LEVEL:
365*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_1:
366*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_2:
367*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_3:
368*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_4:
369*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_5:
370*4882a593Smuzhiyun case WM831X_IRQ_CONFIG:
371*4882a593Smuzhiyun case WM831X_SYSTEM_INTERRUPTS_MASK:
372*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_1_MASK:
373*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_2_MASK:
374*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_3_MASK:
375*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_4_MASK:
376*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_5_MASK:
377*4882a593Smuzhiyun case WM831X_RTC_TIME_1:
378*4882a593Smuzhiyun case WM831X_RTC_TIME_2:
379*4882a593Smuzhiyun case WM831X_RTC_ALARM_1:
380*4882a593Smuzhiyun case WM831X_RTC_ALARM_2:
381*4882a593Smuzhiyun case WM831X_RTC_CONTROL:
382*4882a593Smuzhiyun case WM831X_RTC_TRIM:
383*4882a593Smuzhiyun case WM831X_TOUCH_CONTROL_1:
384*4882a593Smuzhiyun case WM831X_TOUCH_CONTROL_2:
385*4882a593Smuzhiyun case WM831X_AUXADC_CONTROL:
386*4882a593Smuzhiyun case WM831X_AUXADC_SOURCE:
387*4882a593Smuzhiyun case WM831X_COMPARATOR_CONTROL:
388*4882a593Smuzhiyun case WM831X_COMPARATOR_1:
389*4882a593Smuzhiyun case WM831X_COMPARATOR_2:
390*4882a593Smuzhiyun case WM831X_COMPARATOR_3:
391*4882a593Smuzhiyun case WM831X_COMPARATOR_4:
392*4882a593Smuzhiyun case WM831X_GPIO1_CONTROL:
393*4882a593Smuzhiyun case WM831X_GPIO2_CONTROL:
394*4882a593Smuzhiyun case WM831X_GPIO3_CONTROL:
395*4882a593Smuzhiyun case WM831X_GPIO4_CONTROL:
396*4882a593Smuzhiyun case WM831X_GPIO5_CONTROL:
397*4882a593Smuzhiyun case WM831X_GPIO6_CONTROL:
398*4882a593Smuzhiyun case WM831X_GPIO7_CONTROL:
399*4882a593Smuzhiyun case WM831X_GPIO8_CONTROL:
400*4882a593Smuzhiyun case WM831X_GPIO9_CONTROL:
401*4882a593Smuzhiyun case WM831X_GPIO10_CONTROL:
402*4882a593Smuzhiyun case WM831X_GPIO11_CONTROL:
403*4882a593Smuzhiyun case WM831X_GPIO12_CONTROL:
404*4882a593Smuzhiyun case WM831X_GPIO13_CONTROL:
405*4882a593Smuzhiyun case WM831X_GPIO14_CONTROL:
406*4882a593Smuzhiyun case WM831X_GPIO15_CONTROL:
407*4882a593Smuzhiyun case WM831X_GPIO16_CONTROL:
408*4882a593Smuzhiyun case WM831X_CHARGER_CONTROL_1:
409*4882a593Smuzhiyun case WM831X_CHARGER_CONTROL_2:
410*4882a593Smuzhiyun case WM831X_CHARGER_STATUS:
411*4882a593Smuzhiyun case WM831X_BACKUP_CHARGER_CONTROL:
412*4882a593Smuzhiyun case WM831X_STATUS_LED_1:
413*4882a593Smuzhiyun case WM831X_STATUS_LED_2:
414*4882a593Smuzhiyun case WM831X_CURRENT_SINK_1:
415*4882a593Smuzhiyun case WM831X_CURRENT_SINK_2:
416*4882a593Smuzhiyun case WM831X_DCDC_ENABLE:
417*4882a593Smuzhiyun case WM831X_LDO_ENABLE:
418*4882a593Smuzhiyun case WM831X_DC1_CONTROL_1:
419*4882a593Smuzhiyun case WM831X_DC1_CONTROL_2:
420*4882a593Smuzhiyun case WM831X_DC1_ON_CONFIG:
421*4882a593Smuzhiyun case WM831X_DC1_SLEEP_CONTROL:
422*4882a593Smuzhiyun case WM831X_DC1_DVS_CONTROL:
423*4882a593Smuzhiyun case WM831X_DC2_CONTROL_1:
424*4882a593Smuzhiyun case WM831X_DC2_CONTROL_2:
425*4882a593Smuzhiyun case WM831X_DC2_ON_CONFIG:
426*4882a593Smuzhiyun case WM831X_DC2_SLEEP_CONTROL:
427*4882a593Smuzhiyun case WM831X_DC2_DVS_CONTROL:
428*4882a593Smuzhiyun case WM831X_DC3_CONTROL_1:
429*4882a593Smuzhiyun case WM831X_DC3_CONTROL_2:
430*4882a593Smuzhiyun case WM831X_DC3_ON_CONFIG:
431*4882a593Smuzhiyun case WM831X_DC3_SLEEP_CONTROL:
432*4882a593Smuzhiyun case WM831X_DC4_CONTROL:
433*4882a593Smuzhiyun case WM831X_DC4_SLEEP_CONTROL:
434*4882a593Smuzhiyun case WM831X_EPE1_CONTROL:
435*4882a593Smuzhiyun case WM831X_EPE2_CONTROL:
436*4882a593Smuzhiyun case WM831X_LDO1_CONTROL:
437*4882a593Smuzhiyun case WM831X_LDO1_ON_CONTROL:
438*4882a593Smuzhiyun case WM831X_LDO1_SLEEP_CONTROL:
439*4882a593Smuzhiyun case WM831X_LDO2_CONTROL:
440*4882a593Smuzhiyun case WM831X_LDO2_ON_CONTROL:
441*4882a593Smuzhiyun case WM831X_LDO2_SLEEP_CONTROL:
442*4882a593Smuzhiyun case WM831X_LDO3_CONTROL:
443*4882a593Smuzhiyun case WM831X_LDO3_ON_CONTROL:
444*4882a593Smuzhiyun case WM831X_LDO3_SLEEP_CONTROL:
445*4882a593Smuzhiyun case WM831X_LDO4_CONTROL:
446*4882a593Smuzhiyun case WM831X_LDO4_ON_CONTROL:
447*4882a593Smuzhiyun case WM831X_LDO4_SLEEP_CONTROL:
448*4882a593Smuzhiyun case WM831X_LDO5_CONTROL:
449*4882a593Smuzhiyun case WM831X_LDO5_ON_CONTROL:
450*4882a593Smuzhiyun case WM831X_LDO5_SLEEP_CONTROL:
451*4882a593Smuzhiyun case WM831X_LDO6_CONTROL:
452*4882a593Smuzhiyun case WM831X_LDO6_ON_CONTROL:
453*4882a593Smuzhiyun case WM831X_LDO6_SLEEP_CONTROL:
454*4882a593Smuzhiyun case WM831X_LDO7_CONTROL:
455*4882a593Smuzhiyun case WM831X_LDO7_ON_CONTROL:
456*4882a593Smuzhiyun case WM831X_LDO7_SLEEP_CONTROL:
457*4882a593Smuzhiyun case WM831X_LDO8_CONTROL:
458*4882a593Smuzhiyun case WM831X_LDO8_ON_CONTROL:
459*4882a593Smuzhiyun case WM831X_LDO8_SLEEP_CONTROL:
460*4882a593Smuzhiyun case WM831X_LDO9_CONTROL:
461*4882a593Smuzhiyun case WM831X_LDO9_ON_CONTROL:
462*4882a593Smuzhiyun case WM831X_LDO9_SLEEP_CONTROL:
463*4882a593Smuzhiyun case WM831X_LDO10_CONTROL:
464*4882a593Smuzhiyun case WM831X_LDO10_ON_CONTROL:
465*4882a593Smuzhiyun case WM831X_LDO10_SLEEP_CONTROL:
466*4882a593Smuzhiyun case WM831X_LDO11_ON_CONTROL:
467*4882a593Smuzhiyun case WM831X_LDO11_SLEEP_CONTROL:
468*4882a593Smuzhiyun case WM831X_POWER_GOOD_SOURCE_1:
469*4882a593Smuzhiyun case WM831X_POWER_GOOD_SOURCE_2:
470*4882a593Smuzhiyun case WM831X_CLOCK_CONTROL_1:
471*4882a593Smuzhiyun case WM831X_CLOCK_CONTROL_2:
472*4882a593Smuzhiyun case WM831X_FLL_CONTROL_1:
473*4882a593Smuzhiyun case WM831X_FLL_CONTROL_2:
474*4882a593Smuzhiyun case WM831X_FLL_CONTROL_3:
475*4882a593Smuzhiyun case WM831X_FLL_CONTROL_4:
476*4882a593Smuzhiyun case WM831X_FLL_CONTROL_5:
477*4882a593Smuzhiyun return true;
478*4882a593Smuzhiyun default:
479*4882a593Smuzhiyun return false;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun }
482*4882a593Smuzhiyun
wm831x_reg_volatile(struct device * dev,unsigned int reg)483*4882a593Smuzhiyun static bool wm831x_reg_volatile(struct device *dev, unsigned int reg)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun switch (reg) {
486*4882a593Smuzhiyun case WM831X_SYSTEM_STATUS:
487*4882a593Smuzhiyun case WM831X_ON_SOURCE:
488*4882a593Smuzhiyun case WM831X_OFF_SOURCE:
489*4882a593Smuzhiyun case WM831X_GPIO_LEVEL:
490*4882a593Smuzhiyun case WM831X_SYSTEM_INTERRUPTS:
491*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_1:
492*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_2:
493*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_3:
494*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_4:
495*4882a593Smuzhiyun case WM831X_INTERRUPT_STATUS_5:
496*4882a593Smuzhiyun case WM831X_RTC_TIME_1:
497*4882a593Smuzhiyun case WM831X_RTC_TIME_2:
498*4882a593Smuzhiyun case WM831X_TOUCH_DATA_X:
499*4882a593Smuzhiyun case WM831X_TOUCH_DATA_Y:
500*4882a593Smuzhiyun case WM831X_TOUCH_DATA_Z:
501*4882a593Smuzhiyun case WM831X_AUXADC_DATA:
502*4882a593Smuzhiyun case WM831X_CHARGER_STATUS:
503*4882a593Smuzhiyun case WM831X_DCDC_STATUS:
504*4882a593Smuzhiyun case WM831X_LDO_STATUS:
505*4882a593Smuzhiyun case WM831X_DCDC_UV_STATUS:
506*4882a593Smuzhiyun case WM831X_LDO_UV_STATUS:
507*4882a593Smuzhiyun return true;
508*4882a593Smuzhiyun default:
509*4882a593Smuzhiyun return false;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun /**
514*4882a593Smuzhiyun * wm831x_reg_read: Read a single WM831x register.
515*4882a593Smuzhiyun *
516*4882a593Smuzhiyun * @wm831x: Device to read from.
517*4882a593Smuzhiyun * @reg: Register to read.
518*4882a593Smuzhiyun */
wm831x_reg_read(struct wm831x * wm831x,unsigned short reg)519*4882a593Smuzhiyun int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
520*4882a593Smuzhiyun {
521*4882a593Smuzhiyun unsigned int val;
522*4882a593Smuzhiyun int ret;
523*4882a593Smuzhiyun
524*4882a593Smuzhiyun ret = regmap_read(wm831x->regmap, reg, &val);
525*4882a593Smuzhiyun
526*4882a593Smuzhiyun if (ret < 0)
527*4882a593Smuzhiyun return ret;
528*4882a593Smuzhiyun else
529*4882a593Smuzhiyun return val;
530*4882a593Smuzhiyun }
531*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_reg_read);
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun /**
534*4882a593Smuzhiyun * wm831x_bulk_read: Read multiple WM831x registers
535*4882a593Smuzhiyun *
536*4882a593Smuzhiyun * @wm831x: Device to read from
537*4882a593Smuzhiyun * @reg: First register
538*4882a593Smuzhiyun * @count: Number of registers
539*4882a593Smuzhiyun * @buf: Buffer to fill.
540*4882a593Smuzhiyun */
wm831x_bulk_read(struct wm831x * wm831x,unsigned short reg,int count,u16 * buf)541*4882a593Smuzhiyun int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
542*4882a593Smuzhiyun int count, u16 *buf)
543*4882a593Smuzhiyun {
544*4882a593Smuzhiyun return regmap_bulk_read(wm831x->regmap, reg, buf, count);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_bulk_read);
547*4882a593Smuzhiyun
wm831x_write(struct wm831x * wm831x,unsigned short reg,int bytes,void * src)548*4882a593Smuzhiyun static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
549*4882a593Smuzhiyun int bytes, void *src)
550*4882a593Smuzhiyun {
551*4882a593Smuzhiyun u16 *buf = src;
552*4882a593Smuzhiyun int i, ret;
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun BUG_ON(bytes % 2);
555*4882a593Smuzhiyun BUG_ON(bytes <= 0);
556*4882a593Smuzhiyun
557*4882a593Smuzhiyun for (i = 0; i < bytes / 2; i++) {
558*4882a593Smuzhiyun if (wm831x_reg_locked(wm831x, reg))
559*4882a593Smuzhiyun return -EPERM;
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
562*4882a593Smuzhiyun buf[i], reg + i, reg + i);
563*4882a593Smuzhiyun ret = regmap_write(wm831x->regmap, reg + i, buf[i]);
564*4882a593Smuzhiyun if (ret != 0)
565*4882a593Smuzhiyun return ret;
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun return 0;
569*4882a593Smuzhiyun }
570*4882a593Smuzhiyun
571*4882a593Smuzhiyun /**
572*4882a593Smuzhiyun * wm831x_reg_write: Write a single WM831x register.
573*4882a593Smuzhiyun *
574*4882a593Smuzhiyun * @wm831x: Device to write to.
575*4882a593Smuzhiyun * @reg: Register to write to.
576*4882a593Smuzhiyun * @val: Value to write.
577*4882a593Smuzhiyun */
wm831x_reg_write(struct wm831x * wm831x,unsigned short reg,unsigned short val)578*4882a593Smuzhiyun int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
579*4882a593Smuzhiyun unsigned short val)
580*4882a593Smuzhiyun {
581*4882a593Smuzhiyun int ret;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun mutex_lock(&wm831x->io_lock);
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun ret = wm831x_write(wm831x, reg, 2, &val);
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun mutex_unlock(&wm831x->io_lock);
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun return ret;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_reg_write);
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun /**
594*4882a593Smuzhiyun * wm831x_set_bits: Set the value of a bitfield in a WM831x register
595*4882a593Smuzhiyun *
596*4882a593Smuzhiyun * @wm831x: Device to write to.
597*4882a593Smuzhiyun * @reg: Register to write to.
598*4882a593Smuzhiyun * @mask: Mask of bits to set.
599*4882a593Smuzhiyun * @val: Value to set (unshifted)
600*4882a593Smuzhiyun */
wm831x_set_bits(struct wm831x * wm831x,unsigned short reg,unsigned short mask,unsigned short val)601*4882a593Smuzhiyun int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
602*4882a593Smuzhiyun unsigned short mask, unsigned short val)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun int ret;
605*4882a593Smuzhiyun
606*4882a593Smuzhiyun mutex_lock(&wm831x->io_lock);
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun if (!wm831x_reg_locked(wm831x, reg))
609*4882a593Smuzhiyun ret = regmap_update_bits(wm831x->regmap, reg, mask, val);
610*4882a593Smuzhiyun else
611*4882a593Smuzhiyun ret = -EPERM;
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun mutex_unlock(&wm831x->io_lock);
614*4882a593Smuzhiyun
615*4882a593Smuzhiyun return ret;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_set_bits);
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun static struct resource wm831x_dcdc1_resources[] = {
620*4882a593Smuzhiyun {
621*4882a593Smuzhiyun .start = WM831X_DC1_CONTROL_1,
622*4882a593Smuzhiyun .end = WM831X_DC1_DVS_CONTROL,
623*4882a593Smuzhiyun .flags = IORESOURCE_REG,
624*4882a593Smuzhiyun },
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun .name = "UV",
627*4882a593Smuzhiyun .start = WM831X_IRQ_UV_DC1,
628*4882a593Smuzhiyun .end = WM831X_IRQ_UV_DC1,
629*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
630*4882a593Smuzhiyun },
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun .name = "HC",
633*4882a593Smuzhiyun .start = WM831X_IRQ_HC_DC1,
634*4882a593Smuzhiyun .end = WM831X_IRQ_HC_DC1,
635*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
636*4882a593Smuzhiyun },
637*4882a593Smuzhiyun };
638*4882a593Smuzhiyun
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun static struct resource wm831x_dcdc2_resources[] = {
641*4882a593Smuzhiyun {
642*4882a593Smuzhiyun .start = WM831X_DC2_CONTROL_1,
643*4882a593Smuzhiyun .end = WM831X_DC2_DVS_CONTROL,
644*4882a593Smuzhiyun .flags = IORESOURCE_REG,
645*4882a593Smuzhiyun },
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun .name = "UV",
648*4882a593Smuzhiyun .start = WM831X_IRQ_UV_DC2,
649*4882a593Smuzhiyun .end = WM831X_IRQ_UV_DC2,
650*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
651*4882a593Smuzhiyun },
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun .name = "HC",
654*4882a593Smuzhiyun .start = WM831X_IRQ_HC_DC2,
655*4882a593Smuzhiyun .end = WM831X_IRQ_HC_DC2,
656*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
657*4882a593Smuzhiyun },
658*4882a593Smuzhiyun };
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun static struct resource wm831x_dcdc3_resources[] = {
661*4882a593Smuzhiyun {
662*4882a593Smuzhiyun .start = WM831X_DC3_CONTROL_1,
663*4882a593Smuzhiyun .end = WM831X_DC3_SLEEP_CONTROL,
664*4882a593Smuzhiyun .flags = IORESOURCE_REG,
665*4882a593Smuzhiyun },
666*4882a593Smuzhiyun {
667*4882a593Smuzhiyun .name = "UV",
668*4882a593Smuzhiyun .start = WM831X_IRQ_UV_DC3,
669*4882a593Smuzhiyun .end = WM831X_IRQ_UV_DC3,
670*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
671*4882a593Smuzhiyun },
672*4882a593Smuzhiyun };
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun static struct resource wm831x_dcdc4_resources[] = {
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun .start = WM831X_DC4_CONTROL,
677*4882a593Smuzhiyun .end = WM831X_DC4_SLEEP_CONTROL,
678*4882a593Smuzhiyun .flags = IORESOURCE_REG,
679*4882a593Smuzhiyun },
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun .name = "UV",
682*4882a593Smuzhiyun .start = WM831X_IRQ_UV_DC4,
683*4882a593Smuzhiyun .end = WM831X_IRQ_UV_DC4,
684*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
685*4882a593Smuzhiyun },
686*4882a593Smuzhiyun };
687*4882a593Smuzhiyun
688*4882a593Smuzhiyun static struct resource wm8320_dcdc4_buck_resources[] = {
689*4882a593Smuzhiyun {
690*4882a593Smuzhiyun .start = WM831X_DC4_CONTROL,
691*4882a593Smuzhiyun .end = WM832X_DC4_SLEEP_CONTROL,
692*4882a593Smuzhiyun .flags = IORESOURCE_REG,
693*4882a593Smuzhiyun },
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun .name = "UV",
696*4882a593Smuzhiyun .start = WM831X_IRQ_UV_DC4,
697*4882a593Smuzhiyun .end = WM831X_IRQ_UV_DC4,
698*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
699*4882a593Smuzhiyun },
700*4882a593Smuzhiyun };
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun static struct resource wm831x_gpio_resources[] = {
703*4882a593Smuzhiyun {
704*4882a593Smuzhiyun .start = WM831X_IRQ_GPIO_1,
705*4882a593Smuzhiyun .end = WM831X_IRQ_GPIO_16,
706*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
707*4882a593Smuzhiyun },
708*4882a593Smuzhiyun };
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun static struct resource wm831x_isink1_resources[] = {
711*4882a593Smuzhiyun {
712*4882a593Smuzhiyun .start = WM831X_CURRENT_SINK_1,
713*4882a593Smuzhiyun .end = WM831X_CURRENT_SINK_1,
714*4882a593Smuzhiyun .flags = IORESOURCE_REG,
715*4882a593Smuzhiyun },
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun .start = WM831X_IRQ_CS1,
718*4882a593Smuzhiyun .end = WM831X_IRQ_CS1,
719*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
720*4882a593Smuzhiyun },
721*4882a593Smuzhiyun };
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun static struct resource wm831x_isink2_resources[] = {
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun .start = WM831X_CURRENT_SINK_2,
726*4882a593Smuzhiyun .end = WM831X_CURRENT_SINK_2,
727*4882a593Smuzhiyun .flags = IORESOURCE_REG,
728*4882a593Smuzhiyun },
729*4882a593Smuzhiyun {
730*4882a593Smuzhiyun .start = WM831X_IRQ_CS2,
731*4882a593Smuzhiyun .end = WM831X_IRQ_CS2,
732*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
733*4882a593Smuzhiyun },
734*4882a593Smuzhiyun };
735*4882a593Smuzhiyun
736*4882a593Smuzhiyun static struct resource wm831x_ldo1_resources[] = {
737*4882a593Smuzhiyun {
738*4882a593Smuzhiyun .start = WM831X_LDO1_CONTROL,
739*4882a593Smuzhiyun .end = WM831X_LDO1_SLEEP_CONTROL,
740*4882a593Smuzhiyun .flags = IORESOURCE_REG,
741*4882a593Smuzhiyun },
742*4882a593Smuzhiyun {
743*4882a593Smuzhiyun .name = "UV",
744*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO1,
745*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO1,
746*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
747*4882a593Smuzhiyun },
748*4882a593Smuzhiyun };
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun static struct resource wm831x_ldo2_resources[] = {
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun .start = WM831X_LDO2_CONTROL,
753*4882a593Smuzhiyun .end = WM831X_LDO2_SLEEP_CONTROL,
754*4882a593Smuzhiyun .flags = IORESOURCE_REG,
755*4882a593Smuzhiyun },
756*4882a593Smuzhiyun {
757*4882a593Smuzhiyun .name = "UV",
758*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO2,
759*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO2,
760*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
761*4882a593Smuzhiyun },
762*4882a593Smuzhiyun };
763*4882a593Smuzhiyun
764*4882a593Smuzhiyun static struct resource wm831x_ldo3_resources[] = {
765*4882a593Smuzhiyun {
766*4882a593Smuzhiyun .start = WM831X_LDO3_CONTROL,
767*4882a593Smuzhiyun .end = WM831X_LDO3_SLEEP_CONTROL,
768*4882a593Smuzhiyun .flags = IORESOURCE_REG,
769*4882a593Smuzhiyun },
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun .name = "UV",
772*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO3,
773*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO3,
774*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
775*4882a593Smuzhiyun },
776*4882a593Smuzhiyun };
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun static struct resource wm831x_ldo4_resources[] = {
779*4882a593Smuzhiyun {
780*4882a593Smuzhiyun .start = WM831X_LDO4_CONTROL,
781*4882a593Smuzhiyun .end = WM831X_LDO4_SLEEP_CONTROL,
782*4882a593Smuzhiyun .flags = IORESOURCE_REG,
783*4882a593Smuzhiyun },
784*4882a593Smuzhiyun {
785*4882a593Smuzhiyun .name = "UV",
786*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO4,
787*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO4,
788*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
789*4882a593Smuzhiyun },
790*4882a593Smuzhiyun };
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun static struct resource wm831x_ldo5_resources[] = {
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun .start = WM831X_LDO5_CONTROL,
795*4882a593Smuzhiyun .end = WM831X_LDO5_SLEEP_CONTROL,
796*4882a593Smuzhiyun .flags = IORESOURCE_REG,
797*4882a593Smuzhiyun },
798*4882a593Smuzhiyun {
799*4882a593Smuzhiyun .name = "UV",
800*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO5,
801*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO5,
802*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
803*4882a593Smuzhiyun },
804*4882a593Smuzhiyun };
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun static struct resource wm831x_ldo6_resources[] = {
807*4882a593Smuzhiyun {
808*4882a593Smuzhiyun .start = WM831X_LDO6_CONTROL,
809*4882a593Smuzhiyun .end = WM831X_LDO6_SLEEP_CONTROL,
810*4882a593Smuzhiyun .flags = IORESOURCE_REG,
811*4882a593Smuzhiyun },
812*4882a593Smuzhiyun {
813*4882a593Smuzhiyun .name = "UV",
814*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO6,
815*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO6,
816*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
817*4882a593Smuzhiyun },
818*4882a593Smuzhiyun };
819*4882a593Smuzhiyun
820*4882a593Smuzhiyun static struct resource wm831x_ldo7_resources[] = {
821*4882a593Smuzhiyun {
822*4882a593Smuzhiyun .start = WM831X_LDO7_CONTROL,
823*4882a593Smuzhiyun .end = WM831X_LDO7_SLEEP_CONTROL,
824*4882a593Smuzhiyun .flags = IORESOURCE_REG,
825*4882a593Smuzhiyun },
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun .name = "UV",
828*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO7,
829*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO7,
830*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
831*4882a593Smuzhiyun },
832*4882a593Smuzhiyun };
833*4882a593Smuzhiyun
834*4882a593Smuzhiyun static struct resource wm831x_ldo8_resources[] = {
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun .start = WM831X_LDO8_CONTROL,
837*4882a593Smuzhiyun .end = WM831X_LDO8_SLEEP_CONTROL,
838*4882a593Smuzhiyun .flags = IORESOURCE_REG,
839*4882a593Smuzhiyun },
840*4882a593Smuzhiyun {
841*4882a593Smuzhiyun .name = "UV",
842*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO8,
843*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO8,
844*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
845*4882a593Smuzhiyun },
846*4882a593Smuzhiyun };
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun static struct resource wm831x_ldo9_resources[] = {
849*4882a593Smuzhiyun {
850*4882a593Smuzhiyun .start = WM831X_LDO9_CONTROL,
851*4882a593Smuzhiyun .end = WM831X_LDO9_SLEEP_CONTROL,
852*4882a593Smuzhiyun .flags = IORESOURCE_REG,
853*4882a593Smuzhiyun },
854*4882a593Smuzhiyun {
855*4882a593Smuzhiyun .name = "UV",
856*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO9,
857*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO9,
858*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
859*4882a593Smuzhiyun },
860*4882a593Smuzhiyun };
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun static struct resource wm831x_ldo10_resources[] = {
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun .start = WM831X_LDO10_CONTROL,
865*4882a593Smuzhiyun .end = WM831X_LDO10_SLEEP_CONTROL,
866*4882a593Smuzhiyun .flags = IORESOURCE_REG,
867*4882a593Smuzhiyun },
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun .name = "UV",
870*4882a593Smuzhiyun .start = WM831X_IRQ_UV_LDO10,
871*4882a593Smuzhiyun .end = WM831X_IRQ_UV_LDO10,
872*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
873*4882a593Smuzhiyun },
874*4882a593Smuzhiyun };
875*4882a593Smuzhiyun
876*4882a593Smuzhiyun static struct resource wm831x_ldo11_resources[] = {
877*4882a593Smuzhiyun {
878*4882a593Smuzhiyun .start = WM831X_LDO11_ON_CONTROL,
879*4882a593Smuzhiyun .end = WM831X_LDO11_SLEEP_CONTROL,
880*4882a593Smuzhiyun .flags = IORESOURCE_REG,
881*4882a593Smuzhiyun },
882*4882a593Smuzhiyun };
883*4882a593Smuzhiyun
884*4882a593Smuzhiyun static struct resource wm831x_on_resources[] = {
885*4882a593Smuzhiyun {
886*4882a593Smuzhiyun .start = WM831X_IRQ_ON,
887*4882a593Smuzhiyun .end = WM831X_IRQ_ON,
888*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
889*4882a593Smuzhiyun },
890*4882a593Smuzhiyun };
891*4882a593Smuzhiyun
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun static struct resource wm831x_power_resources[] = {
894*4882a593Smuzhiyun {
895*4882a593Smuzhiyun .name = "SYSLO",
896*4882a593Smuzhiyun .start = WM831X_IRQ_PPM_SYSLO,
897*4882a593Smuzhiyun .end = WM831X_IRQ_PPM_SYSLO,
898*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
899*4882a593Smuzhiyun },
900*4882a593Smuzhiyun {
901*4882a593Smuzhiyun .name = "PWR SRC",
902*4882a593Smuzhiyun .start = WM831X_IRQ_PPM_PWR_SRC,
903*4882a593Smuzhiyun .end = WM831X_IRQ_PPM_PWR_SRC,
904*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
905*4882a593Smuzhiyun },
906*4882a593Smuzhiyun {
907*4882a593Smuzhiyun .name = "USB CURR",
908*4882a593Smuzhiyun .start = WM831X_IRQ_PPM_USB_CURR,
909*4882a593Smuzhiyun .end = WM831X_IRQ_PPM_USB_CURR,
910*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
911*4882a593Smuzhiyun },
912*4882a593Smuzhiyun {
913*4882a593Smuzhiyun .name = "BATT HOT",
914*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_BATT_HOT,
915*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_BATT_HOT,
916*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
917*4882a593Smuzhiyun },
918*4882a593Smuzhiyun {
919*4882a593Smuzhiyun .name = "BATT COLD",
920*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_BATT_COLD,
921*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_BATT_COLD,
922*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
923*4882a593Smuzhiyun },
924*4882a593Smuzhiyun {
925*4882a593Smuzhiyun .name = "BATT FAIL",
926*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_BATT_FAIL,
927*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_BATT_FAIL,
928*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
929*4882a593Smuzhiyun },
930*4882a593Smuzhiyun {
931*4882a593Smuzhiyun .name = "OV",
932*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_OV,
933*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_OV,
934*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
935*4882a593Smuzhiyun },
936*4882a593Smuzhiyun {
937*4882a593Smuzhiyun .name = "END",
938*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_END,
939*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_END,
940*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
941*4882a593Smuzhiyun },
942*4882a593Smuzhiyun {
943*4882a593Smuzhiyun .name = "TO",
944*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_TO,
945*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_TO,
946*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
947*4882a593Smuzhiyun },
948*4882a593Smuzhiyun {
949*4882a593Smuzhiyun .name = "MODE",
950*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_MODE,
951*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_MODE,
952*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
953*4882a593Smuzhiyun },
954*4882a593Smuzhiyun {
955*4882a593Smuzhiyun .name = "START",
956*4882a593Smuzhiyun .start = WM831X_IRQ_CHG_START,
957*4882a593Smuzhiyun .end = WM831X_IRQ_CHG_START,
958*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
959*4882a593Smuzhiyun },
960*4882a593Smuzhiyun };
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun static struct resource wm831x_rtc_resources[] = {
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun .name = "PER",
965*4882a593Smuzhiyun .start = WM831X_IRQ_RTC_PER,
966*4882a593Smuzhiyun .end = WM831X_IRQ_RTC_PER,
967*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
968*4882a593Smuzhiyun },
969*4882a593Smuzhiyun {
970*4882a593Smuzhiyun .name = "ALM",
971*4882a593Smuzhiyun .start = WM831X_IRQ_RTC_ALM,
972*4882a593Smuzhiyun .end = WM831X_IRQ_RTC_ALM,
973*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
974*4882a593Smuzhiyun },
975*4882a593Smuzhiyun };
976*4882a593Smuzhiyun
977*4882a593Smuzhiyun static struct resource wm831x_status1_resources[] = {
978*4882a593Smuzhiyun {
979*4882a593Smuzhiyun .start = WM831X_STATUS_LED_1,
980*4882a593Smuzhiyun .end = WM831X_STATUS_LED_1,
981*4882a593Smuzhiyun .flags = IORESOURCE_REG,
982*4882a593Smuzhiyun },
983*4882a593Smuzhiyun };
984*4882a593Smuzhiyun
985*4882a593Smuzhiyun static struct resource wm831x_status2_resources[] = {
986*4882a593Smuzhiyun {
987*4882a593Smuzhiyun .start = WM831X_STATUS_LED_2,
988*4882a593Smuzhiyun .end = WM831X_STATUS_LED_2,
989*4882a593Smuzhiyun .flags = IORESOURCE_REG,
990*4882a593Smuzhiyun },
991*4882a593Smuzhiyun };
992*4882a593Smuzhiyun
993*4882a593Smuzhiyun static struct resource wm831x_touch_resources[] = {
994*4882a593Smuzhiyun {
995*4882a593Smuzhiyun .name = "TCHPD",
996*4882a593Smuzhiyun .start = WM831X_IRQ_TCHPD,
997*4882a593Smuzhiyun .end = WM831X_IRQ_TCHPD,
998*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
999*4882a593Smuzhiyun },
1000*4882a593Smuzhiyun {
1001*4882a593Smuzhiyun .name = "TCHDATA",
1002*4882a593Smuzhiyun .start = WM831X_IRQ_TCHDATA,
1003*4882a593Smuzhiyun .end = WM831X_IRQ_TCHDATA,
1004*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
1005*4882a593Smuzhiyun },
1006*4882a593Smuzhiyun };
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun static struct resource wm831x_wdt_resources[] = {
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun .start = WM831X_IRQ_WDOG_TO,
1011*4882a593Smuzhiyun .end = WM831X_IRQ_WDOG_TO,
1012*4882a593Smuzhiyun .flags = IORESOURCE_IRQ,
1013*4882a593Smuzhiyun },
1014*4882a593Smuzhiyun };
1015*4882a593Smuzhiyun
1016*4882a593Smuzhiyun static const struct mfd_cell wm8310_devs[] = {
1017*4882a593Smuzhiyun {
1018*4882a593Smuzhiyun .name = "wm831x-backup",
1019*4882a593Smuzhiyun },
1020*4882a593Smuzhiyun {
1021*4882a593Smuzhiyun .name = "wm831x-buckv",
1022*4882a593Smuzhiyun .id = 1,
1023*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1024*4882a593Smuzhiyun .resources = wm831x_dcdc1_resources,
1025*4882a593Smuzhiyun },
1026*4882a593Smuzhiyun {
1027*4882a593Smuzhiyun .name = "wm831x-buckv",
1028*4882a593Smuzhiyun .id = 2,
1029*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1030*4882a593Smuzhiyun .resources = wm831x_dcdc2_resources,
1031*4882a593Smuzhiyun },
1032*4882a593Smuzhiyun {
1033*4882a593Smuzhiyun .name = "wm831x-buckp",
1034*4882a593Smuzhiyun .id = 3,
1035*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1036*4882a593Smuzhiyun .resources = wm831x_dcdc3_resources,
1037*4882a593Smuzhiyun },
1038*4882a593Smuzhiyun {
1039*4882a593Smuzhiyun .name = "wm831x-boostp",
1040*4882a593Smuzhiyun .id = 4,
1041*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1042*4882a593Smuzhiyun .resources = wm831x_dcdc4_resources,
1043*4882a593Smuzhiyun },
1044*4882a593Smuzhiyun {
1045*4882a593Smuzhiyun .name = "wm831x-clk",
1046*4882a593Smuzhiyun },
1047*4882a593Smuzhiyun {
1048*4882a593Smuzhiyun .name = "wm831x-epe",
1049*4882a593Smuzhiyun .id = 1,
1050*4882a593Smuzhiyun },
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun .name = "wm831x-epe",
1053*4882a593Smuzhiyun .id = 2,
1054*4882a593Smuzhiyun },
1055*4882a593Smuzhiyun {
1056*4882a593Smuzhiyun .name = "wm831x-gpio",
1057*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1058*4882a593Smuzhiyun .resources = wm831x_gpio_resources,
1059*4882a593Smuzhiyun },
1060*4882a593Smuzhiyun {
1061*4882a593Smuzhiyun .name = "wm831x-hwmon",
1062*4882a593Smuzhiyun },
1063*4882a593Smuzhiyun {
1064*4882a593Smuzhiyun .name = "wm831x-isink",
1065*4882a593Smuzhiyun .id = 1,
1066*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1067*4882a593Smuzhiyun .resources = wm831x_isink1_resources,
1068*4882a593Smuzhiyun },
1069*4882a593Smuzhiyun {
1070*4882a593Smuzhiyun .name = "wm831x-isink",
1071*4882a593Smuzhiyun .id = 2,
1072*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1073*4882a593Smuzhiyun .resources = wm831x_isink2_resources,
1074*4882a593Smuzhiyun },
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun .name = "wm831x-ldo",
1077*4882a593Smuzhiyun .id = 1,
1078*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1079*4882a593Smuzhiyun .resources = wm831x_ldo1_resources,
1080*4882a593Smuzhiyun },
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun .name = "wm831x-ldo",
1083*4882a593Smuzhiyun .id = 2,
1084*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1085*4882a593Smuzhiyun .resources = wm831x_ldo2_resources,
1086*4882a593Smuzhiyun },
1087*4882a593Smuzhiyun {
1088*4882a593Smuzhiyun .name = "wm831x-ldo",
1089*4882a593Smuzhiyun .id = 3,
1090*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1091*4882a593Smuzhiyun .resources = wm831x_ldo3_resources,
1092*4882a593Smuzhiyun },
1093*4882a593Smuzhiyun {
1094*4882a593Smuzhiyun .name = "wm831x-ldo",
1095*4882a593Smuzhiyun .id = 4,
1096*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1097*4882a593Smuzhiyun .resources = wm831x_ldo4_resources,
1098*4882a593Smuzhiyun },
1099*4882a593Smuzhiyun {
1100*4882a593Smuzhiyun .name = "wm831x-ldo",
1101*4882a593Smuzhiyun .id = 5,
1102*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1103*4882a593Smuzhiyun .resources = wm831x_ldo5_resources,
1104*4882a593Smuzhiyun },
1105*4882a593Smuzhiyun {
1106*4882a593Smuzhiyun .name = "wm831x-ldo",
1107*4882a593Smuzhiyun .id = 6,
1108*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1109*4882a593Smuzhiyun .resources = wm831x_ldo6_resources,
1110*4882a593Smuzhiyun },
1111*4882a593Smuzhiyun {
1112*4882a593Smuzhiyun .name = "wm831x-aldo",
1113*4882a593Smuzhiyun .id = 7,
1114*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1115*4882a593Smuzhiyun .resources = wm831x_ldo7_resources,
1116*4882a593Smuzhiyun },
1117*4882a593Smuzhiyun {
1118*4882a593Smuzhiyun .name = "wm831x-aldo",
1119*4882a593Smuzhiyun .id = 8,
1120*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1121*4882a593Smuzhiyun .resources = wm831x_ldo8_resources,
1122*4882a593Smuzhiyun },
1123*4882a593Smuzhiyun {
1124*4882a593Smuzhiyun .name = "wm831x-aldo",
1125*4882a593Smuzhiyun .id = 9,
1126*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1127*4882a593Smuzhiyun .resources = wm831x_ldo9_resources,
1128*4882a593Smuzhiyun },
1129*4882a593Smuzhiyun {
1130*4882a593Smuzhiyun .name = "wm831x-aldo",
1131*4882a593Smuzhiyun .id = 10,
1132*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1133*4882a593Smuzhiyun .resources = wm831x_ldo10_resources,
1134*4882a593Smuzhiyun },
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun .name = "wm831x-alive-ldo",
1137*4882a593Smuzhiyun .id = 11,
1138*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1139*4882a593Smuzhiyun .resources = wm831x_ldo11_resources,
1140*4882a593Smuzhiyun },
1141*4882a593Smuzhiyun {
1142*4882a593Smuzhiyun .name = "wm831x-on",
1143*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_on_resources),
1144*4882a593Smuzhiyun .resources = wm831x_on_resources,
1145*4882a593Smuzhiyun },
1146*4882a593Smuzhiyun {
1147*4882a593Smuzhiyun .name = "wm831x-power",
1148*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_power_resources),
1149*4882a593Smuzhiyun .resources = wm831x_power_resources,
1150*4882a593Smuzhiyun },
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun .name = "wm831x-status",
1153*4882a593Smuzhiyun .id = 1,
1154*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1155*4882a593Smuzhiyun .resources = wm831x_status1_resources,
1156*4882a593Smuzhiyun },
1157*4882a593Smuzhiyun {
1158*4882a593Smuzhiyun .name = "wm831x-status",
1159*4882a593Smuzhiyun .id = 2,
1160*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1161*4882a593Smuzhiyun .resources = wm831x_status2_resources,
1162*4882a593Smuzhiyun },
1163*4882a593Smuzhiyun {
1164*4882a593Smuzhiyun .name = "wm831x-watchdog",
1165*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1166*4882a593Smuzhiyun .resources = wm831x_wdt_resources,
1167*4882a593Smuzhiyun },
1168*4882a593Smuzhiyun };
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun static const struct mfd_cell wm8311_devs[] = {
1171*4882a593Smuzhiyun {
1172*4882a593Smuzhiyun .name = "wm831x-backup",
1173*4882a593Smuzhiyun },
1174*4882a593Smuzhiyun {
1175*4882a593Smuzhiyun .name = "wm831x-buckv",
1176*4882a593Smuzhiyun .id = 1,
1177*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1178*4882a593Smuzhiyun .resources = wm831x_dcdc1_resources,
1179*4882a593Smuzhiyun },
1180*4882a593Smuzhiyun {
1181*4882a593Smuzhiyun .name = "wm831x-buckv",
1182*4882a593Smuzhiyun .id = 2,
1183*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1184*4882a593Smuzhiyun .resources = wm831x_dcdc2_resources,
1185*4882a593Smuzhiyun },
1186*4882a593Smuzhiyun {
1187*4882a593Smuzhiyun .name = "wm831x-buckp",
1188*4882a593Smuzhiyun .id = 3,
1189*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1190*4882a593Smuzhiyun .resources = wm831x_dcdc3_resources,
1191*4882a593Smuzhiyun },
1192*4882a593Smuzhiyun {
1193*4882a593Smuzhiyun .name = "wm831x-boostp",
1194*4882a593Smuzhiyun .id = 4,
1195*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1196*4882a593Smuzhiyun .resources = wm831x_dcdc4_resources,
1197*4882a593Smuzhiyun },
1198*4882a593Smuzhiyun {
1199*4882a593Smuzhiyun .name = "wm831x-clk",
1200*4882a593Smuzhiyun },
1201*4882a593Smuzhiyun {
1202*4882a593Smuzhiyun .name = "wm831x-epe",
1203*4882a593Smuzhiyun .id = 1,
1204*4882a593Smuzhiyun },
1205*4882a593Smuzhiyun {
1206*4882a593Smuzhiyun .name = "wm831x-epe",
1207*4882a593Smuzhiyun .id = 2,
1208*4882a593Smuzhiyun },
1209*4882a593Smuzhiyun {
1210*4882a593Smuzhiyun .name = "wm831x-gpio",
1211*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1212*4882a593Smuzhiyun .resources = wm831x_gpio_resources,
1213*4882a593Smuzhiyun },
1214*4882a593Smuzhiyun {
1215*4882a593Smuzhiyun .name = "wm831x-hwmon",
1216*4882a593Smuzhiyun },
1217*4882a593Smuzhiyun {
1218*4882a593Smuzhiyun .name = "wm831x-isink",
1219*4882a593Smuzhiyun .id = 1,
1220*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1221*4882a593Smuzhiyun .resources = wm831x_isink1_resources,
1222*4882a593Smuzhiyun },
1223*4882a593Smuzhiyun {
1224*4882a593Smuzhiyun .name = "wm831x-isink",
1225*4882a593Smuzhiyun .id = 2,
1226*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1227*4882a593Smuzhiyun .resources = wm831x_isink2_resources,
1228*4882a593Smuzhiyun },
1229*4882a593Smuzhiyun {
1230*4882a593Smuzhiyun .name = "wm831x-ldo",
1231*4882a593Smuzhiyun .id = 1,
1232*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1233*4882a593Smuzhiyun .resources = wm831x_ldo1_resources,
1234*4882a593Smuzhiyun },
1235*4882a593Smuzhiyun {
1236*4882a593Smuzhiyun .name = "wm831x-ldo",
1237*4882a593Smuzhiyun .id = 2,
1238*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1239*4882a593Smuzhiyun .resources = wm831x_ldo2_resources,
1240*4882a593Smuzhiyun },
1241*4882a593Smuzhiyun {
1242*4882a593Smuzhiyun .name = "wm831x-ldo",
1243*4882a593Smuzhiyun .id = 3,
1244*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1245*4882a593Smuzhiyun .resources = wm831x_ldo3_resources,
1246*4882a593Smuzhiyun },
1247*4882a593Smuzhiyun {
1248*4882a593Smuzhiyun .name = "wm831x-ldo",
1249*4882a593Smuzhiyun .id = 4,
1250*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1251*4882a593Smuzhiyun .resources = wm831x_ldo4_resources,
1252*4882a593Smuzhiyun },
1253*4882a593Smuzhiyun {
1254*4882a593Smuzhiyun .name = "wm831x-ldo",
1255*4882a593Smuzhiyun .id = 5,
1256*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1257*4882a593Smuzhiyun .resources = wm831x_ldo5_resources,
1258*4882a593Smuzhiyun },
1259*4882a593Smuzhiyun {
1260*4882a593Smuzhiyun .name = "wm831x-aldo",
1261*4882a593Smuzhiyun .id = 7,
1262*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1263*4882a593Smuzhiyun .resources = wm831x_ldo7_resources,
1264*4882a593Smuzhiyun },
1265*4882a593Smuzhiyun {
1266*4882a593Smuzhiyun .name = "wm831x-alive-ldo",
1267*4882a593Smuzhiyun .id = 11,
1268*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1269*4882a593Smuzhiyun .resources = wm831x_ldo11_resources,
1270*4882a593Smuzhiyun },
1271*4882a593Smuzhiyun {
1272*4882a593Smuzhiyun .name = "wm831x-on",
1273*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_on_resources),
1274*4882a593Smuzhiyun .resources = wm831x_on_resources,
1275*4882a593Smuzhiyun },
1276*4882a593Smuzhiyun {
1277*4882a593Smuzhiyun .name = "wm831x-power",
1278*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_power_resources),
1279*4882a593Smuzhiyun .resources = wm831x_power_resources,
1280*4882a593Smuzhiyun },
1281*4882a593Smuzhiyun {
1282*4882a593Smuzhiyun .name = "wm831x-status",
1283*4882a593Smuzhiyun .id = 1,
1284*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1285*4882a593Smuzhiyun .resources = wm831x_status1_resources,
1286*4882a593Smuzhiyun },
1287*4882a593Smuzhiyun {
1288*4882a593Smuzhiyun .name = "wm831x-status",
1289*4882a593Smuzhiyun .id = 2,
1290*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1291*4882a593Smuzhiyun .resources = wm831x_status2_resources,
1292*4882a593Smuzhiyun },
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun .name = "wm831x-watchdog",
1295*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1296*4882a593Smuzhiyun .resources = wm831x_wdt_resources,
1297*4882a593Smuzhiyun },
1298*4882a593Smuzhiyun };
1299*4882a593Smuzhiyun
1300*4882a593Smuzhiyun static const struct mfd_cell wm8312_devs[] = {
1301*4882a593Smuzhiyun {
1302*4882a593Smuzhiyun .name = "wm831x-backup",
1303*4882a593Smuzhiyun },
1304*4882a593Smuzhiyun {
1305*4882a593Smuzhiyun .name = "wm831x-buckv",
1306*4882a593Smuzhiyun .id = 1,
1307*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1308*4882a593Smuzhiyun .resources = wm831x_dcdc1_resources,
1309*4882a593Smuzhiyun },
1310*4882a593Smuzhiyun {
1311*4882a593Smuzhiyun .name = "wm831x-buckv",
1312*4882a593Smuzhiyun .id = 2,
1313*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1314*4882a593Smuzhiyun .resources = wm831x_dcdc2_resources,
1315*4882a593Smuzhiyun },
1316*4882a593Smuzhiyun {
1317*4882a593Smuzhiyun .name = "wm831x-buckp",
1318*4882a593Smuzhiyun .id = 3,
1319*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1320*4882a593Smuzhiyun .resources = wm831x_dcdc3_resources,
1321*4882a593Smuzhiyun },
1322*4882a593Smuzhiyun {
1323*4882a593Smuzhiyun .name = "wm831x-boostp",
1324*4882a593Smuzhiyun .id = 4,
1325*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1326*4882a593Smuzhiyun .resources = wm831x_dcdc4_resources,
1327*4882a593Smuzhiyun },
1328*4882a593Smuzhiyun {
1329*4882a593Smuzhiyun .name = "wm831x-clk",
1330*4882a593Smuzhiyun },
1331*4882a593Smuzhiyun {
1332*4882a593Smuzhiyun .name = "wm831x-epe",
1333*4882a593Smuzhiyun .id = 1,
1334*4882a593Smuzhiyun },
1335*4882a593Smuzhiyun {
1336*4882a593Smuzhiyun .name = "wm831x-epe",
1337*4882a593Smuzhiyun .id = 2,
1338*4882a593Smuzhiyun },
1339*4882a593Smuzhiyun {
1340*4882a593Smuzhiyun .name = "wm831x-gpio",
1341*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1342*4882a593Smuzhiyun .resources = wm831x_gpio_resources,
1343*4882a593Smuzhiyun },
1344*4882a593Smuzhiyun {
1345*4882a593Smuzhiyun .name = "wm831x-hwmon",
1346*4882a593Smuzhiyun },
1347*4882a593Smuzhiyun {
1348*4882a593Smuzhiyun .name = "wm831x-isink",
1349*4882a593Smuzhiyun .id = 1,
1350*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1351*4882a593Smuzhiyun .resources = wm831x_isink1_resources,
1352*4882a593Smuzhiyun },
1353*4882a593Smuzhiyun {
1354*4882a593Smuzhiyun .name = "wm831x-isink",
1355*4882a593Smuzhiyun .id = 2,
1356*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1357*4882a593Smuzhiyun .resources = wm831x_isink2_resources,
1358*4882a593Smuzhiyun },
1359*4882a593Smuzhiyun {
1360*4882a593Smuzhiyun .name = "wm831x-ldo",
1361*4882a593Smuzhiyun .id = 1,
1362*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1363*4882a593Smuzhiyun .resources = wm831x_ldo1_resources,
1364*4882a593Smuzhiyun },
1365*4882a593Smuzhiyun {
1366*4882a593Smuzhiyun .name = "wm831x-ldo",
1367*4882a593Smuzhiyun .id = 2,
1368*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1369*4882a593Smuzhiyun .resources = wm831x_ldo2_resources,
1370*4882a593Smuzhiyun },
1371*4882a593Smuzhiyun {
1372*4882a593Smuzhiyun .name = "wm831x-ldo",
1373*4882a593Smuzhiyun .id = 3,
1374*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1375*4882a593Smuzhiyun .resources = wm831x_ldo3_resources,
1376*4882a593Smuzhiyun },
1377*4882a593Smuzhiyun {
1378*4882a593Smuzhiyun .name = "wm831x-ldo",
1379*4882a593Smuzhiyun .id = 4,
1380*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1381*4882a593Smuzhiyun .resources = wm831x_ldo4_resources,
1382*4882a593Smuzhiyun },
1383*4882a593Smuzhiyun {
1384*4882a593Smuzhiyun .name = "wm831x-ldo",
1385*4882a593Smuzhiyun .id = 5,
1386*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1387*4882a593Smuzhiyun .resources = wm831x_ldo5_resources,
1388*4882a593Smuzhiyun },
1389*4882a593Smuzhiyun {
1390*4882a593Smuzhiyun .name = "wm831x-ldo",
1391*4882a593Smuzhiyun .id = 6,
1392*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1393*4882a593Smuzhiyun .resources = wm831x_ldo6_resources,
1394*4882a593Smuzhiyun },
1395*4882a593Smuzhiyun {
1396*4882a593Smuzhiyun .name = "wm831x-aldo",
1397*4882a593Smuzhiyun .id = 7,
1398*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1399*4882a593Smuzhiyun .resources = wm831x_ldo7_resources,
1400*4882a593Smuzhiyun },
1401*4882a593Smuzhiyun {
1402*4882a593Smuzhiyun .name = "wm831x-aldo",
1403*4882a593Smuzhiyun .id = 8,
1404*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1405*4882a593Smuzhiyun .resources = wm831x_ldo8_resources,
1406*4882a593Smuzhiyun },
1407*4882a593Smuzhiyun {
1408*4882a593Smuzhiyun .name = "wm831x-aldo",
1409*4882a593Smuzhiyun .id = 9,
1410*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1411*4882a593Smuzhiyun .resources = wm831x_ldo9_resources,
1412*4882a593Smuzhiyun },
1413*4882a593Smuzhiyun {
1414*4882a593Smuzhiyun .name = "wm831x-aldo",
1415*4882a593Smuzhiyun .id = 10,
1416*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1417*4882a593Smuzhiyun .resources = wm831x_ldo10_resources,
1418*4882a593Smuzhiyun },
1419*4882a593Smuzhiyun {
1420*4882a593Smuzhiyun .name = "wm831x-alive-ldo",
1421*4882a593Smuzhiyun .id = 11,
1422*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1423*4882a593Smuzhiyun .resources = wm831x_ldo11_resources,
1424*4882a593Smuzhiyun },
1425*4882a593Smuzhiyun {
1426*4882a593Smuzhiyun .name = "wm831x-on",
1427*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_on_resources),
1428*4882a593Smuzhiyun .resources = wm831x_on_resources,
1429*4882a593Smuzhiyun },
1430*4882a593Smuzhiyun {
1431*4882a593Smuzhiyun .name = "wm831x-power",
1432*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_power_resources),
1433*4882a593Smuzhiyun .resources = wm831x_power_resources,
1434*4882a593Smuzhiyun },
1435*4882a593Smuzhiyun {
1436*4882a593Smuzhiyun .name = "wm831x-status",
1437*4882a593Smuzhiyun .id = 1,
1438*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1439*4882a593Smuzhiyun .resources = wm831x_status1_resources,
1440*4882a593Smuzhiyun },
1441*4882a593Smuzhiyun {
1442*4882a593Smuzhiyun .name = "wm831x-status",
1443*4882a593Smuzhiyun .id = 2,
1444*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1445*4882a593Smuzhiyun .resources = wm831x_status2_resources,
1446*4882a593Smuzhiyun },
1447*4882a593Smuzhiyun {
1448*4882a593Smuzhiyun .name = "wm831x-watchdog",
1449*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1450*4882a593Smuzhiyun .resources = wm831x_wdt_resources,
1451*4882a593Smuzhiyun },
1452*4882a593Smuzhiyun };
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun static const struct mfd_cell wm8320_devs[] = {
1455*4882a593Smuzhiyun {
1456*4882a593Smuzhiyun .name = "wm831x-backup",
1457*4882a593Smuzhiyun },
1458*4882a593Smuzhiyun {
1459*4882a593Smuzhiyun .name = "wm831x-buckv",
1460*4882a593Smuzhiyun .id = 1,
1461*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1462*4882a593Smuzhiyun .resources = wm831x_dcdc1_resources,
1463*4882a593Smuzhiyun },
1464*4882a593Smuzhiyun {
1465*4882a593Smuzhiyun .name = "wm831x-buckv",
1466*4882a593Smuzhiyun .id = 2,
1467*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1468*4882a593Smuzhiyun .resources = wm831x_dcdc2_resources,
1469*4882a593Smuzhiyun },
1470*4882a593Smuzhiyun {
1471*4882a593Smuzhiyun .name = "wm831x-buckp",
1472*4882a593Smuzhiyun .id = 3,
1473*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1474*4882a593Smuzhiyun .resources = wm831x_dcdc3_resources,
1475*4882a593Smuzhiyun },
1476*4882a593Smuzhiyun {
1477*4882a593Smuzhiyun .name = "wm831x-buckp",
1478*4882a593Smuzhiyun .id = 4,
1479*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm8320_dcdc4_buck_resources),
1480*4882a593Smuzhiyun .resources = wm8320_dcdc4_buck_resources,
1481*4882a593Smuzhiyun },
1482*4882a593Smuzhiyun {
1483*4882a593Smuzhiyun .name = "wm831x-clk",
1484*4882a593Smuzhiyun },
1485*4882a593Smuzhiyun {
1486*4882a593Smuzhiyun .name = "wm831x-gpio",
1487*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1488*4882a593Smuzhiyun .resources = wm831x_gpio_resources,
1489*4882a593Smuzhiyun },
1490*4882a593Smuzhiyun {
1491*4882a593Smuzhiyun .name = "wm831x-hwmon",
1492*4882a593Smuzhiyun },
1493*4882a593Smuzhiyun {
1494*4882a593Smuzhiyun .name = "wm831x-ldo",
1495*4882a593Smuzhiyun .id = 1,
1496*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1497*4882a593Smuzhiyun .resources = wm831x_ldo1_resources,
1498*4882a593Smuzhiyun },
1499*4882a593Smuzhiyun {
1500*4882a593Smuzhiyun .name = "wm831x-ldo",
1501*4882a593Smuzhiyun .id = 2,
1502*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1503*4882a593Smuzhiyun .resources = wm831x_ldo2_resources,
1504*4882a593Smuzhiyun },
1505*4882a593Smuzhiyun {
1506*4882a593Smuzhiyun .name = "wm831x-ldo",
1507*4882a593Smuzhiyun .id = 3,
1508*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1509*4882a593Smuzhiyun .resources = wm831x_ldo3_resources,
1510*4882a593Smuzhiyun },
1511*4882a593Smuzhiyun {
1512*4882a593Smuzhiyun .name = "wm831x-ldo",
1513*4882a593Smuzhiyun .id = 4,
1514*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1515*4882a593Smuzhiyun .resources = wm831x_ldo4_resources,
1516*4882a593Smuzhiyun },
1517*4882a593Smuzhiyun {
1518*4882a593Smuzhiyun .name = "wm831x-ldo",
1519*4882a593Smuzhiyun .id = 5,
1520*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1521*4882a593Smuzhiyun .resources = wm831x_ldo5_resources,
1522*4882a593Smuzhiyun },
1523*4882a593Smuzhiyun {
1524*4882a593Smuzhiyun .name = "wm831x-ldo",
1525*4882a593Smuzhiyun .id = 6,
1526*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1527*4882a593Smuzhiyun .resources = wm831x_ldo6_resources,
1528*4882a593Smuzhiyun },
1529*4882a593Smuzhiyun {
1530*4882a593Smuzhiyun .name = "wm831x-aldo",
1531*4882a593Smuzhiyun .id = 7,
1532*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1533*4882a593Smuzhiyun .resources = wm831x_ldo7_resources,
1534*4882a593Smuzhiyun },
1535*4882a593Smuzhiyun {
1536*4882a593Smuzhiyun .name = "wm831x-aldo",
1537*4882a593Smuzhiyun .id = 8,
1538*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1539*4882a593Smuzhiyun .resources = wm831x_ldo8_resources,
1540*4882a593Smuzhiyun },
1541*4882a593Smuzhiyun {
1542*4882a593Smuzhiyun .name = "wm831x-aldo",
1543*4882a593Smuzhiyun .id = 9,
1544*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1545*4882a593Smuzhiyun .resources = wm831x_ldo9_resources,
1546*4882a593Smuzhiyun },
1547*4882a593Smuzhiyun {
1548*4882a593Smuzhiyun .name = "wm831x-aldo",
1549*4882a593Smuzhiyun .id = 10,
1550*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1551*4882a593Smuzhiyun .resources = wm831x_ldo10_resources,
1552*4882a593Smuzhiyun },
1553*4882a593Smuzhiyun {
1554*4882a593Smuzhiyun .name = "wm831x-alive-ldo",
1555*4882a593Smuzhiyun .id = 11,
1556*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1557*4882a593Smuzhiyun .resources = wm831x_ldo11_resources,
1558*4882a593Smuzhiyun },
1559*4882a593Smuzhiyun {
1560*4882a593Smuzhiyun .name = "wm831x-on",
1561*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_on_resources),
1562*4882a593Smuzhiyun .resources = wm831x_on_resources,
1563*4882a593Smuzhiyun },
1564*4882a593Smuzhiyun {
1565*4882a593Smuzhiyun .name = "wm831x-status",
1566*4882a593Smuzhiyun .id = 1,
1567*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1568*4882a593Smuzhiyun .resources = wm831x_status1_resources,
1569*4882a593Smuzhiyun },
1570*4882a593Smuzhiyun {
1571*4882a593Smuzhiyun .name = "wm831x-status",
1572*4882a593Smuzhiyun .id = 2,
1573*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1574*4882a593Smuzhiyun .resources = wm831x_status2_resources,
1575*4882a593Smuzhiyun },
1576*4882a593Smuzhiyun {
1577*4882a593Smuzhiyun .name = "wm831x-watchdog",
1578*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1579*4882a593Smuzhiyun .resources = wm831x_wdt_resources,
1580*4882a593Smuzhiyun },
1581*4882a593Smuzhiyun };
1582*4882a593Smuzhiyun
1583*4882a593Smuzhiyun static const struct mfd_cell touch_devs[] = {
1584*4882a593Smuzhiyun {
1585*4882a593Smuzhiyun .name = "wm831x-touch",
1586*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1587*4882a593Smuzhiyun .resources = wm831x_touch_resources,
1588*4882a593Smuzhiyun },
1589*4882a593Smuzhiyun };
1590*4882a593Smuzhiyun
1591*4882a593Smuzhiyun static const struct mfd_cell rtc_devs[] = {
1592*4882a593Smuzhiyun {
1593*4882a593Smuzhiyun .name = "wm831x-rtc",
1594*4882a593Smuzhiyun .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1595*4882a593Smuzhiyun .resources = wm831x_rtc_resources,
1596*4882a593Smuzhiyun },
1597*4882a593Smuzhiyun };
1598*4882a593Smuzhiyun
1599*4882a593Smuzhiyun static const struct mfd_cell backlight_devs[] = {
1600*4882a593Smuzhiyun {
1601*4882a593Smuzhiyun .name = "wm831x-backlight",
1602*4882a593Smuzhiyun },
1603*4882a593Smuzhiyun };
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun struct regmap_config wm831x_regmap_config = {
1606*4882a593Smuzhiyun .reg_bits = 16,
1607*4882a593Smuzhiyun .val_bits = 16,
1608*4882a593Smuzhiyun
1609*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
1610*4882a593Smuzhiyun
1611*4882a593Smuzhiyun .max_register = WM831X_DBE_CHECK_DATA,
1612*4882a593Smuzhiyun .readable_reg = wm831x_reg_readable,
1613*4882a593Smuzhiyun .writeable_reg = wm831x_reg_writeable,
1614*4882a593Smuzhiyun .volatile_reg = wm831x_reg_volatile,
1615*4882a593Smuzhiyun };
1616*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_regmap_config);
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun const struct of_device_id wm831x_of_match[] = {
1619*4882a593Smuzhiyun { .compatible = "wlf,wm8310", .data = (void *)WM8310 },
1620*4882a593Smuzhiyun { .compatible = "wlf,wm8311", .data = (void *)WM8311 },
1621*4882a593Smuzhiyun { .compatible = "wlf,wm8312", .data = (void *)WM8312 },
1622*4882a593Smuzhiyun { .compatible = "wlf,wm8320", .data = (void *)WM8320 },
1623*4882a593Smuzhiyun { .compatible = "wlf,wm8321", .data = (void *)WM8321 },
1624*4882a593Smuzhiyun { .compatible = "wlf,wm8325", .data = (void *)WM8325 },
1625*4882a593Smuzhiyun { .compatible = "wlf,wm8326", .data = (void *)WM8326 },
1626*4882a593Smuzhiyun { },
1627*4882a593Smuzhiyun };
1628*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_of_match);
1629*4882a593Smuzhiyun
1630*4882a593Smuzhiyun /*
1631*4882a593Smuzhiyun * Instantiate the generic non-control parts of the device.
1632*4882a593Smuzhiyun */
wm831x_device_init(struct wm831x * wm831x,int irq)1633*4882a593Smuzhiyun int wm831x_device_init(struct wm831x *wm831x, int irq)
1634*4882a593Smuzhiyun {
1635*4882a593Smuzhiyun struct wm831x_pdata *pdata = &wm831x->pdata;
1636*4882a593Smuzhiyun int rev, wm831x_num;
1637*4882a593Smuzhiyun enum wm831x_parent parent;
1638*4882a593Smuzhiyun int ret, i;
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun mutex_init(&wm831x->io_lock);
1641*4882a593Smuzhiyun mutex_init(&wm831x->key_lock);
1642*4882a593Smuzhiyun dev_set_drvdata(wm831x->dev, wm831x);
1643*4882a593Smuzhiyun
1644*4882a593Smuzhiyun wm831x->soft_shutdown = pdata->soft_shutdown;
1645*4882a593Smuzhiyun
1646*4882a593Smuzhiyun ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
1647*4882a593Smuzhiyun if (ret < 0) {
1648*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret);
1649*4882a593Smuzhiyun goto err;
1650*4882a593Smuzhiyun }
1651*4882a593Smuzhiyun switch (ret) {
1652*4882a593Smuzhiyun case 0x6204:
1653*4882a593Smuzhiyun case 0x6246:
1654*4882a593Smuzhiyun break;
1655*4882a593Smuzhiyun default:
1656*4882a593Smuzhiyun dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret);
1657*4882a593Smuzhiyun ret = -EINVAL;
1658*4882a593Smuzhiyun goto err;
1659*4882a593Smuzhiyun }
1660*4882a593Smuzhiyun
1661*4882a593Smuzhiyun ret = wm831x_reg_read(wm831x, WM831X_REVISION);
1662*4882a593Smuzhiyun if (ret < 0) {
1663*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to read revision: %d\n", ret);
1664*4882a593Smuzhiyun goto err;
1665*4882a593Smuzhiyun }
1666*4882a593Smuzhiyun rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT;
1667*4882a593Smuzhiyun
1668*4882a593Smuzhiyun ret = wm831x_reg_read(wm831x, WM831X_RESET_ID);
1669*4882a593Smuzhiyun if (ret < 0) {
1670*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret);
1671*4882a593Smuzhiyun goto err;
1672*4882a593Smuzhiyun }
1673*4882a593Smuzhiyun
1674*4882a593Smuzhiyun /* Some engineering samples do not have the ID set, rely on
1675*4882a593Smuzhiyun * the device being registered correctly.
1676*4882a593Smuzhiyun */
1677*4882a593Smuzhiyun if (ret == 0) {
1678*4882a593Smuzhiyun dev_info(wm831x->dev, "Device is an engineering sample\n");
1679*4882a593Smuzhiyun ret = wm831x->type;
1680*4882a593Smuzhiyun }
1681*4882a593Smuzhiyun
1682*4882a593Smuzhiyun switch (ret) {
1683*4882a593Smuzhiyun case WM8310:
1684*4882a593Smuzhiyun parent = WM8310;
1685*4882a593Smuzhiyun wm831x->num_gpio = 16;
1686*4882a593Smuzhiyun wm831x->charger_irq_wake = 1;
1687*4882a593Smuzhiyun if (rev > 0) {
1688*4882a593Smuzhiyun wm831x->has_gpio_ena = 1;
1689*4882a593Smuzhiyun wm831x->has_cs_sts = 1;
1690*4882a593Smuzhiyun }
1691*4882a593Smuzhiyun
1692*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8310 revision %c\n", 'A' + rev);
1693*4882a593Smuzhiyun break;
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun case WM8311:
1696*4882a593Smuzhiyun parent = WM8311;
1697*4882a593Smuzhiyun wm831x->num_gpio = 16;
1698*4882a593Smuzhiyun wm831x->charger_irq_wake = 1;
1699*4882a593Smuzhiyun if (rev > 0) {
1700*4882a593Smuzhiyun wm831x->has_gpio_ena = 1;
1701*4882a593Smuzhiyun wm831x->has_cs_sts = 1;
1702*4882a593Smuzhiyun }
1703*4882a593Smuzhiyun
1704*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8311 revision %c\n", 'A' + rev);
1705*4882a593Smuzhiyun break;
1706*4882a593Smuzhiyun
1707*4882a593Smuzhiyun case WM8312:
1708*4882a593Smuzhiyun parent = WM8312;
1709*4882a593Smuzhiyun wm831x->num_gpio = 16;
1710*4882a593Smuzhiyun wm831x->charger_irq_wake = 1;
1711*4882a593Smuzhiyun if (rev > 0) {
1712*4882a593Smuzhiyun wm831x->has_gpio_ena = 1;
1713*4882a593Smuzhiyun wm831x->has_cs_sts = 1;
1714*4882a593Smuzhiyun }
1715*4882a593Smuzhiyun
1716*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8312 revision %c\n", 'A' + rev);
1717*4882a593Smuzhiyun break;
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun case WM8320:
1720*4882a593Smuzhiyun parent = WM8320;
1721*4882a593Smuzhiyun wm831x->num_gpio = 12;
1722*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8320 revision %c\n", 'A' + rev);
1723*4882a593Smuzhiyun break;
1724*4882a593Smuzhiyun
1725*4882a593Smuzhiyun case WM8321:
1726*4882a593Smuzhiyun parent = WM8321;
1727*4882a593Smuzhiyun wm831x->num_gpio = 12;
1728*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8321 revision %c\n", 'A' + rev);
1729*4882a593Smuzhiyun break;
1730*4882a593Smuzhiyun
1731*4882a593Smuzhiyun case WM8325:
1732*4882a593Smuzhiyun parent = WM8325;
1733*4882a593Smuzhiyun wm831x->num_gpio = 12;
1734*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8325 revision %c\n", 'A' + rev);
1735*4882a593Smuzhiyun break;
1736*4882a593Smuzhiyun
1737*4882a593Smuzhiyun case WM8326:
1738*4882a593Smuzhiyun parent = WM8326;
1739*4882a593Smuzhiyun wm831x->num_gpio = 12;
1740*4882a593Smuzhiyun dev_info(wm831x->dev, "WM8326 revision %c\n", 'A' + rev);
1741*4882a593Smuzhiyun break;
1742*4882a593Smuzhiyun
1743*4882a593Smuzhiyun default:
1744*4882a593Smuzhiyun dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret);
1745*4882a593Smuzhiyun ret = -EINVAL;
1746*4882a593Smuzhiyun goto err;
1747*4882a593Smuzhiyun }
1748*4882a593Smuzhiyun
1749*4882a593Smuzhiyun /* This will need revisiting in future but is OK for all
1750*4882a593Smuzhiyun * current parts.
1751*4882a593Smuzhiyun */
1752*4882a593Smuzhiyun if (parent != wm831x->type)
1753*4882a593Smuzhiyun dev_warn(wm831x->dev, "Device was registered as a WM%x\n",
1754*4882a593Smuzhiyun wm831x->type);
1755*4882a593Smuzhiyun
1756*4882a593Smuzhiyun /* Bootstrap the user key */
1757*4882a593Smuzhiyun ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY);
1758*4882a593Smuzhiyun if (ret < 0) {
1759*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to read security key: %d\n", ret);
1760*4882a593Smuzhiyun goto err;
1761*4882a593Smuzhiyun }
1762*4882a593Smuzhiyun if (ret != 0) {
1763*4882a593Smuzhiyun dev_warn(wm831x->dev, "Security key had non-zero value %x\n",
1764*4882a593Smuzhiyun ret);
1765*4882a593Smuzhiyun wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
1766*4882a593Smuzhiyun }
1767*4882a593Smuzhiyun wm831x->locked = 1;
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun if (pdata->pre_init) {
1770*4882a593Smuzhiyun ret = pdata->pre_init(wm831x);
1771*4882a593Smuzhiyun if (ret != 0) {
1772*4882a593Smuzhiyun dev_err(wm831x->dev, "pre_init() failed: %d\n", ret);
1773*4882a593Smuzhiyun goto err;
1774*4882a593Smuzhiyun }
1775*4882a593Smuzhiyun }
1776*4882a593Smuzhiyun
1777*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
1778*4882a593Smuzhiyun if (!pdata->gpio_defaults[i])
1779*4882a593Smuzhiyun continue;
1780*4882a593Smuzhiyun
1781*4882a593Smuzhiyun wm831x_reg_write(wm831x,
1782*4882a593Smuzhiyun WM831X_GPIO1_CONTROL + i,
1783*4882a593Smuzhiyun pdata->gpio_defaults[i] & 0xffff);
1784*4882a593Smuzhiyun }
1785*4882a593Smuzhiyun
1786*4882a593Smuzhiyun /* Multiply by 10 as we have many subdevices of the same type */
1787*4882a593Smuzhiyun if (pdata->wm831x_num)
1788*4882a593Smuzhiyun wm831x_num = pdata->wm831x_num * 10;
1789*4882a593Smuzhiyun else
1790*4882a593Smuzhiyun wm831x_num = -1;
1791*4882a593Smuzhiyun
1792*4882a593Smuzhiyun ret = wm831x_irq_init(wm831x, irq);
1793*4882a593Smuzhiyun if (ret != 0)
1794*4882a593Smuzhiyun goto err;
1795*4882a593Smuzhiyun
1796*4882a593Smuzhiyun wm831x_auxadc_init(wm831x);
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun /* The core device is up, instantiate the subdevices. */
1799*4882a593Smuzhiyun switch (parent) {
1800*4882a593Smuzhiyun case WM8310:
1801*4882a593Smuzhiyun ret = mfd_add_devices(wm831x->dev, wm831x_num,
1802*4882a593Smuzhiyun wm8310_devs, ARRAY_SIZE(wm8310_devs),
1803*4882a593Smuzhiyun NULL, 0, NULL);
1804*4882a593Smuzhiyun break;
1805*4882a593Smuzhiyun
1806*4882a593Smuzhiyun case WM8311:
1807*4882a593Smuzhiyun ret = mfd_add_devices(wm831x->dev, wm831x_num,
1808*4882a593Smuzhiyun wm8311_devs, ARRAY_SIZE(wm8311_devs),
1809*4882a593Smuzhiyun NULL, 0, NULL);
1810*4882a593Smuzhiyun if (!pdata->disable_touch)
1811*4882a593Smuzhiyun mfd_add_devices(wm831x->dev, wm831x_num,
1812*4882a593Smuzhiyun touch_devs, ARRAY_SIZE(touch_devs),
1813*4882a593Smuzhiyun NULL, 0, NULL);
1814*4882a593Smuzhiyun break;
1815*4882a593Smuzhiyun
1816*4882a593Smuzhiyun case WM8312:
1817*4882a593Smuzhiyun ret = mfd_add_devices(wm831x->dev, wm831x_num,
1818*4882a593Smuzhiyun wm8312_devs, ARRAY_SIZE(wm8312_devs),
1819*4882a593Smuzhiyun NULL, 0, NULL);
1820*4882a593Smuzhiyun if (!pdata->disable_touch)
1821*4882a593Smuzhiyun mfd_add_devices(wm831x->dev, wm831x_num,
1822*4882a593Smuzhiyun touch_devs, ARRAY_SIZE(touch_devs),
1823*4882a593Smuzhiyun NULL, 0, NULL);
1824*4882a593Smuzhiyun break;
1825*4882a593Smuzhiyun
1826*4882a593Smuzhiyun case WM8320:
1827*4882a593Smuzhiyun case WM8321:
1828*4882a593Smuzhiyun case WM8325:
1829*4882a593Smuzhiyun case WM8326:
1830*4882a593Smuzhiyun ret = mfd_add_devices(wm831x->dev, wm831x_num,
1831*4882a593Smuzhiyun wm8320_devs, ARRAY_SIZE(wm8320_devs),
1832*4882a593Smuzhiyun NULL, 0, NULL);
1833*4882a593Smuzhiyun break;
1834*4882a593Smuzhiyun
1835*4882a593Smuzhiyun default:
1836*4882a593Smuzhiyun /* If this happens the bus probe function is buggy */
1837*4882a593Smuzhiyun BUG();
1838*4882a593Smuzhiyun }
1839*4882a593Smuzhiyun
1840*4882a593Smuzhiyun if (ret != 0) {
1841*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to add children\n");
1842*4882a593Smuzhiyun goto err_irq;
1843*4882a593Smuzhiyun }
1844*4882a593Smuzhiyun
1845*4882a593Smuzhiyun /* The RTC can only be used if the 32.768kHz crystal is
1846*4882a593Smuzhiyun * enabled; this can't be controlled by software at runtime.
1847*4882a593Smuzhiyun */
1848*4882a593Smuzhiyun ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
1849*4882a593Smuzhiyun if (ret < 0) {
1850*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to read clock status: %d\n", ret);
1851*4882a593Smuzhiyun goto err_irq;
1852*4882a593Smuzhiyun }
1853*4882a593Smuzhiyun
1854*4882a593Smuzhiyun if (ret & WM831X_XTAL_ENA) {
1855*4882a593Smuzhiyun ret = mfd_add_devices(wm831x->dev, wm831x_num,
1856*4882a593Smuzhiyun rtc_devs, ARRAY_SIZE(rtc_devs),
1857*4882a593Smuzhiyun NULL, 0, NULL);
1858*4882a593Smuzhiyun if (ret != 0) {
1859*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);
1860*4882a593Smuzhiyun goto err_irq;
1861*4882a593Smuzhiyun }
1862*4882a593Smuzhiyun } else {
1863*4882a593Smuzhiyun dev_info(wm831x->dev, "32.768kHz clock disabled, no RTC\n");
1864*4882a593Smuzhiyun }
1865*4882a593Smuzhiyun
1866*4882a593Smuzhiyun if (pdata->backlight) {
1867*4882a593Smuzhiyun /* Treat errors as non-critical */
1868*4882a593Smuzhiyun ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,
1869*4882a593Smuzhiyun ARRAY_SIZE(backlight_devs), NULL,
1870*4882a593Smuzhiyun 0, NULL);
1871*4882a593Smuzhiyun if (ret < 0)
1872*4882a593Smuzhiyun dev_err(wm831x->dev, "Failed to add backlight: %d\n",
1873*4882a593Smuzhiyun ret);
1874*4882a593Smuzhiyun }
1875*4882a593Smuzhiyun
1876*4882a593Smuzhiyun wm831x_otp_init(wm831x);
1877*4882a593Smuzhiyun
1878*4882a593Smuzhiyun if (pdata->post_init) {
1879*4882a593Smuzhiyun ret = pdata->post_init(wm831x);
1880*4882a593Smuzhiyun if (ret != 0) {
1881*4882a593Smuzhiyun dev_err(wm831x->dev, "post_init() failed: %d\n", ret);
1882*4882a593Smuzhiyun goto err_irq;
1883*4882a593Smuzhiyun }
1884*4882a593Smuzhiyun }
1885*4882a593Smuzhiyun
1886*4882a593Smuzhiyun return 0;
1887*4882a593Smuzhiyun
1888*4882a593Smuzhiyun err_irq:
1889*4882a593Smuzhiyun wm831x_irq_exit(wm831x);
1890*4882a593Smuzhiyun err:
1891*4882a593Smuzhiyun mfd_remove_devices(wm831x->dev);
1892*4882a593Smuzhiyun return ret;
1893*4882a593Smuzhiyun }
1894*4882a593Smuzhiyun
wm831x_device_suspend(struct wm831x * wm831x)1895*4882a593Smuzhiyun int wm831x_device_suspend(struct wm831x *wm831x)
1896*4882a593Smuzhiyun {
1897*4882a593Smuzhiyun int reg, mask;
1898*4882a593Smuzhiyun
1899*4882a593Smuzhiyun /* If the charger IRQs are a wake source then make sure we ack
1900*4882a593Smuzhiyun * them even if they're not actively being used (eg, no power
1901*4882a593Smuzhiyun * driver or no IRQ line wired up) then acknowledge the
1902*4882a593Smuzhiyun * interrupts otherwise suspend won't last very long.
1903*4882a593Smuzhiyun */
1904*4882a593Smuzhiyun if (wm831x->charger_irq_wake) {
1905*4882a593Smuzhiyun reg = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_2_MASK);
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun mask = WM831X_CHG_BATT_HOT_EINT |
1908*4882a593Smuzhiyun WM831X_CHG_BATT_COLD_EINT |
1909*4882a593Smuzhiyun WM831X_CHG_BATT_FAIL_EINT |
1910*4882a593Smuzhiyun WM831X_CHG_OV_EINT | WM831X_CHG_END_EINT |
1911*4882a593Smuzhiyun WM831X_CHG_TO_EINT | WM831X_CHG_MODE_EINT |
1912*4882a593Smuzhiyun WM831X_CHG_START_EINT;
1913*4882a593Smuzhiyun
1914*4882a593Smuzhiyun /* If any of the interrupts are masked read the statuses */
1915*4882a593Smuzhiyun if (reg & mask)
1916*4882a593Smuzhiyun reg = wm831x_reg_read(wm831x,
1917*4882a593Smuzhiyun WM831X_INTERRUPT_STATUS_2);
1918*4882a593Smuzhiyun
1919*4882a593Smuzhiyun if (reg & mask) {
1920*4882a593Smuzhiyun dev_info(wm831x->dev,
1921*4882a593Smuzhiyun "Acknowledging masked charger IRQs: %x\n",
1922*4882a593Smuzhiyun reg & mask);
1923*4882a593Smuzhiyun wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_2,
1924*4882a593Smuzhiyun reg & mask);
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun }
1927*4882a593Smuzhiyun
1928*4882a593Smuzhiyun return 0;
1929*4882a593Smuzhiyun }
1930*4882a593Smuzhiyun
wm831x_device_shutdown(struct wm831x * wm831x)1931*4882a593Smuzhiyun void wm831x_device_shutdown(struct wm831x *wm831x)
1932*4882a593Smuzhiyun {
1933*4882a593Smuzhiyun if (wm831x->soft_shutdown) {
1934*4882a593Smuzhiyun dev_info(wm831x->dev, "Initiating shutdown...\n");
1935*4882a593Smuzhiyun wm831x_set_bits(wm831x, WM831X_POWER_STATE, WM831X_CHIP_ON, 0);
1936*4882a593Smuzhiyun }
1937*4882a593Smuzhiyun }
1938*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(wm831x_device_shutdown);
1939