xref: /OK3568_Linux_fs/kernel/drivers/mfd/tps65912-core.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Core functions for TI TPS65912x PMICs
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com/
5*4882a593Smuzhiyun  *	Andrew F. Davis <afd@ti.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or
8*4882a593Smuzhiyun  * modify it under the terms of the GNU General Public License version 2 as
9*4882a593Smuzhiyun  * published by the Free Software Foundation.
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12*4882a593Smuzhiyun  * kind, whether expressed or implied; without even the implied warranty
13*4882a593Smuzhiyun  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14*4882a593Smuzhiyun  * GNU General Public License version 2 for more details.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * Based on the TPS65218 driver and the previous TPS65912 driver by
17*4882a593Smuzhiyun  * Margarita Olaya Cabrera <magi@slimlogic.co.uk>
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include <linux/interrupt.h>
21*4882a593Smuzhiyun #include <linux/mfd/core.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #include <linux/mfd/tps65912.h>
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun static const struct mfd_cell tps65912_cells[] = {
27*4882a593Smuzhiyun 	{ .name = "tps65912-regulator", },
28*4882a593Smuzhiyun 	{ .name = "tps65912-gpio", },
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun static const struct regmap_irq tps65912_irqs[] = {
32*4882a593Smuzhiyun 	/* INT_STS IRQs */
33*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_F, 0, TPS65912_INT_STS_PWRHOLD_F),
34*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_VMON, 0, TPS65912_INT_STS_VMON),
35*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PWRON, 0, TPS65912_INT_STS_PWRON),
36*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PWRON_LP, 0, TPS65912_INT_STS_PWRON_LP),
37*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PWRHOLD_R, 0, TPS65912_INT_STS_PWRHOLD_R),
38*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_HOTDIE, 0, TPS65912_INT_STS_HOTDIE),
39*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_R, 0, TPS65912_INT_STS_GPIO1_R),
40*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO1_F, 0, TPS65912_INT_STS_GPIO1_F),
41*4882a593Smuzhiyun 	/* INT_STS2 IRQs */
42*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_R, 1, TPS65912_INT_STS2_GPIO2_R),
43*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO2_F, 1, TPS65912_INT_STS2_GPIO2_F),
44*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_R, 1, TPS65912_INT_STS2_GPIO3_R),
45*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO3_F, 1, TPS65912_INT_STS2_GPIO3_F),
46*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_R, 1, TPS65912_INT_STS2_GPIO4_R),
47*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO4_F, 1, TPS65912_INT_STS2_GPIO4_F),
48*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_R, 1, TPS65912_INT_STS2_GPIO5_R),
49*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_GPIO5_F, 1, TPS65912_INT_STS2_GPIO5_F),
50*4882a593Smuzhiyun 	/* INT_STS3 IRQs */
51*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC1, 2, TPS65912_INT_STS3_PGOOD_DCDC1),
52*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC2, 2, TPS65912_INT_STS3_PGOOD_DCDC2),
53*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC3, 2, TPS65912_INT_STS3_PGOOD_DCDC3),
54*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_DCDC4, 2, TPS65912_INT_STS3_PGOOD_DCDC4),
55*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO1, 2, TPS65912_INT_STS3_PGOOD_LDO1),
56*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO2, 2, TPS65912_INT_STS3_PGOOD_LDO2),
57*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO3, 2, TPS65912_INT_STS3_PGOOD_LDO3),
58*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO4, 2, TPS65912_INT_STS3_PGOOD_LDO4),
59*4882a593Smuzhiyun 	/* INT_STS4 IRQs */
60*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO5, 3, TPS65912_INT_STS4_PGOOD_LDO5),
61*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO6, 3, TPS65912_INT_STS4_PGOOD_LDO6),
62*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO7, 3, TPS65912_INT_STS4_PGOOD_LDO7),
63*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO8, 3, TPS65912_INT_STS4_PGOOD_LDO8),
64*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO9, 3, TPS65912_INT_STS4_PGOOD_LDO9),
65*4882a593Smuzhiyun 	REGMAP_IRQ_REG(TPS65912_IRQ_PGOOD_LDO10, 3, TPS65912_INT_STS4_PGOOD_LDO10),
66*4882a593Smuzhiyun };
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun static struct regmap_irq_chip tps65912_irq_chip = {
69*4882a593Smuzhiyun 	.name = "tps65912",
70*4882a593Smuzhiyun 	.irqs = tps65912_irqs,
71*4882a593Smuzhiyun 	.num_irqs = ARRAY_SIZE(tps65912_irqs),
72*4882a593Smuzhiyun 	.num_regs = 4,
73*4882a593Smuzhiyun 	.irq_reg_stride = 2,
74*4882a593Smuzhiyun 	.mask_base = TPS65912_INT_MSK,
75*4882a593Smuzhiyun 	.status_base = TPS65912_INT_STS,
76*4882a593Smuzhiyun 	.ack_base = TPS65912_INT_STS,
77*4882a593Smuzhiyun 	.init_ack_masked = true,
78*4882a593Smuzhiyun };
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun static const struct regmap_range tps65912_yes_ranges[] = {
81*4882a593Smuzhiyun 	regmap_reg_range(TPS65912_INT_STS, TPS65912_GPIO5),
82*4882a593Smuzhiyun };
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static const struct regmap_access_table tps65912_volatile_table = {
85*4882a593Smuzhiyun 	.yes_ranges = tps65912_yes_ranges,
86*4882a593Smuzhiyun 	.n_yes_ranges = ARRAY_SIZE(tps65912_yes_ranges),
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun const struct regmap_config tps65912_regmap_config = {
90*4882a593Smuzhiyun 	.reg_bits = 8,
91*4882a593Smuzhiyun 	.val_bits = 8,
92*4882a593Smuzhiyun 	.cache_type = REGCACHE_RBTREE,
93*4882a593Smuzhiyun 	.volatile_table = &tps65912_volatile_table,
94*4882a593Smuzhiyun };
95*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tps65912_regmap_config);
96*4882a593Smuzhiyun 
tps65912_device_init(struct tps65912 * tps)97*4882a593Smuzhiyun int tps65912_device_init(struct tps65912 *tps)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	int ret;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	ret = regmap_add_irq_chip(tps->regmap, tps->irq, IRQF_ONESHOT, 0,
102*4882a593Smuzhiyun 				  &tps65912_irq_chip, &tps->irq_data);
103*4882a593Smuzhiyun 	if (ret)
104*4882a593Smuzhiyun 		return ret;
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	ret = mfd_add_devices(tps->dev, PLATFORM_DEVID_AUTO, tps65912_cells,
107*4882a593Smuzhiyun 			      ARRAY_SIZE(tps65912_cells), NULL, 0,
108*4882a593Smuzhiyun 			      regmap_irq_get_domain(tps->irq_data));
109*4882a593Smuzhiyun 	if (ret) {
110*4882a593Smuzhiyun 		regmap_del_irq_chip(tps->irq, tps->irq_data);
111*4882a593Smuzhiyun 		return ret;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tps65912_device_init);
117*4882a593Smuzhiyun 
tps65912_device_exit(struct tps65912 * tps)118*4882a593Smuzhiyun int tps65912_device_exit(struct tps65912 *tps)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	regmap_del_irq_chip(tps->irq, tps->irq_data);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	return 0;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tps65912_device_exit);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun MODULE_AUTHOR("Andrew F. Davis <afd@ti.com>");
127*4882a593Smuzhiyun MODULE_DESCRIPTION("TPS65912x MFD Driver");
128*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
129