xref: /OK3568_Linux_fs/kernel/drivers/mfd/stm32-lptimer.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * STM32 Low-Power Timer parent driver.
4*4882a593Smuzhiyun  * Copyright (C) STMicroelectronics 2017
5*4882a593Smuzhiyun  * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
6*4882a593Smuzhiyun  * Inspired by Benjamin Gaignard's stm32-timers driver
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include <linux/mfd/stm32-lptimer.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <linux/of_platform.h>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define STM32_LPTIM_MAX_REGISTER	0x3fc
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun static const struct regmap_config stm32_lptimer_regmap_cfg = {
16*4882a593Smuzhiyun 	.reg_bits = 32,
17*4882a593Smuzhiyun 	.val_bits = 32,
18*4882a593Smuzhiyun 	.reg_stride = sizeof(u32),
19*4882a593Smuzhiyun 	.max_register = STM32_LPTIM_MAX_REGISTER,
20*4882a593Smuzhiyun 	.fast_io = true,
21*4882a593Smuzhiyun };
22*4882a593Smuzhiyun 
stm32_lptimer_detect_encoder(struct stm32_lptimer * ddata)23*4882a593Smuzhiyun static int stm32_lptimer_detect_encoder(struct stm32_lptimer *ddata)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	u32 val;
26*4882a593Smuzhiyun 	int ret;
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun 	/*
29*4882a593Smuzhiyun 	 * Quadrature encoder mode bit can only be written and read back when
30*4882a593Smuzhiyun 	 * Low-Power Timer supports it.
31*4882a593Smuzhiyun 	 */
32*4882a593Smuzhiyun 	ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR,
33*4882a593Smuzhiyun 				 STM32_LPTIM_ENC, STM32_LPTIM_ENC);
34*4882a593Smuzhiyun 	if (ret)
35*4882a593Smuzhiyun 		return ret;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 	ret = regmap_read(ddata->regmap, STM32_LPTIM_CFGR, &val);
38*4882a593Smuzhiyun 	if (ret)
39*4882a593Smuzhiyun 		return ret;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	ret = regmap_update_bits(ddata->regmap, STM32_LPTIM_CFGR,
42*4882a593Smuzhiyun 				 STM32_LPTIM_ENC, 0);
43*4882a593Smuzhiyun 	if (ret)
44*4882a593Smuzhiyun 		return ret;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	ddata->has_encoder = !!(val & STM32_LPTIM_ENC);
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	return 0;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun 
stm32_lptimer_probe(struct platform_device * pdev)51*4882a593Smuzhiyun static int stm32_lptimer_probe(struct platform_device *pdev)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
54*4882a593Smuzhiyun 	struct stm32_lptimer *ddata;
55*4882a593Smuzhiyun 	struct resource *res;
56*4882a593Smuzhiyun 	void __iomem *mmio;
57*4882a593Smuzhiyun 	int ret;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
60*4882a593Smuzhiyun 	if (!ddata)
61*4882a593Smuzhiyun 		return -ENOMEM;
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
64*4882a593Smuzhiyun 	mmio = devm_ioremap_resource(dev, res);
65*4882a593Smuzhiyun 	if (IS_ERR(mmio))
66*4882a593Smuzhiyun 		return PTR_ERR(mmio);
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	ddata->regmap = devm_regmap_init_mmio_clk(dev, "mux", mmio,
69*4882a593Smuzhiyun 						  &stm32_lptimer_regmap_cfg);
70*4882a593Smuzhiyun 	if (IS_ERR(ddata->regmap))
71*4882a593Smuzhiyun 		return PTR_ERR(ddata->regmap);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	ddata->clk = devm_clk_get(dev, NULL);
74*4882a593Smuzhiyun 	if (IS_ERR(ddata->clk))
75*4882a593Smuzhiyun 		return PTR_ERR(ddata->clk);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	ret = stm32_lptimer_detect_encoder(ddata);
78*4882a593Smuzhiyun 	if (ret)
79*4882a593Smuzhiyun 		return ret;
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	platform_set_drvdata(pdev, ddata);
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return devm_of_platform_populate(&pdev->dev);
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun static const struct of_device_id stm32_lptimer_of_match[] = {
87*4882a593Smuzhiyun 	{ .compatible = "st,stm32-lptimer", },
88*4882a593Smuzhiyun 	{},
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, stm32_lptimer_of_match);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun static struct platform_driver stm32_lptimer_driver = {
93*4882a593Smuzhiyun 	.probe = stm32_lptimer_probe,
94*4882a593Smuzhiyun 	.driver = {
95*4882a593Smuzhiyun 		.name = "stm32-lptimer",
96*4882a593Smuzhiyun 		.of_match_table = stm32_lptimer_of_match,
97*4882a593Smuzhiyun 	},
98*4882a593Smuzhiyun };
99*4882a593Smuzhiyun module_platform_driver(stm32_lptimer_driver);
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
102*4882a593Smuzhiyun MODULE_DESCRIPTION("STMicroelectronics STM32 Low-Power Timer");
103*4882a593Smuzhiyun MODULE_ALIAS("platform:stm32-lptimer");
104*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
105