1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (C) 2018 ROHM Semiconductors
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // ROHM BD71837MWV and BD71847MWV PMIC driver
6*4882a593Smuzhiyun //
7*4882a593Smuzhiyun // Datasheet for BD71837MWV available from
8*4882a593Smuzhiyun // https://www.rohm.com/datasheet/BD71837MWV/bd71837mwv-e
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <linux/gpio_keys.h>
11*4882a593Smuzhiyun #include <linux/i2c.h>
12*4882a593Smuzhiyun #include <linux/input.h>
13*4882a593Smuzhiyun #include <linux/interrupt.h>
14*4882a593Smuzhiyun #include <linux/mfd/rohm-bd718x7.h>
15*4882a593Smuzhiyun #include <linux/mfd/core.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/of_device.h>
18*4882a593Smuzhiyun #include <linux/regmap.h>
19*4882a593Smuzhiyun #include <linux/types.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static struct gpio_keys_button button = {
22*4882a593Smuzhiyun .code = KEY_POWER,
23*4882a593Smuzhiyun .gpio = -1,
24*4882a593Smuzhiyun .type = EV_KEY,
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static struct gpio_keys_platform_data bd718xx_powerkey_data = {
28*4882a593Smuzhiyun .buttons = &button,
29*4882a593Smuzhiyun .nbuttons = 1,
30*4882a593Smuzhiyun .name = "bd718xx-pwrkey",
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun static struct mfd_cell bd71837_mfd_cells[] = {
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun .name = "gpio-keys",
36*4882a593Smuzhiyun .platform_data = &bd718xx_powerkey_data,
37*4882a593Smuzhiyun .pdata_size = sizeof(bd718xx_powerkey_data),
38*4882a593Smuzhiyun },
39*4882a593Smuzhiyun { .name = "bd71837-clk", },
40*4882a593Smuzhiyun { .name = "bd71837-pmic", },
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun static struct mfd_cell bd71847_mfd_cells[] = {
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun .name = "gpio-keys",
46*4882a593Smuzhiyun .platform_data = &bd718xx_powerkey_data,
47*4882a593Smuzhiyun .pdata_size = sizeof(bd718xx_powerkey_data),
48*4882a593Smuzhiyun },
49*4882a593Smuzhiyun { .name = "bd71847-clk", },
50*4882a593Smuzhiyun { .name = "bd71847-pmic", },
51*4882a593Smuzhiyun };
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun static const struct regmap_irq bd718xx_irqs[] = {
54*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_SWRST, 0, BD718XX_INT_SWRST_MASK),
55*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_PWRBTN_S, 0, BD718XX_INT_PWRBTN_S_MASK),
56*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_PWRBTN_L, 0, BD718XX_INT_PWRBTN_L_MASK),
57*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_PWRBTN, 0, BD718XX_INT_PWRBTN_MASK),
58*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_WDOG, 0, BD718XX_INT_WDOG_MASK),
59*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_ON_REQ, 0, BD718XX_INT_ON_REQ_MASK),
60*4882a593Smuzhiyun REGMAP_IRQ_REG(BD718XX_INT_STBY_REQ, 0, BD718XX_INT_STBY_REQ_MASK),
61*4882a593Smuzhiyun };
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static struct regmap_irq_chip bd718xx_irq_chip = {
64*4882a593Smuzhiyun .name = "bd718xx-irq",
65*4882a593Smuzhiyun .irqs = bd718xx_irqs,
66*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(bd718xx_irqs),
67*4882a593Smuzhiyun .num_regs = 1,
68*4882a593Smuzhiyun .irq_reg_stride = 1,
69*4882a593Smuzhiyun .status_base = BD718XX_REG_IRQ,
70*4882a593Smuzhiyun .mask_base = BD718XX_REG_MIRQ,
71*4882a593Smuzhiyun .ack_base = BD718XX_REG_IRQ,
72*4882a593Smuzhiyun .init_ack_masked = true,
73*4882a593Smuzhiyun .mask_invert = false,
74*4882a593Smuzhiyun };
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun static const struct regmap_range pmic_status_range = {
77*4882a593Smuzhiyun .range_min = BD718XX_REG_IRQ,
78*4882a593Smuzhiyun .range_max = BD718XX_REG_POW_STATE,
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static const struct regmap_access_table volatile_regs = {
82*4882a593Smuzhiyun .yes_ranges = &pmic_status_range,
83*4882a593Smuzhiyun .n_yes_ranges = 1,
84*4882a593Smuzhiyun };
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun static const struct regmap_config bd718xx_regmap_config = {
87*4882a593Smuzhiyun .reg_bits = 8,
88*4882a593Smuzhiyun .val_bits = 8,
89*4882a593Smuzhiyun .volatile_table = &volatile_regs,
90*4882a593Smuzhiyun .max_register = BD718XX_MAX_REGISTER - 1,
91*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
92*4882a593Smuzhiyun };
93*4882a593Smuzhiyun
bd718xx_init_press_duration(struct bd718xx * bd718xx)94*4882a593Smuzhiyun static int bd718xx_init_press_duration(struct bd718xx *bd718xx)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun struct device* dev = bd718xx->chip.dev;
97*4882a593Smuzhiyun u32 short_press_ms, long_press_ms;
98*4882a593Smuzhiyun u32 short_press_value, long_press_value;
99*4882a593Smuzhiyun int ret;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun ret = of_property_read_u32(dev->of_node, "rohm,short-press-ms",
102*4882a593Smuzhiyun &short_press_ms);
103*4882a593Smuzhiyun if (!ret) {
104*4882a593Smuzhiyun short_press_value = min(15u, (short_press_ms + 250) / 500);
105*4882a593Smuzhiyun ret = regmap_update_bits(bd718xx->chip.regmap,
106*4882a593Smuzhiyun BD718XX_REG_PWRONCONFIG0,
107*4882a593Smuzhiyun BD718XX_PWRBTN_PRESS_DURATION_MASK,
108*4882a593Smuzhiyun short_press_value);
109*4882a593Smuzhiyun if (ret) {
110*4882a593Smuzhiyun dev_err(dev, "Failed to init pwron short press\n");
111*4882a593Smuzhiyun return ret;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun ret = of_property_read_u32(dev->of_node, "rohm,long-press-ms",
116*4882a593Smuzhiyun &long_press_ms);
117*4882a593Smuzhiyun if (!ret) {
118*4882a593Smuzhiyun long_press_value = min(15u, (long_press_ms + 500) / 1000);
119*4882a593Smuzhiyun ret = regmap_update_bits(bd718xx->chip.regmap,
120*4882a593Smuzhiyun BD718XX_REG_PWRONCONFIG1,
121*4882a593Smuzhiyun BD718XX_PWRBTN_PRESS_DURATION_MASK,
122*4882a593Smuzhiyun long_press_value);
123*4882a593Smuzhiyun if (ret) {
124*4882a593Smuzhiyun dev_err(dev, "Failed to init pwron long press\n");
125*4882a593Smuzhiyun return ret;
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun }
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun return 0;
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun
bd718xx_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)132*4882a593Smuzhiyun static int bd718xx_i2c_probe(struct i2c_client *i2c,
133*4882a593Smuzhiyun const struct i2c_device_id *id)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun struct bd718xx *bd718xx;
136*4882a593Smuzhiyun int ret;
137*4882a593Smuzhiyun unsigned int chip_type;
138*4882a593Smuzhiyun struct mfd_cell *mfd;
139*4882a593Smuzhiyun int cells;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun if (!i2c->irq) {
142*4882a593Smuzhiyun dev_err(&i2c->dev, "No IRQ configured\n");
143*4882a593Smuzhiyun return -EINVAL;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun bd718xx = devm_kzalloc(&i2c->dev, sizeof(struct bd718xx), GFP_KERNEL);
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (!bd718xx)
149*4882a593Smuzhiyun return -ENOMEM;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun bd718xx->chip_irq = i2c->irq;
152*4882a593Smuzhiyun chip_type = (unsigned int)(uintptr_t)
153*4882a593Smuzhiyun of_device_get_match_data(&i2c->dev);
154*4882a593Smuzhiyun switch (chip_type) {
155*4882a593Smuzhiyun case ROHM_CHIP_TYPE_BD71837:
156*4882a593Smuzhiyun mfd = bd71837_mfd_cells;
157*4882a593Smuzhiyun cells = ARRAY_SIZE(bd71837_mfd_cells);
158*4882a593Smuzhiyun break;
159*4882a593Smuzhiyun case ROHM_CHIP_TYPE_BD71847:
160*4882a593Smuzhiyun mfd = bd71847_mfd_cells;
161*4882a593Smuzhiyun cells = ARRAY_SIZE(bd71847_mfd_cells);
162*4882a593Smuzhiyun break;
163*4882a593Smuzhiyun default:
164*4882a593Smuzhiyun dev_err(&i2c->dev, "Unknown device type");
165*4882a593Smuzhiyun return -EINVAL;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun bd718xx->chip.dev = &i2c->dev;
168*4882a593Smuzhiyun dev_set_drvdata(&i2c->dev, bd718xx);
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun bd718xx->chip.regmap = devm_regmap_init_i2c(i2c,
171*4882a593Smuzhiyun &bd718xx_regmap_config);
172*4882a593Smuzhiyun if (IS_ERR(bd718xx->chip.regmap)) {
173*4882a593Smuzhiyun dev_err(&i2c->dev, "regmap initialization failed\n");
174*4882a593Smuzhiyun return PTR_ERR(bd718xx->chip.regmap);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun ret = devm_regmap_add_irq_chip(&i2c->dev, bd718xx->chip.regmap,
178*4882a593Smuzhiyun bd718xx->chip_irq, IRQF_ONESHOT, 0,
179*4882a593Smuzhiyun &bd718xx_irq_chip, &bd718xx->irq_data);
180*4882a593Smuzhiyun if (ret) {
181*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to add irq_chip\n");
182*4882a593Smuzhiyun return ret;
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun ret = bd718xx_init_press_duration(bd718xx);
186*4882a593Smuzhiyun if (ret)
187*4882a593Smuzhiyun return ret;
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun ret = regmap_irq_get_virq(bd718xx->irq_data, BD718XX_INT_PWRBTN_S);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun if (ret < 0) {
192*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to get the IRQ\n");
193*4882a593Smuzhiyun return ret;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun button.irq = ret;
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun ret = devm_mfd_add_devices(bd718xx->chip.dev, PLATFORM_DEVID_AUTO,
199*4882a593Smuzhiyun mfd, cells, NULL, 0,
200*4882a593Smuzhiyun regmap_irq_get_domain(bd718xx->irq_data));
201*4882a593Smuzhiyun if (ret)
202*4882a593Smuzhiyun dev_err(&i2c->dev, "Failed to create subdevices\n");
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun static const struct of_device_id bd718xx_of_match[] = {
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun .compatible = "rohm,bd71837",
210*4882a593Smuzhiyun .data = (void *)ROHM_CHIP_TYPE_BD71837,
211*4882a593Smuzhiyun },
212*4882a593Smuzhiyun {
213*4882a593Smuzhiyun .compatible = "rohm,bd71847",
214*4882a593Smuzhiyun .data = (void *)ROHM_CHIP_TYPE_BD71847,
215*4882a593Smuzhiyun },
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun .compatible = "rohm,bd71850",
218*4882a593Smuzhiyun .data = (void *)ROHM_CHIP_TYPE_BD71847,
219*4882a593Smuzhiyun },
220*4882a593Smuzhiyun { }
221*4882a593Smuzhiyun };
222*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, bd718xx_of_match);
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun static struct i2c_driver bd718xx_i2c_driver = {
225*4882a593Smuzhiyun .driver = {
226*4882a593Smuzhiyun .name = "rohm-bd718x7",
227*4882a593Smuzhiyun .of_match_table = bd718xx_of_match,
228*4882a593Smuzhiyun },
229*4882a593Smuzhiyun .probe = bd718xx_i2c_probe,
230*4882a593Smuzhiyun };
231*4882a593Smuzhiyun
bd718xx_i2c_init(void)232*4882a593Smuzhiyun static int __init bd718xx_i2c_init(void)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun return i2c_add_driver(&bd718xx_i2c_driver);
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /* Initialise early so consumer devices can complete system boot */
238*4882a593Smuzhiyun subsys_initcall(bd718xx_i2c_init);
239*4882a593Smuzhiyun
bd718xx_i2c_exit(void)240*4882a593Smuzhiyun static void __exit bd718xx_i2c_exit(void)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun i2c_del_driver(&bd718xx_i2c_driver);
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun module_exit(bd718xx_i2c_exit);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
247*4882a593Smuzhiyun MODULE_DESCRIPTION("ROHM BD71837/BD71847 Power Management IC driver");
248*4882a593Smuzhiyun MODULE_LICENSE("GPL");
249