xref: /OK3568_Linux_fs/kernel/drivers/mfd/qcom_rpm.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2014, Sony Mobile Communications AB.
4*4882a593Smuzhiyun  * Copyright (c) 2013, The Linux Foundation. All rights reserved.
5*4882a593Smuzhiyun  * Author: Bjorn Andersson <bjorn.andersson@sonymobile.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/platform_device.h>
10*4882a593Smuzhiyun #include <linux/of_platform.h>
11*4882a593Smuzhiyun #include <linux/io.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/mfd/qcom_rpm.h>
14*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
15*4882a593Smuzhiyun #include <linux/regmap.h>
16*4882a593Smuzhiyun #include <linux/clk.h>
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <dt-bindings/mfd/qcom-rpm.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun struct qcom_rpm_resource {
21*4882a593Smuzhiyun 	unsigned target_id;
22*4882a593Smuzhiyun 	unsigned status_id;
23*4882a593Smuzhiyun 	unsigned select_id;
24*4882a593Smuzhiyun 	unsigned size;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun struct qcom_rpm_data {
28*4882a593Smuzhiyun 	u32 version;
29*4882a593Smuzhiyun 	const struct qcom_rpm_resource *resource_table;
30*4882a593Smuzhiyun 	unsigned int n_resources;
31*4882a593Smuzhiyun 	unsigned int req_ctx_off;
32*4882a593Smuzhiyun 	unsigned int req_sel_off;
33*4882a593Smuzhiyun 	unsigned int ack_ctx_off;
34*4882a593Smuzhiyun 	unsigned int ack_sel_off;
35*4882a593Smuzhiyun 	unsigned int req_sel_size;
36*4882a593Smuzhiyun 	unsigned int ack_sel_size;
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun struct qcom_rpm {
40*4882a593Smuzhiyun 	struct device *dev;
41*4882a593Smuzhiyun 	struct regmap *ipc_regmap;
42*4882a593Smuzhiyun 	unsigned ipc_offset;
43*4882a593Smuzhiyun 	unsigned ipc_bit;
44*4882a593Smuzhiyun 	struct clk *ramclk;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	struct completion ack;
47*4882a593Smuzhiyun 	struct mutex lock;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	void __iomem *status_regs;
50*4882a593Smuzhiyun 	void __iomem *ctrl_regs;
51*4882a593Smuzhiyun 	void __iomem *req_regs;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	u32 ack_status;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	const struct qcom_rpm_data *data;
56*4882a593Smuzhiyun };
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define RPM_STATUS_REG(rpm, i)	((rpm)->status_regs + (i) * 4)
59*4882a593Smuzhiyun #define RPM_CTRL_REG(rpm, i)	((rpm)->ctrl_regs + (i) * 4)
60*4882a593Smuzhiyun #define RPM_REQ_REG(rpm, i)	((rpm)->req_regs + (i) * 4)
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun #define RPM_REQUEST_TIMEOUT	(5 * HZ)
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun #define RPM_MAX_SEL_SIZE	7
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define RPM_NOTIFICATION	BIT(30)
67*4882a593Smuzhiyun #define RPM_REJECTED		BIT(31)
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun static const struct qcom_rpm_resource apq8064_rpm_resource_table[] = {
70*4882a593Smuzhiyun 	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
71*4882a593Smuzhiyun 	[QCOM_RPM_PXO_CLK] =			{ 26, 10, 6, 1 },
72*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 27, 11, 8, 1 },
73*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 28, 12, 9, 1 },
74*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_CLK] =		{ 29, 13, 10, 1 },
75*4882a593Smuzhiyun 	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 30, 14, 11, 1 },
76*4882a593Smuzhiyun 	[QCOM_RPM_SFPB_CLK] =			{ 31, 15, 12, 1 },
77*4882a593Smuzhiyun 	[QCOM_RPM_CFPB_CLK] =			{ 32, 16, 13, 1 },
78*4882a593Smuzhiyun 	[QCOM_RPM_MMFPB_CLK] =			{ 33, 17, 14, 1 },
79*4882a593Smuzhiyun 	[QCOM_RPM_EBI1_CLK] =			{ 34, 18, 16, 1 },
80*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 35, 19, 18, 1 },
81*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 37, 20, 19, 1 },
82*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 40, 21, 20, 1 },
83*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 41, 22, 21, 12 },
84*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 53, 23, 22, 1 },
85*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 55, 24, 23, 1 },
86*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_IOCTL] =		{ 58, 25, 24, 1 },
87*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 59, 26, 25, 30 },
88*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_HALT] =		{ 89, 27, 26, 1 },
89*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_MODE] =		{ 91, 28, 27, 1 },
90*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_IOCTL] =		{ 94, 29, 28, 1 },
91*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_ARB] =		{ 95, 30, 29, 21 },
92*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS1] =		{ 116, 31, 30, 2 },
93*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS2] =		{ 118, 33, 31, 2 },
94*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS3] =		{ 120, 35, 32, 2 },
95*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS4] =		{ 122, 37, 33, 2 },
96*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS5] =		{ 124, 39, 34, 2 },
97*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS6] =		{ 126, 41, 35, 2 },
98*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS7] =		{ 128, 43, 36, 2 },
99*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS8] =		{ 130, 45, 37, 2 },
100*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO1] =		{ 132, 47, 38, 2 },
101*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO2] =		{ 134, 49, 39, 2 },
102*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO3] =		{ 136, 51, 40, 2 },
103*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO4] =		{ 138, 53, 41, 2 },
104*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO5] =		{ 140, 55, 42, 2 },
105*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO6] =		{ 142, 57, 43, 2 },
106*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO7] =		{ 144, 59, 44, 2 },
107*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO8] =		{ 146, 61, 45, 2 },
108*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO9] =		{ 148, 63, 46, 2 },
109*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO10] =		{ 150, 65, 47, 2 },
110*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO11] =		{ 152, 67, 48, 2 },
111*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO12] =		{ 154, 69, 49, 2 },
112*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO13] =		{ 156, 71, 50, 2 },
113*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO14] =		{ 158, 73, 51, 2 },
114*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO15] =		{ 160, 75, 52, 2 },
115*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO16] =		{ 162, 77, 53, 2 },
116*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO17] =		{ 164, 79, 54, 2 },
117*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO18] =		{ 166, 81, 55, 2 },
118*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO19] =		{ 168, 83, 56, 2 },
119*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO20] =		{ 170, 85, 57, 2 },
120*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO21] =		{ 172, 87, 58, 2 },
121*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO22] =		{ 174, 89, 59, 2 },
122*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO23] =		{ 176, 91, 60, 2 },
123*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO24] =		{ 178, 93, 61, 2 },
124*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO25] =		{ 180, 95, 62, 2 },
125*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO26] =		{ 182, 97, 63, 2 },
126*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO27] =		{ 184, 99, 64, 2 },
127*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO28] =		{ 186, 101, 65, 2 },
128*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO29] =		{ 188, 103, 66, 2 },
129*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_CLK1] =		{ 190, 105, 67, 2 },
130*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_CLK2] =		{ 192, 107, 68, 2 },
131*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS1] =		{ 194, 109, 69, 1 },
132*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS2] =		{ 195, 110, 70, 1 },
133*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS3] =		{ 196, 111, 71, 1 },
134*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS4] =		{ 197, 112, 72, 1 },
135*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS5] =		{ 198, 113, 73, 1 },
136*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS6] =		{ 199, 114, 74, 1 },
137*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS7] =		{ 200, 115, 75, 1 },
138*4882a593Smuzhiyun 	[QCOM_RPM_PM8821_SMPS1] =		{ 201, 116, 76, 2 },
139*4882a593Smuzhiyun 	[QCOM_RPM_PM8821_SMPS2] =		{ 203, 118, 77, 2 },
140*4882a593Smuzhiyun 	[QCOM_RPM_PM8821_LDO1] =		{ 205, 120, 78, 2 },
141*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_NCP] =			{ 207, 122, 80, 2 },
142*4882a593Smuzhiyun 	[QCOM_RPM_CXO_BUFFERS] =		{ 209, 124, 81, 1 },
143*4882a593Smuzhiyun 	[QCOM_RPM_USB_OTG_SWITCH] =		{ 210, 125, 82, 1 },
144*4882a593Smuzhiyun 	[QCOM_RPM_HDMI_SWITCH] =		{ 211, 126, 83, 1 },
145*4882a593Smuzhiyun 	[QCOM_RPM_DDR_DMM] =			{ 212, 127, 84, 2 },
146*4882a593Smuzhiyun 	[QCOM_RPM_QDSS_CLK] =			{ 214, ~0, 7, 1 },
147*4882a593Smuzhiyun 	[QCOM_RPM_VDDMIN_GPIO] =		{ 215, 131, 89, 1 },
148*4882a593Smuzhiyun };
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun static const struct qcom_rpm_data apq8064_template = {
151*4882a593Smuzhiyun 	.version = 3,
152*4882a593Smuzhiyun 	.resource_table = apq8064_rpm_resource_table,
153*4882a593Smuzhiyun 	.n_resources = ARRAY_SIZE(apq8064_rpm_resource_table),
154*4882a593Smuzhiyun 	.req_ctx_off = 3,
155*4882a593Smuzhiyun 	.req_sel_off = 11,
156*4882a593Smuzhiyun 	.ack_ctx_off = 15,
157*4882a593Smuzhiyun 	.ack_sel_off = 23,
158*4882a593Smuzhiyun 	.req_sel_size = 4,
159*4882a593Smuzhiyun 	.ack_sel_size = 7,
160*4882a593Smuzhiyun };
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun static const struct qcom_rpm_resource msm8660_rpm_resource_table[] = {
163*4882a593Smuzhiyun 	[QCOM_RPM_CXO_CLK] =			{ 32, 12, 5, 1 },
164*4882a593Smuzhiyun 	[QCOM_RPM_PXO_CLK] =			{ 33, 13, 6, 1 },
165*4882a593Smuzhiyun 	[QCOM_RPM_PLL_4] =			{ 34, 14, 7, 1 },
166*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 35, 15, 8, 1 },
167*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 36, 16, 9, 1 },
168*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_CLK] =		{ 37, 17, 10, 1 },
169*4882a593Smuzhiyun 	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 38, 18, 11, 1 },
170*4882a593Smuzhiyun 	[QCOM_RPM_SFPB_CLK] =			{ 39, 19, 12, 1 },
171*4882a593Smuzhiyun 	[QCOM_RPM_CFPB_CLK] =			{ 40, 20, 13, 1 },
172*4882a593Smuzhiyun 	[QCOM_RPM_MMFPB_CLK] =			{ 41, 21, 14, 1 },
173*4882a593Smuzhiyun 	[QCOM_RPM_SMI_CLK] =			{ 42, 22, 15, 1 },
174*4882a593Smuzhiyun 	[QCOM_RPM_EBI1_CLK] =			{ 43, 23, 16, 1 },
175*4882a593Smuzhiyun 	[QCOM_RPM_APPS_L2_CACHE_CTL] =		{ 44, 24, 17, 1 },
176*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 45, 25, 18, 2 },
177*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 47, 26, 19, 3 },
178*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 51, 28, 21, 6 },
179*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 63, 29, 22, 2 },
180*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 65, 30, 23, 3 },
181*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 69, 32, 25, 22 },
182*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_HALT] =		{ 105, 33, 26, 2 },
183*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_MODE] =		{ 107, 34, 27, 3 },
184*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_ARB] =		{ 111, 36, 29, 23 },
185*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_SMPS0] =		{ 134, 37, 30, 2 },
186*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_SMPS1] =		{ 136, 39, 31, 2 },
187*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_SMPS2] =		{ 138, 41, 32, 2 },
188*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_SMPS3] =		{ 140, 43, 33, 2 },
189*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_SMPS4] =		{ 142, 45, 34, 2 },
190*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO0] =		{ 144, 47, 35, 2 },
191*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO1] =		{ 146, 49, 36, 2 },
192*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO2] =		{ 148, 51, 37, 2 },
193*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO3] =		{ 150, 53, 38, 2 },
194*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO4] =		{ 152, 55, 39, 2 },
195*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO5] =		{ 154, 57, 40, 2 },
196*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LDO6] =		{ 156, 59, 41, 2 },
197*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LVS0] =		{ 158, 61, 42, 1 },
198*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LVS1] =		{ 159, 62, 43, 1 },
199*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LVS2] =		{ 160, 63, 44, 1 },
200*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_LVS3] =		{ 161, 64, 45, 1 },
201*4882a593Smuzhiyun 	[QCOM_RPM_PM8901_MVS] =			{ 162, 65, 46, 1 },
202*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_SMPS0] =		{ 163, 66, 47, 2 },
203*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_SMPS1] =		{ 165, 68, 48, 2 },
204*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_SMPS2] =		{ 167, 70, 49, 2 },
205*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_SMPS3] =		{ 169, 72, 50, 2 },
206*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_SMPS4] =		{ 171, 74, 51, 2 },
207*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO0] =		{ 173, 76, 52, 2 },
208*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO1] =		{ 175, 78, 53, 2 },
209*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO2] =		{ 177, 80, 54, 2 },
210*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO3] =		{ 179, 82, 55, 2 },
211*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO4] =		{ 181, 84, 56, 2 },
212*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO5] =		{ 183, 86, 57, 2 },
213*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO6] =		{ 185, 88, 58, 2 },
214*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO7] =		{ 187, 90, 59, 2 },
215*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO8] =		{ 189, 92, 60, 2 },
216*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO9] =		{ 191, 94, 61, 2 },
217*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO10] =		{ 193, 96, 62, 2 },
218*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO11] =		{ 195, 98, 63, 2 },
219*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO12] =		{ 197, 100, 64, 2 },
220*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO13] =		{ 199, 102, 65, 2 },
221*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO14] =		{ 201, 104, 66, 2 },
222*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO15] =		{ 203, 106, 67, 2 },
223*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO16] =		{ 205, 108, 68, 2 },
224*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO17] =		{ 207, 110, 69, 2 },
225*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO18] =		{ 209, 112, 70, 2 },
226*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO19] =		{ 211, 114, 71, 2 },
227*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO20] =		{ 213, 116, 72, 2 },
228*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO21] =		{ 215, 118, 73, 2 },
229*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO22] =		{ 217, 120, 74, 2 },
230*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO23] =		{ 219, 122, 75, 2 },
231*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO24] =		{ 221, 124, 76, 2 },
232*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LDO25] =		{ 223, 126, 77, 2 },
233*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LVS0] =		{ 225, 128, 78, 1 },
234*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_LVS1] =		{ 226, 129, 79, 1 },
235*4882a593Smuzhiyun 	[QCOM_RPM_PM8058_NCP] =			{ 227, 130, 80, 2 },
236*4882a593Smuzhiyun 	[QCOM_RPM_CXO_BUFFERS] =		{ 229, 132, 81, 1 },
237*4882a593Smuzhiyun };
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun static const struct qcom_rpm_data msm8660_template = {
240*4882a593Smuzhiyun 	.version = 2,
241*4882a593Smuzhiyun 	.resource_table = msm8660_rpm_resource_table,
242*4882a593Smuzhiyun 	.n_resources = ARRAY_SIZE(msm8660_rpm_resource_table),
243*4882a593Smuzhiyun 	.req_ctx_off = 3,
244*4882a593Smuzhiyun 	.req_sel_off = 11,
245*4882a593Smuzhiyun 	.ack_ctx_off = 19,
246*4882a593Smuzhiyun 	.ack_sel_off = 27,
247*4882a593Smuzhiyun 	.req_sel_size = 7,
248*4882a593Smuzhiyun 	.ack_sel_size = 7,
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun static const struct qcom_rpm_resource msm8960_rpm_resource_table[] = {
252*4882a593Smuzhiyun 	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
253*4882a593Smuzhiyun 	[QCOM_RPM_PXO_CLK] =			{ 26, 10, 6, 1 },
254*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 27, 11, 8, 1 },
255*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 28, 12, 9, 1 },
256*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_CLK] =		{ 29, 13, 10, 1 },
257*4882a593Smuzhiyun 	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 30, 14, 11, 1 },
258*4882a593Smuzhiyun 	[QCOM_RPM_SFPB_CLK] =			{ 31, 15, 12, 1 },
259*4882a593Smuzhiyun 	[QCOM_RPM_CFPB_CLK] =			{ 32, 16, 13, 1 },
260*4882a593Smuzhiyun 	[QCOM_RPM_MMFPB_CLK] =			{ 33, 17, 14, 1 },
261*4882a593Smuzhiyun 	[QCOM_RPM_EBI1_CLK] =			{ 34, 18, 16, 1 },
262*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 35, 19, 18, 1 },
263*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 37, 20, 19, 1 },
264*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 40, 21, 20, 1 },
265*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 41, 22, 21, 12 },
266*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 53, 23, 22, 1 },
267*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 55, 24, 23, 1 },
268*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_IOCTL] =		{ 58, 25, 24, 1 },
269*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 59, 26, 25, 29 },
270*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_HALT] =		{ 88, 27, 26, 1 },
271*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_MODE] =		{ 90, 28, 27, 1 },
272*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_IOCTL] =		{ 93, 29, 28, 1 },
273*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_ARB] =		{ 94, 30, 29, 23 },
274*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS1] =		{ 117, 31, 30, 2 },
275*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS2] =		{ 119, 33, 31, 2 },
276*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS3] =		{ 121, 35, 32, 2 },
277*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS4] =		{ 123, 37, 33, 2 },
278*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS5] =		{ 125, 39, 34, 2 },
279*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS6] =		{ 127, 41, 35, 2 },
280*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS7] =		{ 129, 43, 36, 2 },
281*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_SMPS8] =		{ 131, 45, 37, 2 },
282*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO1] =		{ 133, 47, 38, 2 },
283*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO2] =		{ 135, 49, 39, 2 },
284*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO3] =		{ 137, 51, 40, 2 },
285*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO4] =		{ 139, 53, 41, 2 },
286*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO5] =		{ 141, 55, 42, 2 },
287*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO6] =		{ 143, 57, 43, 2 },
288*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO7] =		{ 145, 59, 44, 2 },
289*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO8] =		{ 147, 61, 45, 2 },
290*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO9] =		{ 149, 63, 46, 2 },
291*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO10] =		{ 151, 65, 47, 2 },
292*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO11] =		{ 153, 67, 48, 2 },
293*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO12] =		{ 155, 69, 49, 2 },
294*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO13] =		{ 157, 71, 50, 2 },
295*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO14] =		{ 159, 73, 51, 2 },
296*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO15] =		{ 161, 75, 52, 2 },
297*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO16] =		{ 163, 77, 53, 2 },
298*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO17] =		{ 165, 79, 54, 2 },
299*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO18] =		{ 167, 81, 55, 2 },
300*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO19] =		{ 169, 83, 56, 2 },
301*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO20] =		{ 171, 85, 57, 2 },
302*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO21] =		{ 173, 87, 58, 2 },
303*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO22] =		{ 175, 89, 59, 2 },
304*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO23] =		{ 177, 91, 60, 2 },
305*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO24] =		{ 179, 93, 61, 2 },
306*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO25] =		{ 181, 95, 62, 2 },
307*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO26] =		{ 183, 97, 63, 2 },
308*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO27] =		{ 185, 99, 64, 2 },
309*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO28] =		{ 187, 101, 65, 2 },
310*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LDO29] =		{ 189, 103, 66, 2 },
311*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_CLK1] =		{ 191, 105, 67, 2 },
312*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_CLK2] =		{ 193, 107, 68, 2 },
313*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS1] =		{ 195, 109, 69, 1 },
314*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS2] =		{ 196, 110, 70, 1 },
315*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS3] =		{ 197, 111, 71, 1 },
316*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS4] =		{ 198, 112, 72, 1 },
317*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS5] =		{ 199, 113, 73, 1 },
318*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS6] =		{ 200, 114, 74, 1 },
319*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_LVS7] =		{ 201, 115, 75, 1 },
320*4882a593Smuzhiyun 	[QCOM_RPM_PM8921_NCP] =			{ 202, 116, 80, 2 },
321*4882a593Smuzhiyun 	[QCOM_RPM_CXO_BUFFERS] =		{ 204, 118, 81, 1 },
322*4882a593Smuzhiyun 	[QCOM_RPM_USB_OTG_SWITCH] =		{ 205, 119, 82, 1 },
323*4882a593Smuzhiyun 	[QCOM_RPM_HDMI_SWITCH] =		{ 206, 120, 83, 1 },
324*4882a593Smuzhiyun 	[QCOM_RPM_DDR_DMM] =			{ 207, 121, 84, 2 },
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun static const struct qcom_rpm_data msm8960_template = {
328*4882a593Smuzhiyun 	.version = 3,
329*4882a593Smuzhiyun 	.resource_table = msm8960_rpm_resource_table,
330*4882a593Smuzhiyun 	.n_resources = ARRAY_SIZE(msm8960_rpm_resource_table),
331*4882a593Smuzhiyun 	.req_ctx_off = 3,
332*4882a593Smuzhiyun 	.req_sel_off = 11,
333*4882a593Smuzhiyun 	.ack_ctx_off = 15,
334*4882a593Smuzhiyun 	.ack_sel_off = 23,
335*4882a593Smuzhiyun 	.req_sel_size = 4,
336*4882a593Smuzhiyun 	.ack_sel_size = 7,
337*4882a593Smuzhiyun };
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun static const struct qcom_rpm_resource ipq806x_rpm_resource_table[] = {
340*4882a593Smuzhiyun 	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
341*4882a593Smuzhiyun 	[QCOM_RPM_PXO_CLK] =			{ 26, 10, 6, 1 },
342*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_CLK] =		{ 27, 11, 8, 1 },
343*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 28, 12, 9, 1 },
344*4882a593Smuzhiyun 	[QCOM_RPM_NSS_FABRIC_0_CLK] =		{ 29, 13, 10, 1 },
345*4882a593Smuzhiyun 	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 30, 14, 11, 1 },
346*4882a593Smuzhiyun 	[QCOM_RPM_SFPB_CLK] =			{ 31, 15, 12, 1 },
347*4882a593Smuzhiyun 	[QCOM_RPM_CFPB_CLK] =			{ 32, 16, 13, 1 },
348*4882a593Smuzhiyun 	[QCOM_RPM_NSS_FABRIC_1_CLK] =		{ 33, 17, 14, 1 },
349*4882a593Smuzhiyun 	[QCOM_RPM_EBI1_CLK] =			{ 34, 18, 16, 1 },
350*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 35, 19, 18, 2 },
351*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 37, 20, 19, 3 },
352*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 40, 21, 20, 1 },
353*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 41, 22, 21, 12 },
354*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_HALT] =		{ 53, 23, 22, 2 },
355*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_MODE] =		{ 55, 24, 23, 3 },
356*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_IOCTL] =		{ 58, 25, 24, 1 },
357*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_ARB] =		{ 59, 26, 25, 30 },
358*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_HALT] =		{ 89, 27, 26, 2 },
359*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_MODE] =		{ 91, 28, 27, 3 },
360*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_IOCTL] =		{ 94, 29, 28, 1 },
361*4882a593Smuzhiyun 	[QCOM_RPM_MM_FABRIC_ARB] =		{ 95, 30, 29, 2 },
362*4882a593Smuzhiyun 	[QCOM_RPM_CXO_BUFFERS] =		{ 209, 33, 31, 1 },
363*4882a593Smuzhiyun 	[QCOM_RPM_USB_OTG_SWITCH] =		{ 210, 34, 32, 1 },
364*4882a593Smuzhiyun 	[QCOM_RPM_HDMI_SWITCH] =		{ 211, 35, 33, 1 },
365*4882a593Smuzhiyun 	[QCOM_RPM_DDR_DMM] =			{ 212, 36, 34, 2 },
366*4882a593Smuzhiyun 	[QCOM_RPM_VDDMIN_GPIO] =		{ 215, 40, 39, 1 },
367*4882a593Smuzhiyun 	[QCOM_RPM_SMB208_S1a] =			{ 216, 41, 90, 2 },
368*4882a593Smuzhiyun 	[QCOM_RPM_SMB208_S1b] =			{ 218, 43, 91, 2 },
369*4882a593Smuzhiyun 	[QCOM_RPM_SMB208_S2a] =			{ 220, 45, 92, 2 },
370*4882a593Smuzhiyun 	[QCOM_RPM_SMB208_S2b] =			{ 222, 47, 93, 2 },
371*4882a593Smuzhiyun };
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun static const struct qcom_rpm_data ipq806x_template = {
374*4882a593Smuzhiyun 	.version = 3,
375*4882a593Smuzhiyun 	.resource_table = ipq806x_rpm_resource_table,
376*4882a593Smuzhiyun 	.n_resources = ARRAY_SIZE(ipq806x_rpm_resource_table),
377*4882a593Smuzhiyun 	.req_ctx_off = 3,
378*4882a593Smuzhiyun 	.req_sel_off = 11,
379*4882a593Smuzhiyun 	.ack_ctx_off = 15,
380*4882a593Smuzhiyun 	.ack_sel_off = 23,
381*4882a593Smuzhiyun 	.req_sel_size = 4,
382*4882a593Smuzhiyun 	.ack_sel_size = 7,
383*4882a593Smuzhiyun };
384*4882a593Smuzhiyun 
385*4882a593Smuzhiyun static const struct qcom_rpm_resource mdm9615_rpm_resource_table[] = {
386*4882a593Smuzhiyun 	[QCOM_RPM_CXO_CLK] =			{ 25, 9, 5, 1 },
387*4882a593Smuzhiyun 	[QCOM_RPM_SYS_FABRIC_CLK] =		{ 26, 10, 9, 1 },
388*4882a593Smuzhiyun 	[QCOM_RPM_DAYTONA_FABRIC_CLK] =		{ 27, 11, 11, 1 },
389*4882a593Smuzhiyun 	[QCOM_RPM_SFPB_CLK] =			{ 28, 12, 12, 1 },
390*4882a593Smuzhiyun 	[QCOM_RPM_CFPB_CLK] =			{ 29, 13, 13, 1 },
391*4882a593Smuzhiyun 	[QCOM_RPM_EBI1_CLK] =			{ 30, 14, 16, 1 },
392*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_HALT] =		{ 31, 15, 22, 2 },
393*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_MODE] =		{ 33, 16, 23, 3 },
394*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_IOCTL] =		{ 36, 17, 24, 1 },
395*4882a593Smuzhiyun 	[QCOM_RPM_APPS_FABRIC_ARB] =		{ 37, 18, 25, 27 },
396*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_SMPS1] =		{ 64, 19, 30, 2 },
397*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_SMPS2] =		{ 66, 21, 31, 2 },
398*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_SMPS3] =		{ 68, 23, 32, 2 },
399*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_SMPS4] =		{ 70, 25, 33, 2 },
400*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_SMPS5] =		{ 72, 27, 34, 2 },
401*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO1] =		{ 74, 29, 35, 2 },
402*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO2] =		{ 76, 31, 36, 2 },
403*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO3] =		{ 78, 33, 37, 2 },
404*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO4] =		{ 80, 35, 38, 2 },
405*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO5] =		{ 82, 37, 39, 2 },
406*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO6] =		{ 84, 39, 40, 2 },
407*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO7] =		{ 86, 41, 41, 2 },
408*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO8] =		{ 88, 43, 42, 2 },
409*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO9] =		{ 90, 45, 43, 2 },
410*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO10] =		{ 92, 47, 44, 2 },
411*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO11] =		{ 94, 49, 45, 2 },
412*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO12] =		{ 96, 51, 46, 2 },
413*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO13] =		{ 98, 53, 47, 2 },
414*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LDO14] =		{ 100, 55, 48, 2 },
415*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_LVS1] =		{ 102, 57, 49, 1 },
416*4882a593Smuzhiyun 	[QCOM_RPM_PM8018_NCP] =			{ 103, 58, 80, 2 },
417*4882a593Smuzhiyun 	[QCOM_RPM_CXO_BUFFERS] =		{ 105, 60, 81, 1 },
418*4882a593Smuzhiyun 	[QCOM_RPM_USB_OTG_SWITCH] =		{ 106, 61, 82, 1 },
419*4882a593Smuzhiyun 	[QCOM_RPM_HDMI_SWITCH] =		{ 107, 62, 83, 1 },
420*4882a593Smuzhiyun 	[QCOM_RPM_VOLTAGE_CORNER] =		{ 109, 64, 87, 1 },
421*4882a593Smuzhiyun };
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun static const struct qcom_rpm_data mdm9615_template = {
424*4882a593Smuzhiyun 	.version = 3,
425*4882a593Smuzhiyun 	.resource_table = mdm9615_rpm_resource_table,
426*4882a593Smuzhiyun 	.n_resources = ARRAY_SIZE(mdm9615_rpm_resource_table),
427*4882a593Smuzhiyun 	.req_ctx_off = 3,
428*4882a593Smuzhiyun 	.req_sel_off = 11,
429*4882a593Smuzhiyun 	.ack_ctx_off = 15,
430*4882a593Smuzhiyun 	.ack_sel_off = 23,
431*4882a593Smuzhiyun 	.req_sel_size = 4,
432*4882a593Smuzhiyun 	.ack_sel_size = 7,
433*4882a593Smuzhiyun };
434*4882a593Smuzhiyun 
435*4882a593Smuzhiyun static const struct of_device_id qcom_rpm_of_match[] = {
436*4882a593Smuzhiyun 	{ .compatible = "qcom,rpm-apq8064", .data = &apq8064_template },
437*4882a593Smuzhiyun 	{ .compatible = "qcom,rpm-msm8660", .data = &msm8660_template },
438*4882a593Smuzhiyun 	{ .compatible = "qcom,rpm-msm8960", .data = &msm8960_template },
439*4882a593Smuzhiyun 	{ .compatible = "qcom,rpm-ipq8064", .data = &ipq806x_template },
440*4882a593Smuzhiyun 	{ .compatible = "qcom,rpm-mdm9615", .data = &mdm9615_template },
441*4882a593Smuzhiyun 	{ }
442*4882a593Smuzhiyun };
443*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, qcom_rpm_of_match);
444*4882a593Smuzhiyun 
qcom_rpm_write(struct qcom_rpm * rpm,int state,int resource,u32 * buf,size_t count)445*4882a593Smuzhiyun int qcom_rpm_write(struct qcom_rpm *rpm,
446*4882a593Smuzhiyun 		   int state,
447*4882a593Smuzhiyun 		   int resource,
448*4882a593Smuzhiyun 		   u32 *buf, size_t count)
449*4882a593Smuzhiyun {
450*4882a593Smuzhiyun 	const struct qcom_rpm_resource *res;
451*4882a593Smuzhiyun 	const struct qcom_rpm_data *data = rpm->data;
452*4882a593Smuzhiyun 	u32 sel_mask[RPM_MAX_SEL_SIZE] = { 0 };
453*4882a593Smuzhiyun 	int left;
454*4882a593Smuzhiyun 	int ret = 0;
455*4882a593Smuzhiyun 	int i;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (WARN_ON(resource < 0 || resource >= data->n_resources))
458*4882a593Smuzhiyun 		return -EINVAL;
459*4882a593Smuzhiyun 
460*4882a593Smuzhiyun 	res = &data->resource_table[resource];
461*4882a593Smuzhiyun 	if (WARN_ON(res->size != count))
462*4882a593Smuzhiyun 		return -EINVAL;
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	mutex_lock(&rpm->lock);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	for (i = 0; i < res->size; i++)
467*4882a593Smuzhiyun 		writel_relaxed(buf[i], RPM_REQ_REG(rpm, res->target_id + i));
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	bitmap_set((unsigned long *)sel_mask, res->select_id, 1);
470*4882a593Smuzhiyun 	for (i = 0; i < rpm->data->req_sel_size; i++) {
471*4882a593Smuzhiyun 		writel_relaxed(sel_mask[i],
472*4882a593Smuzhiyun 			       RPM_CTRL_REG(rpm, rpm->data->req_sel_off + i));
473*4882a593Smuzhiyun 	}
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	writel_relaxed(BIT(state), RPM_CTRL_REG(rpm, rpm->data->req_ctx_off));
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	reinit_completion(&rpm->ack);
478*4882a593Smuzhiyun 	regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 	left = wait_for_completion_timeout(&rpm->ack, RPM_REQUEST_TIMEOUT);
481*4882a593Smuzhiyun 	if (!left)
482*4882a593Smuzhiyun 		ret = -ETIMEDOUT;
483*4882a593Smuzhiyun 	else if (rpm->ack_status & RPM_REJECTED)
484*4882a593Smuzhiyun 		ret = -EIO;
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	mutex_unlock(&rpm->lock);
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	return ret;
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun EXPORT_SYMBOL(qcom_rpm_write);
491*4882a593Smuzhiyun 
qcom_rpm_ack_interrupt(int irq,void * dev)492*4882a593Smuzhiyun static irqreturn_t qcom_rpm_ack_interrupt(int irq, void *dev)
493*4882a593Smuzhiyun {
494*4882a593Smuzhiyun 	struct qcom_rpm *rpm = dev;
495*4882a593Smuzhiyun 	u32 ack;
496*4882a593Smuzhiyun 	int i;
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 	ack = readl_relaxed(RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
499*4882a593Smuzhiyun 	for (i = 0; i < rpm->data->ack_sel_size; i++)
500*4882a593Smuzhiyun 		writel_relaxed(0,
501*4882a593Smuzhiyun 			RPM_CTRL_REG(rpm, rpm->data->ack_sel_off + i));
502*4882a593Smuzhiyun 	writel(0, RPM_CTRL_REG(rpm, rpm->data->ack_ctx_off));
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	if (ack & RPM_NOTIFICATION) {
505*4882a593Smuzhiyun 		dev_warn(rpm->dev, "ignoring notification!\n");
506*4882a593Smuzhiyun 	} else {
507*4882a593Smuzhiyun 		rpm->ack_status = ack;
508*4882a593Smuzhiyun 		complete(&rpm->ack);
509*4882a593Smuzhiyun 	}
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	return IRQ_HANDLED;
512*4882a593Smuzhiyun }
513*4882a593Smuzhiyun 
qcom_rpm_err_interrupt(int irq,void * dev)514*4882a593Smuzhiyun static irqreturn_t qcom_rpm_err_interrupt(int irq, void *dev)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun 	struct qcom_rpm *rpm = dev;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	regmap_write(rpm->ipc_regmap, rpm->ipc_offset, BIT(rpm->ipc_bit));
519*4882a593Smuzhiyun 	dev_err(rpm->dev, "RPM triggered fatal error\n");
520*4882a593Smuzhiyun 
521*4882a593Smuzhiyun 	return IRQ_HANDLED;
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun 
qcom_rpm_wakeup_interrupt(int irq,void * dev)524*4882a593Smuzhiyun static irqreturn_t qcom_rpm_wakeup_interrupt(int irq, void *dev)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	return IRQ_HANDLED;
527*4882a593Smuzhiyun }
528*4882a593Smuzhiyun 
qcom_rpm_probe(struct platform_device * pdev)529*4882a593Smuzhiyun static int qcom_rpm_probe(struct platform_device *pdev)
530*4882a593Smuzhiyun {
531*4882a593Smuzhiyun 	const struct of_device_id *match;
532*4882a593Smuzhiyun 	struct device_node *syscon_np;
533*4882a593Smuzhiyun 	struct resource *res;
534*4882a593Smuzhiyun 	struct qcom_rpm *rpm;
535*4882a593Smuzhiyun 	u32 fw_version[3];
536*4882a593Smuzhiyun 	int irq_wakeup;
537*4882a593Smuzhiyun 	int irq_ack;
538*4882a593Smuzhiyun 	int irq_err;
539*4882a593Smuzhiyun 	int ret;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun 	rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
542*4882a593Smuzhiyun 	if (!rpm)
543*4882a593Smuzhiyun 		return -ENOMEM;
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 	rpm->dev = &pdev->dev;
546*4882a593Smuzhiyun 	mutex_init(&rpm->lock);
547*4882a593Smuzhiyun 	init_completion(&rpm->ack);
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	/* Enable message RAM clock */
550*4882a593Smuzhiyun 	rpm->ramclk = devm_clk_get(&pdev->dev, "ram");
551*4882a593Smuzhiyun 	if (IS_ERR(rpm->ramclk)) {
552*4882a593Smuzhiyun 		ret = PTR_ERR(rpm->ramclk);
553*4882a593Smuzhiyun 		if (ret == -EPROBE_DEFER)
554*4882a593Smuzhiyun 			return ret;
555*4882a593Smuzhiyun 		/*
556*4882a593Smuzhiyun 		 * Fall through in all other cases, as the clock is
557*4882a593Smuzhiyun 		 * optional. (Does not exist on all platforms.)
558*4882a593Smuzhiyun 		 */
559*4882a593Smuzhiyun 		rpm->ramclk = NULL;
560*4882a593Smuzhiyun 	}
561*4882a593Smuzhiyun 	clk_prepare_enable(rpm->ramclk); /* Accepts NULL */
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	irq_ack = platform_get_irq_byname(pdev, "ack");
564*4882a593Smuzhiyun 	if (irq_ack < 0)
565*4882a593Smuzhiyun 		return irq_ack;
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	irq_err = platform_get_irq_byname(pdev, "err");
568*4882a593Smuzhiyun 	if (irq_err < 0)
569*4882a593Smuzhiyun 		return irq_err;
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun 	irq_wakeup = platform_get_irq_byname(pdev, "wakeup");
572*4882a593Smuzhiyun 	if (irq_wakeup < 0)
573*4882a593Smuzhiyun 		return irq_wakeup;
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	match = of_match_device(qcom_rpm_of_match, &pdev->dev);
576*4882a593Smuzhiyun 	if (!match)
577*4882a593Smuzhiyun 		return -ENODEV;
578*4882a593Smuzhiyun 	rpm->data = match->data;
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
581*4882a593Smuzhiyun 	rpm->status_regs = devm_ioremap_resource(&pdev->dev, res);
582*4882a593Smuzhiyun 	if (IS_ERR(rpm->status_regs))
583*4882a593Smuzhiyun 		return PTR_ERR(rpm->status_regs);
584*4882a593Smuzhiyun 	rpm->ctrl_regs = rpm->status_regs + 0x400;
585*4882a593Smuzhiyun 	rpm->req_regs = rpm->status_regs + 0x600;
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun 	syscon_np = of_parse_phandle(pdev->dev.of_node, "qcom,ipc", 0);
588*4882a593Smuzhiyun 	if (!syscon_np) {
589*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no qcom,ipc node\n");
590*4882a593Smuzhiyun 		return -ENODEV;
591*4882a593Smuzhiyun 	}
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	rpm->ipc_regmap = syscon_node_to_regmap(syscon_np);
594*4882a593Smuzhiyun 	of_node_put(syscon_np);
595*4882a593Smuzhiyun 	if (IS_ERR(rpm->ipc_regmap))
596*4882a593Smuzhiyun 		return PTR_ERR(rpm->ipc_regmap);
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 1,
599*4882a593Smuzhiyun 					 &rpm->ipc_offset);
600*4882a593Smuzhiyun 	if (ret < 0) {
601*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no offset in qcom,ipc\n");
602*4882a593Smuzhiyun 		return -EINVAL;
603*4882a593Smuzhiyun 	}
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	ret = of_property_read_u32_index(pdev->dev.of_node, "qcom,ipc", 2,
606*4882a593Smuzhiyun 					 &rpm->ipc_bit);
607*4882a593Smuzhiyun 	if (ret < 0) {
608*4882a593Smuzhiyun 		dev_err(&pdev->dev, "no bit in qcom,ipc\n");
609*4882a593Smuzhiyun 		return -EINVAL;
610*4882a593Smuzhiyun 	}
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun 	dev_set_drvdata(&pdev->dev, rpm);
613*4882a593Smuzhiyun 
614*4882a593Smuzhiyun 	fw_version[0] = readl(RPM_STATUS_REG(rpm, 0));
615*4882a593Smuzhiyun 	fw_version[1] = readl(RPM_STATUS_REG(rpm, 1));
616*4882a593Smuzhiyun 	fw_version[2] = readl(RPM_STATUS_REG(rpm, 2));
617*4882a593Smuzhiyun 	if (fw_version[0] != rpm->data->version) {
618*4882a593Smuzhiyun 		dev_err(&pdev->dev,
619*4882a593Smuzhiyun 			"RPM version %u.%u.%u incompatible with driver version %u",
620*4882a593Smuzhiyun 			fw_version[0],
621*4882a593Smuzhiyun 			fw_version[1],
622*4882a593Smuzhiyun 			fw_version[2],
623*4882a593Smuzhiyun 			rpm->data->version);
624*4882a593Smuzhiyun 		return -EFAULT;
625*4882a593Smuzhiyun 	}
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	writel(fw_version[0], RPM_CTRL_REG(rpm, 0));
628*4882a593Smuzhiyun 	writel(fw_version[1], RPM_CTRL_REG(rpm, 1));
629*4882a593Smuzhiyun 	writel(fw_version[2], RPM_CTRL_REG(rpm, 2));
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	dev_info(&pdev->dev, "RPM firmware %u.%u.%u\n", fw_version[0],
632*4882a593Smuzhiyun 							fw_version[1],
633*4882a593Smuzhiyun 							fw_version[2]);
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	ret = devm_request_irq(&pdev->dev,
636*4882a593Smuzhiyun 			       irq_ack,
637*4882a593Smuzhiyun 			       qcom_rpm_ack_interrupt,
638*4882a593Smuzhiyun 			       IRQF_TRIGGER_RISING,
639*4882a593Smuzhiyun 			       "qcom_rpm_ack",
640*4882a593Smuzhiyun 			       rpm);
641*4882a593Smuzhiyun 	if (ret) {
642*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to request ack interrupt\n");
643*4882a593Smuzhiyun 		return ret;
644*4882a593Smuzhiyun 	}
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	ret = irq_set_irq_wake(irq_ack, 1);
647*4882a593Smuzhiyun 	if (ret)
648*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "failed to mark ack irq as wakeup\n");
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	ret = devm_request_irq(&pdev->dev,
651*4882a593Smuzhiyun 			       irq_err,
652*4882a593Smuzhiyun 			       qcom_rpm_err_interrupt,
653*4882a593Smuzhiyun 			       IRQF_TRIGGER_RISING,
654*4882a593Smuzhiyun 			       "qcom_rpm_err",
655*4882a593Smuzhiyun 			       rpm);
656*4882a593Smuzhiyun 	if (ret) {
657*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to request err interrupt\n");
658*4882a593Smuzhiyun 		return ret;
659*4882a593Smuzhiyun 	}
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	ret = devm_request_irq(&pdev->dev,
662*4882a593Smuzhiyun 			       irq_wakeup,
663*4882a593Smuzhiyun 			       qcom_rpm_wakeup_interrupt,
664*4882a593Smuzhiyun 			       IRQF_TRIGGER_RISING,
665*4882a593Smuzhiyun 			       "qcom_rpm_wakeup",
666*4882a593Smuzhiyun 			       rpm);
667*4882a593Smuzhiyun 	if (ret) {
668*4882a593Smuzhiyun 		dev_err(&pdev->dev, "failed to request wakeup interrupt\n");
669*4882a593Smuzhiyun 		return ret;
670*4882a593Smuzhiyun 	}
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	ret = irq_set_irq_wake(irq_wakeup, 1);
673*4882a593Smuzhiyun 	if (ret)
674*4882a593Smuzhiyun 		dev_warn(&pdev->dev, "failed to mark wakeup irq as wakeup\n");
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
677*4882a593Smuzhiyun }
678*4882a593Smuzhiyun 
qcom_rpm_remove(struct platform_device * pdev)679*4882a593Smuzhiyun static int qcom_rpm_remove(struct platform_device *pdev)
680*4882a593Smuzhiyun {
681*4882a593Smuzhiyun 	struct qcom_rpm *rpm = dev_get_drvdata(&pdev->dev);
682*4882a593Smuzhiyun 
683*4882a593Smuzhiyun 	of_platform_depopulate(&pdev->dev);
684*4882a593Smuzhiyun 	clk_disable_unprepare(rpm->ramclk);
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	return 0;
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun static struct platform_driver qcom_rpm_driver = {
690*4882a593Smuzhiyun 	.probe = qcom_rpm_probe,
691*4882a593Smuzhiyun 	.remove = qcom_rpm_remove,
692*4882a593Smuzhiyun 	.driver  = {
693*4882a593Smuzhiyun 		.name  = "qcom_rpm",
694*4882a593Smuzhiyun 		.of_match_table = qcom_rpm_of_match,
695*4882a593Smuzhiyun 	},
696*4882a593Smuzhiyun };
697*4882a593Smuzhiyun 
qcom_rpm_init(void)698*4882a593Smuzhiyun static int __init qcom_rpm_init(void)
699*4882a593Smuzhiyun {
700*4882a593Smuzhiyun 	return platform_driver_register(&qcom_rpm_driver);
701*4882a593Smuzhiyun }
702*4882a593Smuzhiyun arch_initcall(qcom_rpm_init);
703*4882a593Smuzhiyun 
qcom_rpm_exit(void)704*4882a593Smuzhiyun static void __exit qcom_rpm_exit(void)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun 	platform_driver_unregister(&qcom_rpm_driver);
707*4882a593Smuzhiyun }
708*4882a593Smuzhiyun module_exit(qcom_rpm_exit)
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun MODULE_DESCRIPTION("Qualcomm Resource Power Manager driver");
711*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
712*4882a593Smuzhiyun MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@sonymobile.com>");
713