1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /* NXP PCF50633 GPIO Driver
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * (C) 2006-2008 by Openmoko, Inc.
5*4882a593Smuzhiyun * Author: Balaji Rao <balajirrao@openmoko.org>
6*4882a593Smuzhiyun * All rights reserved.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Broken down from monstrous PCF50633 driver mainly by
9*4882a593Smuzhiyun * Harald Welte, Andy Green and Werner Almesberger
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/kernel.h>
13*4882a593Smuzhiyun #include <linux/module.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include <linux/mfd/pcf50633/core.h>
16*4882a593Smuzhiyun #include <linux/mfd/pcf50633/gpio.h>
17*4882a593Smuzhiyun #include <linux/mfd/pcf50633/pmic.h>
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun static const u8 pcf50633_regulator_registers[PCF50633_NUM_REGULATORS] = {
20*4882a593Smuzhiyun [PCF50633_REGULATOR_AUTO] = PCF50633_REG_AUTOOUT,
21*4882a593Smuzhiyun [PCF50633_REGULATOR_DOWN1] = PCF50633_REG_DOWN1OUT,
22*4882a593Smuzhiyun [PCF50633_REGULATOR_DOWN2] = PCF50633_REG_DOWN2OUT,
23*4882a593Smuzhiyun [PCF50633_REGULATOR_MEMLDO] = PCF50633_REG_MEMLDOOUT,
24*4882a593Smuzhiyun [PCF50633_REGULATOR_LDO1] = PCF50633_REG_LDO1OUT,
25*4882a593Smuzhiyun [PCF50633_REGULATOR_LDO2] = PCF50633_REG_LDO2OUT,
26*4882a593Smuzhiyun [PCF50633_REGULATOR_LDO3] = PCF50633_REG_LDO3OUT,
27*4882a593Smuzhiyun [PCF50633_REGULATOR_LDO4] = PCF50633_REG_LDO4OUT,
28*4882a593Smuzhiyun [PCF50633_REGULATOR_LDO5] = PCF50633_REG_LDO5OUT,
29*4882a593Smuzhiyun [PCF50633_REGULATOR_LDO6] = PCF50633_REG_LDO6OUT,
30*4882a593Smuzhiyun [PCF50633_REGULATOR_HCLDO] = PCF50633_REG_HCLDOOUT,
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun
pcf50633_gpio_set(struct pcf50633 * pcf,int gpio,u8 val)33*4882a593Smuzhiyun int pcf50633_gpio_set(struct pcf50633 *pcf, int gpio, u8 val)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun u8 reg;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun return pcf50633_reg_set_bit_mask(pcf, reg, 0x07, val);
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pcf50633_gpio_set);
42*4882a593Smuzhiyun
pcf50633_gpio_get(struct pcf50633 * pcf,int gpio)43*4882a593Smuzhiyun u8 pcf50633_gpio_get(struct pcf50633 *pcf, int gpio)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun u8 reg, val;
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
48*4882a593Smuzhiyun val = pcf50633_reg_read(pcf, reg) & 0x07;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun return val;
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pcf50633_gpio_get);
53*4882a593Smuzhiyun
pcf50633_gpio_invert_set(struct pcf50633 * pcf,int gpio,int invert)54*4882a593Smuzhiyun int pcf50633_gpio_invert_set(struct pcf50633 *pcf, int gpio, int invert)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun u8 val, reg;
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
59*4882a593Smuzhiyun val = !!invert << 3;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun return pcf50633_reg_set_bit_mask(pcf, reg, 1 << 3, val);
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_set);
64*4882a593Smuzhiyun
pcf50633_gpio_invert_get(struct pcf50633 * pcf,int gpio)65*4882a593Smuzhiyun int pcf50633_gpio_invert_get(struct pcf50633 *pcf, int gpio)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun u8 reg, val;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
70*4882a593Smuzhiyun val = pcf50633_reg_read(pcf, reg);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return val & (1 << 3);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pcf50633_gpio_invert_get);
75*4882a593Smuzhiyun
pcf50633_gpio_power_supply_set(struct pcf50633 * pcf,int gpio,int regulator,int on)76*4882a593Smuzhiyun int pcf50633_gpio_power_supply_set(struct pcf50633 *pcf,
77*4882a593Smuzhiyun int gpio, int regulator, int on)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun u8 reg, val, mask;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun /* the *ENA register is always one after the *OUT register */
82*4882a593Smuzhiyun reg = pcf50633_regulator_registers[regulator] + 1;
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun val = !!on << (gpio - PCF50633_GPIO1);
85*4882a593Smuzhiyun mask = 1 << (gpio - PCF50633_GPIO1);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun return pcf50633_reg_set_bit_mask(pcf, reg, mask, val);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(pcf50633_gpio_power_supply_set);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun MODULE_LICENSE("GPL");
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