xref: /OK3568_Linux_fs/kernel/drivers/mfd/max8997.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max8997.c - mfd core driver for the Maxim 8966 and 8997
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2011 Samsung Electronics
6*4882a593Smuzhiyun // MyungJoo Ham <myungjoo.ham@samsung.com>
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // This driver is based on max8998.c
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/err.h>
11*4882a593Smuzhiyun #include <linux/slab.h>
12*4882a593Smuzhiyun #include <linux/i2c.h>
13*4882a593Smuzhiyun #include <linux/of.h>
14*4882a593Smuzhiyun #include <linux/of_irq.h>
15*4882a593Smuzhiyun #include <linux/interrupt.h>
16*4882a593Smuzhiyun #include <linux/pm_runtime.h>
17*4882a593Smuzhiyun #include <linux/init.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <linux/mfd/core.h>
20*4882a593Smuzhiyun #include <linux/mfd/max8997.h>
21*4882a593Smuzhiyun #include <linux/mfd/max8997-private.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define I2C_ADDR_PMIC	(0xCC >> 1)
24*4882a593Smuzhiyun #define I2C_ADDR_MUIC	(0x4A >> 1)
25*4882a593Smuzhiyun #define I2C_ADDR_BATTERY	(0x6C >> 1)
26*4882a593Smuzhiyun #define I2C_ADDR_RTC	(0x0C >> 1)
27*4882a593Smuzhiyun #define I2C_ADDR_HAPTIC	(0x90 >> 1)
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun static const struct mfd_cell max8997_devs[] = {
30*4882a593Smuzhiyun 	{ .name = "max8997-pmic", },
31*4882a593Smuzhiyun 	{ .name = "max8997-rtc", },
32*4882a593Smuzhiyun 	{ .name = "max8997-battery", },
33*4882a593Smuzhiyun 	{ .name = "max8997-haptic", },
34*4882a593Smuzhiyun 	{ .name = "max8997-muic", },
35*4882a593Smuzhiyun 	{ .name = "max8997-led", .id = 1 },
36*4882a593Smuzhiyun 	{ .name = "max8997-led", .id = 2 },
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun 
39*4882a593Smuzhiyun #ifdef CONFIG_OF
40*4882a593Smuzhiyun static const struct of_device_id max8997_pmic_dt_match[] = {
41*4882a593Smuzhiyun 	{ .compatible = "maxim,max8997-pmic", .data = (void *)TYPE_MAX8997 },
42*4882a593Smuzhiyun 	{},
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun #endif
45*4882a593Smuzhiyun 
max8997_read_reg(struct i2c_client * i2c,u8 reg,u8 * dest)46*4882a593Smuzhiyun int max8997_read_reg(struct i2c_client *i2c, u8 reg, u8 *dest)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
49*4882a593Smuzhiyun 	int ret;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	mutex_lock(&max8997->iolock);
52*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(i2c, reg);
53*4882a593Smuzhiyun 	mutex_unlock(&max8997->iolock);
54*4882a593Smuzhiyun 	if (ret < 0)
55*4882a593Smuzhiyun 		return ret;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	ret &= 0xff;
58*4882a593Smuzhiyun 	*dest = ret;
59*4882a593Smuzhiyun 	return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(max8997_read_reg);
62*4882a593Smuzhiyun 
max8997_bulk_read(struct i2c_client * i2c,u8 reg,int count,u8 * buf)63*4882a593Smuzhiyun int max8997_bulk_read(struct i2c_client *i2c, u8 reg, int count, u8 *buf)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
66*4882a593Smuzhiyun 	int ret;
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	mutex_lock(&max8997->iolock);
69*4882a593Smuzhiyun 	ret = i2c_smbus_read_i2c_block_data(i2c, reg, count, buf);
70*4882a593Smuzhiyun 	mutex_unlock(&max8997->iolock);
71*4882a593Smuzhiyun 	if (ret < 0)
72*4882a593Smuzhiyun 		return ret;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(max8997_bulk_read);
77*4882a593Smuzhiyun 
max8997_write_reg(struct i2c_client * i2c,u8 reg,u8 value)78*4882a593Smuzhiyun int max8997_write_reg(struct i2c_client *i2c, u8 reg, u8 value)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
81*4882a593Smuzhiyun 	int ret;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	mutex_lock(&max8997->iolock);
84*4882a593Smuzhiyun 	ret = i2c_smbus_write_byte_data(i2c, reg, value);
85*4882a593Smuzhiyun 	mutex_unlock(&max8997->iolock);
86*4882a593Smuzhiyun 	return ret;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(max8997_write_reg);
89*4882a593Smuzhiyun 
max8997_bulk_write(struct i2c_client * i2c,u8 reg,int count,u8 * buf)90*4882a593Smuzhiyun int max8997_bulk_write(struct i2c_client *i2c, u8 reg, int count, u8 *buf)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
93*4882a593Smuzhiyun 	int ret;
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	mutex_lock(&max8997->iolock);
96*4882a593Smuzhiyun 	ret = i2c_smbus_write_i2c_block_data(i2c, reg, count, buf);
97*4882a593Smuzhiyun 	mutex_unlock(&max8997->iolock);
98*4882a593Smuzhiyun 	if (ret < 0)
99*4882a593Smuzhiyun 		return ret;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	return 0;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(max8997_bulk_write);
104*4882a593Smuzhiyun 
max8997_update_reg(struct i2c_client * i2c,u8 reg,u8 val,u8 mask)105*4882a593Smuzhiyun int max8997_update_reg(struct i2c_client *i2c, u8 reg, u8 val, u8 mask)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
108*4882a593Smuzhiyun 	int ret;
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	mutex_lock(&max8997->iolock);
111*4882a593Smuzhiyun 	ret = i2c_smbus_read_byte_data(i2c, reg);
112*4882a593Smuzhiyun 	if (ret >= 0) {
113*4882a593Smuzhiyun 		u8 old_val = ret & 0xff;
114*4882a593Smuzhiyun 		u8 new_val = (val & mask) | (old_val & (~mask));
115*4882a593Smuzhiyun 		ret = i2c_smbus_write_byte_data(i2c, reg, new_val);
116*4882a593Smuzhiyun 	}
117*4882a593Smuzhiyun 	mutex_unlock(&max8997->iolock);
118*4882a593Smuzhiyun 	return ret;
119*4882a593Smuzhiyun }
120*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(max8997_update_reg);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun /*
123*4882a593Smuzhiyun  * Only the common platform data elements for max8997 are parsed here from the
124*4882a593Smuzhiyun  * device tree. Other sub-modules of max8997 such as pmic, rtc and others have
125*4882a593Smuzhiyun  * to parse their own platform data elements from device tree.
126*4882a593Smuzhiyun  *
127*4882a593Smuzhiyun  * The max8997 platform data structure is instantiated here and the drivers for
128*4882a593Smuzhiyun  * the sub-modules need not instantiate another instance while parsing their
129*4882a593Smuzhiyun  * platform data.
130*4882a593Smuzhiyun  */
max8997_i2c_parse_dt_pdata(struct device * dev)131*4882a593Smuzhiyun static struct max8997_platform_data *max8997_i2c_parse_dt_pdata(
132*4882a593Smuzhiyun 					struct device *dev)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	struct max8997_platform_data *pd;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
137*4882a593Smuzhiyun 	if (!pd)
138*4882a593Smuzhiyun 		return ERR_PTR(-ENOMEM);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	pd->ono = irq_of_parse_and_map(dev->of_node, 1);
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	return pd;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
max8997_i2c_get_driver_data(struct i2c_client * i2c,const struct i2c_device_id * id)145*4882a593Smuzhiyun static inline unsigned long max8997_i2c_get_driver_data(struct i2c_client *i2c,
146*4882a593Smuzhiyun 						const struct i2c_device_id *id)
147*4882a593Smuzhiyun {
148*4882a593Smuzhiyun 	if (IS_ENABLED(CONFIG_OF) && i2c->dev.of_node) {
149*4882a593Smuzhiyun 		const struct of_device_id *match;
150*4882a593Smuzhiyun 		match = of_match_node(max8997_pmic_dt_match, i2c->dev.of_node);
151*4882a593Smuzhiyun 		return (unsigned long)match->data;
152*4882a593Smuzhiyun 	}
153*4882a593Smuzhiyun 	return id->driver_data;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun 
max8997_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)156*4882a593Smuzhiyun static int max8997_i2c_probe(struct i2c_client *i2c,
157*4882a593Smuzhiyun 			    const struct i2c_device_id *id)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	struct max8997_dev *max8997;
160*4882a593Smuzhiyun 	struct max8997_platform_data *pdata = dev_get_platdata(&i2c->dev);
161*4882a593Smuzhiyun 	int ret = 0;
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	max8997 = devm_kzalloc(&i2c->dev, sizeof(struct max8997_dev),
164*4882a593Smuzhiyun 				GFP_KERNEL);
165*4882a593Smuzhiyun 	if (max8997 == NULL)
166*4882a593Smuzhiyun 		return -ENOMEM;
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	i2c_set_clientdata(i2c, max8997);
169*4882a593Smuzhiyun 	max8997->dev = &i2c->dev;
170*4882a593Smuzhiyun 	max8997->i2c = i2c;
171*4882a593Smuzhiyun 	max8997->type = max8997_i2c_get_driver_data(i2c, id);
172*4882a593Smuzhiyun 	max8997->irq = i2c->irq;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	if (IS_ENABLED(CONFIG_OF) && max8997->dev->of_node) {
175*4882a593Smuzhiyun 		pdata = max8997_i2c_parse_dt_pdata(max8997->dev);
176*4882a593Smuzhiyun 		if (IS_ERR(pdata))
177*4882a593Smuzhiyun 			return PTR_ERR(pdata);
178*4882a593Smuzhiyun 	}
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun 	if (!pdata)
181*4882a593Smuzhiyun 		return ret;
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	max8997->pdata = pdata;
184*4882a593Smuzhiyun 	max8997->ono = pdata->ono;
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun 	mutex_init(&max8997->iolock);
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	max8997->rtc = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_RTC);
189*4882a593Smuzhiyun 	if (IS_ERR(max8997->rtc)) {
190*4882a593Smuzhiyun 		dev_err(max8997->dev, "Failed to allocate I2C device for RTC\n");
191*4882a593Smuzhiyun 		return PTR_ERR(max8997->rtc);
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 	i2c_set_clientdata(max8997->rtc, max8997);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	max8997->haptic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_HAPTIC);
196*4882a593Smuzhiyun 	if (IS_ERR(max8997->haptic)) {
197*4882a593Smuzhiyun 		dev_err(max8997->dev, "Failed to allocate I2C device for Haptic\n");
198*4882a593Smuzhiyun 		ret = PTR_ERR(max8997->haptic);
199*4882a593Smuzhiyun 		goto err_i2c_haptic;
200*4882a593Smuzhiyun 	}
201*4882a593Smuzhiyun 	i2c_set_clientdata(max8997->haptic, max8997);
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	max8997->muic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_MUIC);
204*4882a593Smuzhiyun 	if (IS_ERR(max8997->muic)) {
205*4882a593Smuzhiyun 		dev_err(max8997->dev, "Failed to allocate I2C device for MUIC\n");
206*4882a593Smuzhiyun 		ret = PTR_ERR(max8997->muic);
207*4882a593Smuzhiyun 		goto err_i2c_muic;
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 	i2c_set_clientdata(max8997->muic, max8997);
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	pm_runtime_set_active(max8997->dev);
212*4882a593Smuzhiyun 
213*4882a593Smuzhiyun 	max8997_irq_init(max8997);
214*4882a593Smuzhiyun 
215*4882a593Smuzhiyun 	ret = mfd_add_devices(max8997->dev, -1, max8997_devs,
216*4882a593Smuzhiyun 			ARRAY_SIZE(max8997_devs),
217*4882a593Smuzhiyun 			NULL, 0, NULL);
218*4882a593Smuzhiyun 	if (ret < 0) {
219*4882a593Smuzhiyun 		dev_err(max8997->dev, "failed to add MFD devices %d\n", ret);
220*4882a593Smuzhiyun 		goto err_mfd;
221*4882a593Smuzhiyun 	}
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	/*
224*4882a593Smuzhiyun 	 * TODO: enable others (flash, muic, rtc, battery, ...) and
225*4882a593Smuzhiyun 	 * check the return value
226*4882a593Smuzhiyun 	 */
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	/* MAX8997 has a power button input. */
229*4882a593Smuzhiyun 	device_init_wakeup(max8997->dev, true);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	return ret;
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun err_mfd:
234*4882a593Smuzhiyun 	mfd_remove_devices(max8997->dev);
235*4882a593Smuzhiyun 	i2c_unregister_device(max8997->muic);
236*4882a593Smuzhiyun err_i2c_muic:
237*4882a593Smuzhiyun 	i2c_unregister_device(max8997->haptic);
238*4882a593Smuzhiyun err_i2c_haptic:
239*4882a593Smuzhiyun 	i2c_unregister_device(max8997->rtc);
240*4882a593Smuzhiyun 	return ret;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun static const struct i2c_device_id max8997_i2c_id[] = {
244*4882a593Smuzhiyun 	{ "max8997", TYPE_MAX8997 },
245*4882a593Smuzhiyun 	{ "max8966", TYPE_MAX8966 },
246*4882a593Smuzhiyun 	{ }
247*4882a593Smuzhiyun };
248*4882a593Smuzhiyun 
249*4882a593Smuzhiyun static u8 max8997_dumpaddr_pmic[] = {
250*4882a593Smuzhiyun 	MAX8997_REG_INT1MSK,
251*4882a593Smuzhiyun 	MAX8997_REG_INT2MSK,
252*4882a593Smuzhiyun 	MAX8997_REG_INT3MSK,
253*4882a593Smuzhiyun 	MAX8997_REG_INT4MSK,
254*4882a593Smuzhiyun 	MAX8997_REG_MAINCON1,
255*4882a593Smuzhiyun 	MAX8997_REG_MAINCON2,
256*4882a593Smuzhiyun 	MAX8997_REG_BUCKRAMP,
257*4882a593Smuzhiyun 	MAX8997_REG_BUCK1CTRL,
258*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS1,
259*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS2,
260*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS3,
261*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS4,
262*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS5,
263*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS6,
264*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS7,
265*4882a593Smuzhiyun 	MAX8997_REG_BUCK1DVS8,
266*4882a593Smuzhiyun 	MAX8997_REG_BUCK2CTRL,
267*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS1,
268*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS2,
269*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS3,
270*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS4,
271*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS5,
272*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS6,
273*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS7,
274*4882a593Smuzhiyun 	MAX8997_REG_BUCK2DVS8,
275*4882a593Smuzhiyun 	MAX8997_REG_BUCK3CTRL,
276*4882a593Smuzhiyun 	MAX8997_REG_BUCK3DVS,
277*4882a593Smuzhiyun 	MAX8997_REG_BUCK4CTRL,
278*4882a593Smuzhiyun 	MAX8997_REG_BUCK4DVS,
279*4882a593Smuzhiyun 	MAX8997_REG_BUCK5CTRL,
280*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS1,
281*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS2,
282*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS3,
283*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS4,
284*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS5,
285*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS6,
286*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS7,
287*4882a593Smuzhiyun 	MAX8997_REG_BUCK5DVS8,
288*4882a593Smuzhiyun 	MAX8997_REG_BUCK6CTRL,
289*4882a593Smuzhiyun 	MAX8997_REG_BUCK6BPSKIPCTRL,
290*4882a593Smuzhiyun 	MAX8997_REG_BUCK7CTRL,
291*4882a593Smuzhiyun 	MAX8997_REG_BUCK7DVS,
292*4882a593Smuzhiyun 	MAX8997_REG_LDO1CTRL,
293*4882a593Smuzhiyun 	MAX8997_REG_LDO2CTRL,
294*4882a593Smuzhiyun 	MAX8997_REG_LDO3CTRL,
295*4882a593Smuzhiyun 	MAX8997_REG_LDO4CTRL,
296*4882a593Smuzhiyun 	MAX8997_REG_LDO5CTRL,
297*4882a593Smuzhiyun 	MAX8997_REG_LDO6CTRL,
298*4882a593Smuzhiyun 	MAX8997_REG_LDO7CTRL,
299*4882a593Smuzhiyun 	MAX8997_REG_LDO8CTRL,
300*4882a593Smuzhiyun 	MAX8997_REG_LDO9CTRL,
301*4882a593Smuzhiyun 	MAX8997_REG_LDO10CTRL,
302*4882a593Smuzhiyun 	MAX8997_REG_LDO11CTRL,
303*4882a593Smuzhiyun 	MAX8997_REG_LDO12CTRL,
304*4882a593Smuzhiyun 	MAX8997_REG_LDO13CTRL,
305*4882a593Smuzhiyun 	MAX8997_REG_LDO14CTRL,
306*4882a593Smuzhiyun 	MAX8997_REG_LDO15CTRL,
307*4882a593Smuzhiyun 	MAX8997_REG_LDO16CTRL,
308*4882a593Smuzhiyun 	MAX8997_REG_LDO17CTRL,
309*4882a593Smuzhiyun 	MAX8997_REG_LDO18CTRL,
310*4882a593Smuzhiyun 	MAX8997_REG_LDO21CTRL,
311*4882a593Smuzhiyun 	MAX8997_REG_MBCCTRL1,
312*4882a593Smuzhiyun 	MAX8997_REG_MBCCTRL2,
313*4882a593Smuzhiyun 	MAX8997_REG_MBCCTRL3,
314*4882a593Smuzhiyun 	MAX8997_REG_MBCCTRL4,
315*4882a593Smuzhiyun 	MAX8997_REG_MBCCTRL5,
316*4882a593Smuzhiyun 	MAX8997_REG_MBCCTRL6,
317*4882a593Smuzhiyun 	MAX8997_REG_OTPCGHCVS,
318*4882a593Smuzhiyun 	MAX8997_REG_SAFEOUTCTRL,
319*4882a593Smuzhiyun 	MAX8997_REG_LBCNFG1,
320*4882a593Smuzhiyun 	MAX8997_REG_LBCNFG2,
321*4882a593Smuzhiyun 	MAX8997_REG_BBCCTRL,
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	MAX8997_REG_FLASH1_CUR,
324*4882a593Smuzhiyun 	MAX8997_REG_FLASH2_CUR,
325*4882a593Smuzhiyun 	MAX8997_REG_MOVIE_CUR,
326*4882a593Smuzhiyun 	MAX8997_REG_GSMB_CUR,
327*4882a593Smuzhiyun 	MAX8997_REG_BOOST_CNTL,
328*4882a593Smuzhiyun 	MAX8997_REG_LEN_CNTL,
329*4882a593Smuzhiyun 	MAX8997_REG_FLASH_CNTL,
330*4882a593Smuzhiyun 	MAX8997_REG_WDT_CNTL,
331*4882a593Smuzhiyun 	MAX8997_REG_MAXFLASH1,
332*4882a593Smuzhiyun 	MAX8997_REG_MAXFLASH2,
333*4882a593Smuzhiyun 	MAX8997_REG_FLASHSTATUSMASK,
334*4882a593Smuzhiyun 
335*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL1,
336*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL2,
337*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL3,
338*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL4,
339*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL5,
340*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL6,
341*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL7,
342*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL8,
343*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL9,
344*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL10,
345*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL11,
346*4882a593Smuzhiyun 	MAX8997_REG_GPIOCNTL12,
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	MAX8997_REG_LDO1CONFIG,
349*4882a593Smuzhiyun 	MAX8997_REG_LDO2CONFIG,
350*4882a593Smuzhiyun 	MAX8997_REG_LDO3CONFIG,
351*4882a593Smuzhiyun 	MAX8997_REG_LDO4CONFIG,
352*4882a593Smuzhiyun 	MAX8997_REG_LDO5CONFIG,
353*4882a593Smuzhiyun 	MAX8997_REG_LDO6CONFIG,
354*4882a593Smuzhiyun 	MAX8997_REG_LDO7CONFIG,
355*4882a593Smuzhiyun 	MAX8997_REG_LDO8CONFIG,
356*4882a593Smuzhiyun 	MAX8997_REG_LDO9CONFIG,
357*4882a593Smuzhiyun 	MAX8997_REG_LDO10CONFIG,
358*4882a593Smuzhiyun 	MAX8997_REG_LDO11CONFIG,
359*4882a593Smuzhiyun 	MAX8997_REG_LDO12CONFIG,
360*4882a593Smuzhiyun 	MAX8997_REG_LDO13CONFIG,
361*4882a593Smuzhiyun 	MAX8997_REG_LDO14CONFIG,
362*4882a593Smuzhiyun 	MAX8997_REG_LDO15CONFIG,
363*4882a593Smuzhiyun 	MAX8997_REG_LDO16CONFIG,
364*4882a593Smuzhiyun 	MAX8997_REG_LDO17CONFIG,
365*4882a593Smuzhiyun 	MAX8997_REG_LDO18CONFIG,
366*4882a593Smuzhiyun 	MAX8997_REG_LDO21CONFIG,
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	MAX8997_REG_DVSOKTIMER1,
369*4882a593Smuzhiyun 	MAX8997_REG_DVSOKTIMER2,
370*4882a593Smuzhiyun 	MAX8997_REG_DVSOKTIMER4,
371*4882a593Smuzhiyun 	MAX8997_REG_DVSOKTIMER5,
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun static u8 max8997_dumpaddr_muic[] = {
375*4882a593Smuzhiyun 	MAX8997_MUIC_REG_INTMASK1,
376*4882a593Smuzhiyun 	MAX8997_MUIC_REG_INTMASK2,
377*4882a593Smuzhiyun 	MAX8997_MUIC_REG_INTMASK3,
378*4882a593Smuzhiyun 	MAX8997_MUIC_REG_CDETCTRL,
379*4882a593Smuzhiyun 	MAX8997_MUIC_REG_CONTROL1,
380*4882a593Smuzhiyun 	MAX8997_MUIC_REG_CONTROL2,
381*4882a593Smuzhiyun 	MAX8997_MUIC_REG_CONTROL3,
382*4882a593Smuzhiyun };
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun static u8 max8997_dumpaddr_haptic[] = {
385*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_CONF1,
386*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_CONF2,
387*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_DRVCONF,
388*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_CYCLECONF1,
389*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_CYCLECONF2,
390*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGCONF1,
391*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGCONF2,
392*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGCONF3,
393*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGCONF4,
394*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGDC1,
395*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGDC2,
396*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGPWMDC1,
397*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGPWMDC2,
398*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGPWMDC3,
399*4882a593Smuzhiyun 	MAX8997_HAPTIC_REG_SIGPWMDC4,
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun 
max8997_freeze(struct device * dev)402*4882a593Smuzhiyun static int max8997_freeze(struct device *dev)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun 	struct i2c_client *i2c = to_i2c_client(dev);
405*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
406*4882a593Smuzhiyun 	int i;
407*4882a593Smuzhiyun 
408*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_pmic); i++)
409*4882a593Smuzhiyun 		max8997_read_reg(i2c, max8997_dumpaddr_pmic[i],
410*4882a593Smuzhiyun 				&max8997->reg_dump[i]);
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_muic); i++)
413*4882a593Smuzhiyun 		max8997_read_reg(i2c, max8997_dumpaddr_muic[i],
414*4882a593Smuzhiyun 				&max8997->reg_dump[i + MAX8997_REG_PMIC_END]);
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_haptic); i++)
417*4882a593Smuzhiyun 		max8997_read_reg(i2c, max8997_dumpaddr_haptic[i],
418*4882a593Smuzhiyun 				&max8997->reg_dump[i + MAX8997_REG_PMIC_END +
419*4882a593Smuzhiyun 				MAX8997_MUIC_REG_END]);
420*4882a593Smuzhiyun 
421*4882a593Smuzhiyun 	return 0;
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun 
max8997_restore(struct device * dev)424*4882a593Smuzhiyun static int max8997_restore(struct device *dev)
425*4882a593Smuzhiyun {
426*4882a593Smuzhiyun 	struct i2c_client *i2c = to_i2c_client(dev);
427*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
428*4882a593Smuzhiyun 	int i;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_pmic); i++)
431*4882a593Smuzhiyun 		max8997_write_reg(i2c, max8997_dumpaddr_pmic[i],
432*4882a593Smuzhiyun 				max8997->reg_dump[i]);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_muic); i++)
435*4882a593Smuzhiyun 		max8997_write_reg(i2c, max8997_dumpaddr_muic[i],
436*4882a593Smuzhiyun 				max8997->reg_dump[i + MAX8997_REG_PMIC_END]);
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(max8997_dumpaddr_haptic); i++)
439*4882a593Smuzhiyun 		max8997_write_reg(i2c, max8997_dumpaddr_haptic[i],
440*4882a593Smuzhiyun 				max8997->reg_dump[i + MAX8997_REG_PMIC_END +
441*4882a593Smuzhiyun 				MAX8997_MUIC_REG_END]);
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
max8997_suspend(struct device * dev)446*4882a593Smuzhiyun static int max8997_suspend(struct device *dev)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	struct i2c_client *i2c = to_i2c_client(dev);
449*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	disable_irq(max8997->irq);
452*4882a593Smuzhiyun 	if (device_may_wakeup(dev))
453*4882a593Smuzhiyun 		irq_set_irq_wake(max8997->irq, 1);
454*4882a593Smuzhiyun 	return 0;
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun 
max8997_resume(struct device * dev)457*4882a593Smuzhiyun static int max8997_resume(struct device *dev)
458*4882a593Smuzhiyun {
459*4882a593Smuzhiyun 	struct i2c_client *i2c = to_i2c_client(dev);
460*4882a593Smuzhiyun 	struct max8997_dev *max8997 = i2c_get_clientdata(i2c);
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	if (device_may_wakeup(dev))
463*4882a593Smuzhiyun 		irq_set_irq_wake(max8997->irq, 0);
464*4882a593Smuzhiyun 	enable_irq(max8997->irq);
465*4882a593Smuzhiyun 	return max8997_irq_resume(max8997);
466*4882a593Smuzhiyun }
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun static const struct dev_pm_ops max8997_pm = {
469*4882a593Smuzhiyun 	.suspend = max8997_suspend,
470*4882a593Smuzhiyun 	.resume = max8997_resume,
471*4882a593Smuzhiyun 	.freeze = max8997_freeze,
472*4882a593Smuzhiyun 	.restore = max8997_restore,
473*4882a593Smuzhiyun };
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun static struct i2c_driver max8997_i2c_driver = {
476*4882a593Smuzhiyun 	.driver = {
477*4882a593Smuzhiyun 		   .name = "max8997",
478*4882a593Smuzhiyun 		   .pm = &max8997_pm,
479*4882a593Smuzhiyun 		   .suppress_bind_attrs = true,
480*4882a593Smuzhiyun 		   .of_match_table = of_match_ptr(max8997_pmic_dt_match),
481*4882a593Smuzhiyun 	},
482*4882a593Smuzhiyun 	.probe = max8997_i2c_probe,
483*4882a593Smuzhiyun 	.id_table = max8997_i2c_id,
484*4882a593Smuzhiyun };
485*4882a593Smuzhiyun 
max8997_i2c_init(void)486*4882a593Smuzhiyun static int __init max8997_i2c_init(void)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun 	return i2c_add_driver(&max8997_i2c_driver);
489*4882a593Smuzhiyun }
490*4882a593Smuzhiyun /* init early so consumer devices can complete system boot */
491*4882a593Smuzhiyun subsys_initcall(max8997_i2c_init);
492