1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * max8907.c - mfd driver for MAX8907
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2010 Gyungoh Yoo <jack.yoo@maxim-ic.com>
6*4882a593Smuzhiyun * Copyright (C) 2010-2012, NVIDIA CORPORATION. All rights reserved.
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <linux/err.h>
10*4882a593Smuzhiyun #include <linux/i2c.h>
11*4882a593Smuzhiyun #include <linux/init.h>
12*4882a593Smuzhiyun #include <linux/interrupt.h>
13*4882a593Smuzhiyun #include <linux/irq.h>
14*4882a593Smuzhiyun #include <linux/mfd/core.h>
15*4882a593Smuzhiyun #include <linux/mfd/max8907.h>
16*4882a593Smuzhiyun #include <linux/module.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/of_device.h>
19*4882a593Smuzhiyun #include <linux/regmap.h>
20*4882a593Smuzhiyun #include <linux/slab.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun static const struct mfd_cell max8907_cells[] = {
23*4882a593Smuzhiyun { .name = "max8907-regulator", },
24*4882a593Smuzhiyun { .name = "max8907-rtc", },
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
max8907_gen_is_volatile_reg(struct device * dev,unsigned int reg)27*4882a593Smuzhiyun static bool max8907_gen_is_volatile_reg(struct device *dev, unsigned int reg)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun switch (reg) {
30*4882a593Smuzhiyun case MAX8907_REG_ON_OFF_IRQ1:
31*4882a593Smuzhiyun case MAX8907_REG_ON_OFF_STAT:
32*4882a593Smuzhiyun case MAX8907_REG_ON_OFF_IRQ2:
33*4882a593Smuzhiyun case MAX8907_REG_CHG_IRQ1:
34*4882a593Smuzhiyun case MAX8907_REG_CHG_IRQ2:
35*4882a593Smuzhiyun case MAX8907_REG_CHG_STAT:
36*4882a593Smuzhiyun return true;
37*4882a593Smuzhiyun default:
38*4882a593Smuzhiyun return false;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
max8907_gen_is_precious_reg(struct device * dev,unsigned int reg)42*4882a593Smuzhiyun static bool max8907_gen_is_precious_reg(struct device *dev, unsigned int reg)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun switch (reg) {
45*4882a593Smuzhiyun case MAX8907_REG_ON_OFF_IRQ1:
46*4882a593Smuzhiyun case MAX8907_REG_ON_OFF_IRQ2:
47*4882a593Smuzhiyun case MAX8907_REG_CHG_IRQ1:
48*4882a593Smuzhiyun case MAX8907_REG_CHG_IRQ2:
49*4882a593Smuzhiyun return true;
50*4882a593Smuzhiyun default:
51*4882a593Smuzhiyun return false;
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun
max8907_gen_is_writeable_reg(struct device * dev,unsigned int reg)55*4882a593Smuzhiyun static bool max8907_gen_is_writeable_reg(struct device *dev, unsigned int reg)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun return !max8907_gen_is_volatile_reg(dev, reg);
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun static const struct regmap_config max8907_regmap_gen_config = {
61*4882a593Smuzhiyun .reg_bits = 8,
62*4882a593Smuzhiyun .val_bits = 8,
63*4882a593Smuzhiyun .volatile_reg = max8907_gen_is_volatile_reg,
64*4882a593Smuzhiyun .precious_reg = max8907_gen_is_precious_reg,
65*4882a593Smuzhiyun .writeable_reg = max8907_gen_is_writeable_reg,
66*4882a593Smuzhiyun .max_register = MAX8907_REG_LDO20VOUT,
67*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun
max8907_rtc_is_volatile_reg(struct device * dev,unsigned int reg)70*4882a593Smuzhiyun static bool max8907_rtc_is_volatile_reg(struct device *dev, unsigned int reg)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun if (reg <= MAX8907_REG_RTC_YEAR2)
73*4882a593Smuzhiyun return true;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun switch (reg) {
76*4882a593Smuzhiyun case MAX8907_REG_RTC_STATUS:
77*4882a593Smuzhiyun case MAX8907_REG_RTC_IRQ:
78*4882a593Smuzhiyun return true;
79*4882a593Smuzhiyun default:
80*4882a593Smuzhiyun return false;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
max8907_rtc_is_precious_reg(struct device * dev,unsigned int reg)84*4882a593Smuzhiyun static bool max8907_rtc_is_precious_reg(struct device *dev, unsigned int reg)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun switch (reg) {
87*4882a593Smuzhiyun case MAX8907_REG_RTC_IRQ:
88*4882a593Smuzhiyun return true;
89*4882a593Smuzhiyun default:
90*4882a593Smuzhiyun return false;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
max8907_rtc_is_writeable_reg(struct device * dev,unsigned int reg)94*4882a593Smuzhiyun static bool max8907_rtc_is_writeable_reg(struct device *dev, unsigned int reg)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun switch (reg) {
97*4882a593Smuzhiyun case MAX8907_REG_RTC_STATUS:
98*4882a593Smuzhiyun case MAX8907_REG_RTC_IRQ:
99*4882a593Smuzhiyun return false;
100*4882a593Smuzhiyun default:
101*4882a593Smuzhiyun return true;
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static const struct regmap_config max8907_regmap_rtc_config = {
106*4882a593Smuzhiyun .reg_bits = 8,
107*4882a593Smuzhiyun .val_bits = 8,
108*4882a593Smuzhiyun .volatile_reg = max8907_rtc_is_volatile_reg,
109*4882a593Smuzhiyun .precious_reg = max8907_rtc_is_precious_reg,
110*4882a593Smuzhiyun .writeable_reg = max8907_rtc_is_writeable_reg,
111*4882a593Smuzhiyun .max_register = MAX8907_REG_MPL_CNTL,
112*4882a593Smuzhiyun .cache_type = REGCACHE_RBTREE,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static const struct regmap_irq max8907_chg_irqs[] = {
116*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 0, },
117*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 1, },
118*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 2, },
119*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 0, },
120*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 1, },
121*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 2, },
122*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 3, },
123*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 4, },
124*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 5, },
125*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 6, },
126*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 7, },
127*4882a593Smuzhiyun };
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun static const struct regmap_irq_chip max8907_chg_irq_chip = {
130*4882a593Smuzhiyun .name = "max8907 chg",
131*4882a593Smuzhiyun .status_base = MAX8907_REG_CHG_IRQ1,
132*4882a593Smuzhiyun .mask_base = MAX8907_REG_CHG_IRQ1_MASK,
133*4882a593Smuzhiyun .wake_base = MAX8907_REG_CHG_IRQ1_MASK,
134*4882a593Smuzhiyun .irq_reg_stride = MAX8907_REG_CHG_IRQ2 - MAX8907_REG_CHG_IRQ1,
135*4882a593Smuzhiyun .num_regs = 2,
136*4882a593Smuzhiyun .irqs = max8907_chg_irqs,
137*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max8907_chg_irqs),
138*4882a593Smuzhiyun };
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun static const struct regmap_irq max8907_on_off_irqs[] = {
141*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 0, },
142*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 1, },
143*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 2, },
144*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 3, },
145*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 4, },
146*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 5, },
147*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 6, },
148*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 7, },
149*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 0, },
150*4882a593Smuzhiyun { .reg_offset = 1, .mask = 1 << 1, },
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun static const struct regmap_irq_chip max8907_on_off_irq_chip = {
154*4882a593Smuzhiyun .name = "max8907 on_off",
155*4882a593Smuzhiyun .status_base = MAX8907_REG_ON_OFF_IRQ1,
156*4882a593Smuzhiyun .mask_base = MAX8907_REG_ON_OFF_IRQ1_MASK,
157*4882a593Smuzhiyun .irq_reg_stride = MAX8907_REG_ON_OFF_IRQ2 - MAX8907_REG_ON_OFF_IRQ1,
158*4882a593Smuzhiyun .num_regs = 2,
159*4882a593Smuzhiyun .irqs = max8907_on_off_irqs,
160*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max8907_on_off_irqs),
161*4882a593Smuzhiyun };
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun static const struct regmap_irq max8907_rtc_irqs[] = {
164*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 2, },
165*4882a593Smuzhiyun { .reg_offset = 0, .mask = 1 << 3, },
166*4882a593Smuzhiyun };
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun static const struct regmap_irq_chip max8907_rtc_irq_chip = {
169*4882a593Smuzhiyun .name = "max8907 rtc",
170*4882a593Smuzhiyun .status_base = MAX8907_REG_RTC_IRQ,
171*4882a593Smuzhiyun .mask_base = MAX8907_REG_RTC_IRQ_MASK,
172*4882a593Smuzhiyun .num_regs = 1,
173*4882a593Smuzhiyun .irqs = max8907_rtc_irqs,
174*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max8907_rtc_irqs),
175*4882a593Smuzhiyun };
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun static struct max8907 *max8907_pm_off;
max8907_power_off(void)178*4882a593Smuzhiyun static void max8907_power_off(void)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun regmap_update_bits(max8907_pm_off->regmap_gen, MAX8907_REG_RESET_CNFG,
181*4882a593Smuzhiyun MAX8907_MASK_POWER_OFF, MAX8907_MASK_POWER_OFF);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun
max8907_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)184*4882a593Smuzhiyun static int max8907_i2c_probe(struct i2c_client *i2c,
185*4882a593Smuzhiyun const struct i2c_device_id *id)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun struct max8907 *max8907;
188*4882a593Smuzhiyun int ret;
189*4882a593Smuzhiyun struct max8907_platform_data *pdata = dev_get_platdata(&i2c->dev);
190*4882a593Smuzhiyun bool pm_off = false;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (pdata)
193*4882a593Smuzhiyun pm_off = pdata->pm_off;
194*4882a593Smuzhiyun else if (i2c->dev.of_node)
195*4882a593Smuzhiyun pm_off = of_property_read_bool(i2c->dev.of_node,
196*4882a593Smuzhiyun "maxim,system-power-controller");
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun max8907 = devm_kzalloc(&i2c->dev, sizeof(struct max8907), GFP_KERNEL);
199*4882a593Smuzhiyun if (!max8907) {
200*4882a593Smuzhiyun ret = -ENOMEM;
201*4882a593Smuzhiyun goto err_alloc_drvdata;
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun max8907->dev = &i2c->dev;
205*4882a593Smuzhiyun dev_set_drvdata(max8907->dev, max8907);
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun max8907->i2c_gen = i2c;
208*4882a593Smuzhiyun i2c_set_clientdata(i2c, max8907);
209*4882a593Smuzhiyun max8907->regmap_gen = devm_regmap_init_i2c(i2c,
210*4882a593Smuzhiyun &max8907_regmap_gen_config);
211*4882a593Smuzhiyun if (IS_ERR(max8907->regmap_gen)) {
212*4882a593Smuzhiyun ret = PTR_ERR(max8907->regmap_gen);
213*4882a593Smuzhiyun dev_err(&i2c->dev, "gen regmap init failed: %d\n", ret);
214*4882a593Smuzhiyun goto err_regmap_gen;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun max8907->i2c_rtc = i2c_new_dummy_device(i2c->adapter, MAX8907_RTC_I2C_ADDR);
218*4882a593Smuzhiyun if (IS_ERR(max8907->i2c_rtc)) {
219*4882a593Smuzhiyun ret = PTR_ERR(max8907->i2c_rtc);
220*4882a593Smuzhiyun goto err_dummy_rtc;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun i2c_set_clientdata(max8907->i2c_rtc, max8907);
223*4882a593Smuzhiyun max8907->regmap_rtc = devm_regmap_init_i2c(max8907->i2c_rtc,
224*4882a593Smuzhiyun &max8907_regmap_rtc_config);
225*4882a593Smuzhiyun if (IS_ERR(max8907->regmap_rtc)) {
226*4882a593Smuzhiyun ret = PTR_ERR(max8907->regmap_rtc);
227*4882a593Smuzhiyun dev_err(&i2c->dev, "rtc regmap init failed: %d\n", ret);
228*4882a593Smuzhiyun goto err_regmap_rtc;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun irq_set_status_flags(max8907->i2c_gen->irq, IRQ_NOAUTOEN);
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq,
234*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED, -1,
235*4882a593Smuzhiyun &max8907_chg_irq_chip,
236*4882a593Smuzhiyun &max8907->irqc_chg);
237*4882a593Smuzhiyun if (ret != 0) {
238*4882a593Smuzhiyun dev_err(&i2c->dev, "failed to add chg irq chip: %d\n", ret);
239*4882a593Smuzhiyun goto err_irqc_chg;
240*4882a593Smuzhiyun }
241*4882a593Smuzhiyun ret = regmap_add_irq_chip(max8907->regmap_gen, max8907->i2c_gen->irq,
242*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED, -1,
243*4882a593Smuzhiyun &max8907_on_off_irq_chip,
244*4882a593Smuzhiyun &max8907->irqc_on_off);
245*4882a593Smuzhiyun if (ret != 0) {
246*4882a593Smuzhiyun dev_err(&i2c->dev, "failed to add on off irq chip: %d\n", ret);
247*4882a593Smuzhiyun goto err_irqc_on_off;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun ret = regmap_add_irq_chip(max8907->regmap_rtc, max8907->i2c_gen->irq,
250*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED, -1,
251*4882a593Smuzhiyun &max8907_rtc_irq_chip,
252*4882a593Smuzhiyun &max8907->irqc_rtc);
253*4882a593Smuzhiyun if (ret != 0) {
254*4882a593Smuzhiyun dev_err(&i2c->dev, "failed to add rtc irq chip: %d\n", ret);
255*4882a593Smuzhiyun goto err_irqc_rtc;
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun enable_irq(max8907->i2c_gen->irq);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun ret = mfd_add_devices(max8907->dev, -1, max8907_cells,
261*4882a593Smuzhiyun ARRAY_SIZE(max8907_cells), NULL, 0, NULL);
262*4882a593Smuzhiyun if (ret != 0) {
263*4882a593Smuzhiyun dev_err(&i2c->dev, "failed to add MFD devices %d\n", ret);
264*4882a593Smuzhiyun goto err_add_devices;
265*4882a593Smuzhiyun }
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun if (pm_off && !pm_power_off) {
268*4882a593Smuzhiyun max8907_pm_off = max8907;
269*4882a593Smuzhiyun pm_power_off = max8907_power_off;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun return 0;
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun err_add_devices:
275*4882a593Smuzhiyun regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc);
276*4882a593Smuzhiyun err_irqc_rtc:
277*4882a593Smuzhiyun regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off);
278*4882a593Smuzhiyun err_irqc_on_off:
279*4882a593Smuzhiyun regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg);
280*4882a593Smuzhiyun err_irqc_chg:
281*4882a593Smuzhiyun err_regmap_rtc:
282*4882a593Smuzhiyun i2c_unregister_device(max8907->i2c_rtc);
283*4882a593Smuzhiyun err_dummy_rtc:
284*4882a593Smuzhiyun err_regmap_gen:
285*4882a593Smuzhiyun err_alloc_drvdata:
286*4882a593Smuzhiyun return ret;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
max8907_i2c_remove(struct i2c_client * i2c)289*4882a593Smuzhiyun static int max8907_i2c_remove(struct i2c_client *i2c)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun struct max8907 *max8907 = i2c_get_clientdata(i2c);
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun mfd_remove_devices(max8907->dev);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_rtc);
296*4882a593Smuzhiyun regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_on_off);
297*4882a593Smuzhiyun regmap_del_irq_chip(max8907->i2c_gen->irq, max8907->irqc_chg);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun i2c_unregister_device(max8907->i2c_rtc);
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun return 0;
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun #ifdef CONFIG_OF
305*4882a593Smuzhiyun static const struct of_device_id max8907_of_match[] = {
306*4882a593Smuzhiyun { .compatible = "maxim,max8907" },
307*4882a593Smuzhiyun { },
308*4882a593Smuzhiyun };
309*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max8907_of_match);
310*4882a593Smuzhiyun #endif
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun static const struct i2c_device_id max8907_i2c_id[] = {
313*4882a593Smuzhiyun {"max8907", 0},
314*4882a593Smuzhiyun {}
315*4882a593Smuzhiyun };
316*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max8907_i2c_id);
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun static struct i2c_driver max8907_i2c_driver = {
319*4882a593Smuzhiyun .driver = {
320*4882a593Smuzhiyun .name = "max8907",
321*4882a593Smuzhiyun .of_match_table = of_match_ptr(max8907_of_match),
322*4882a593Smuzhiyun },
323*4882a593Smuzhiyun .probe = max8907_i2c_probe,
324*4882a593Smuzhiyun .remove = max8907_i2c_remove,
325*4882a593Smuzhiyun .id_table = max8907_i2c_id,
326*4882a593Smuzhiyun };
327*4882a593Smuzhiyun
max8907_i2c_init(void)328*4882a593Smuzhiyun static int __init max8907_i2c_init(void)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun int ret = -ENODEV;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun ret = i2c_add_driver(&max8907_i2c_driver);
333*4882a593Smuzhiyun if (ret != 0)
334*4882a593Smuzhiyun pr_err("Failed to register I2C driver: %d\n", ret);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun return ret;
337*4882a593Smuzhiyun }
338*4882a593Smuzhiyun subsys_initcall(max8907_i2c_init);
339*4882a593Smuzhiyun
max8907_i2c_exit(void)340*4882a593Smuzhiyun static void __exit max8907_i2c_exit(void)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun i2c_del_driver(&max8907_i2c_driver);
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun module_exit(max8907_i2c_exit);
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun MODULE_DESCRIPTION("MAX8907 multi-function core driver");
347*4882a593Smuzhiyun MODULE_AUTHOR("Gyungoh Yoo <jack.yoo@maxim-ic.com>");
348*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
349