1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // max77693.c - mfd core driver for the MAX 77693
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2012 Samsung Electronics
6*4882a593Smuzhiyun // SangYoung Son <hello.son@samsung.com>
7*4882a593Smuzhiyun //
8*4882a593Smuzhiyun // This program is not provided / owned by Maxim Integrated Products.
9*4882a593Smuzhiyun //
10*4882a593Smuzhiyun // This driver is based on max8997.c
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/slab.h>
14*4882a593Smuzhiyun #include <linux/i2c.h>
15*4882a593Smuzhiyun #include <linux/err.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/of.h>
18*4882a593Smuzhiyun #include <linux/pm_runtime.h>
19*4882a593Smuzhiyun #include <linux/mutex.h>
20*4882a593Smuzhiyun #include <linux/mfd/core.h>
21*4882a593Smuzhiyun #include <linux/mfd/max77693.h>
22*4882a593Smuzhiyun #include <linux/mfd/max77693-common.h>
23*4882a593Smuzhiyun #include <linux/mfd/max77693-private.h>
24*4882a593Smuzhiyun #include <linux/regulator/machine.h>
25*4882a593Smuzhiyun #include <linux/regmap.h>
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define I2C_ADDR_PMIC (0xCC >> 1) /* Charger, Flash LED */
28*4882a593Smuzhiyun #define I2C_ADDR_MUIC (0x4A >> 1)
29*4882a593Smuzhiyun #define I2C_ADDR_HAPTIC (0x90 >> 1)
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun static const struct mfd_cell max77693_devs[] = {
32*4882a593Smuzhiyun { .name = "max77693-pmic", },
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun .name = "max77693-charger",
35*4882a593Smuzhiyun .of_compatible = "maxim,max77693-charger",
36*4882a593Smuzhiyun },
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun .name = "max77693-muic",
39*4882a593Smuzhiyun .of_compatible = "maxim,max77693-muic",
40*4882a593Smuzhiyun },
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun .name = "max77693-haptic",
43*4882a593Smuzhiyun .of_compatible = "maxim,max77693-haptic",
44*4882a593Smuzhiyun },
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun .name = "max77693-led",
47*4882a593Smuzhiyun .of_compatible = "maxim,max77693-led",
48*4882a593Smuzhiyun },
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static const struct regmap_config max77693_regmap_config = {
52*4882a593Smuzhiyun .reg_bits = 8,
53*4882a593Smuzhiyun .val_bits = 8,
54*4882a593Smuzhiyun .max_register = MAX77693_PMIC_REG_END,
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static const struct regmap_irq max77693_led_irqs[] = {
58*4882a593Smuzhiyun { .mask = LED_IRQ_FLED2_OPEN, },
59*4882a593Smuzhiyun { .mask = LED_IRQ_FLED2_SHORT, },
60*4882a593Smuzhiyun { .mask = LED_IRQ_FLED1_OPEN, },
61*4882a593Smuzhiyun { .mask = LED_IRQ_FLED1_SHORT, },
62*4882a593Smuzhiyun { .mask = LED_IRQ_MAX_FLASH, },
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct regmap_irq_chip max77693_led_irq_chip = {
66*4882a593Smuzhiyun .name = "max77693-led",
67*4882a593Smuzhiyun .status_base = MAX77693_LED_REG_FLASH_INT,
68*4882a593Smuzhiyun .mask_base = MAX77693_LED_REG_FLASH_INT_MASK,
69*4882a593Smuzhiyun .mask_invert = false,
70*4882a593Smuzhiyun .num_regs = 1,
71*4882a593Smuzhiyun .irqs = max77693_led_irqs,
72*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max77693_led_irqs),
73*4882a593Smuzhiyun };
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static const struct regmap_irq max77693_topsys_irqs[] = {
76*4882a593Smuzhiyun { .mask = TOPSYS_IRQ_T120C_INT, },
77*4882a593Smuzhiyun { .mask = TOPSYS_IRQ_T140C_INT, },
78*4882a593Smuzhiyun { .mask = TOPSYS_IRQ_LOWSYS_INT, },
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun static const struct regmap_irq_chip max77693_topsys_irq_chip = {
82*4882a593Smuzhiyun .name = "max77693-topsys",
83*4882a593Smuzhiyun .status_base = MAX77693_PMIC_REG_TOPSYS_INT,
84*4882a593Smuzhiyun .mask_base = MAX77693_PMIC_REG_TOPSYS_INT_MASK,
85*4882a593Smuzhiyun .mask_invert = false,
86*4882a593Smuzhiyun .num_regs = 1,
87*4882a593Smuzhiyun .irqs = max77693_topsys_irqs,
88*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max77693_topsys_irqs),
89*4882a593Smuzhiyun };
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun static const struct regmap_irq max77693_charger_irqs[] = {
92*4882a593Smuzhiyun { .mask = CHG_IRQ_BYP_I, },
93*4882a593Smuzhiyun { .mask = CHG_IRQ_THM_I, },
94*4882a593Smuzhiyun { .mask = CHG_IRQ_BAT_I, },
95*4882a593Smuzhiyun { .mask = CHG_IRQ_CHG_I, },
96*4882a593Smuzhiyun { .mask = CHG_IRQ_CHGIN_I, },
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun static const struct regmap_irq_chip max77693_charger_irq_chip = {
100*4882a593Smuzhiyun .name = "max77693-charger",
101*4882a593Smuzhiyun .status_base = MAX77693_CHG_REG_CHG_INT,
102*4882a593Smuzhiyun .mask_base = MAX77693_CHG_REG_CHG_INT_MASK,
103*4882a593Smuzhiyun .mask_invert = false,
104*4882a593Smuzhiyun .num_regs = 1,
105*4882a593Smuzhiyun .irqs = max77693_charger_irqs,
106*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max77693_charger_irqs),
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun static const struct regmap_config max77693_regmap_muic_config = {
110*4882a593Smuzhiyun .reg_bits = 8,
111*4882a593Smuzhiyun .val_bits = 8,
112*4882a593Smuzhiyun .max_register = MAX77693_MUIC_REG_END,
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun static const struct regmap_irq max77693_muic_irqs[] = {
116*4882a593Smuzhiyun { .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC, },
117*4882a593Smuzhiyun { .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC_LOW, },
118*4882a593Smuzhiyun { .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC_ERR, },
119*4882a593Smuzhiyun { .reg_offset = 0, .mask = MUIC_IRQ_INT1_ADC1K, },
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun { .reg_offset = 1, .mask = MUIC_IRQ_INT2_CHGTYP, },
122*4882a593Smuzhiyun { .reg_offset = 1, .mask = MUIC_IRQ_INT2_CHGDETREUN, },
123*4882a593Smuzhiyun { .reg_offset = 1, .mask = MUIC_IRQ_INT2_DCDTMR, },
124*4882a593Smuzhiyun { .reg_offset = 1, .mask = MUIC_IRQ_INT2_DXOVP, },
125*4882a593Smuzhiyun { .reg_offset = 1, .mask = MUIC_IRQ_INT2_VBVOLT, },
126*4882a593Smuzhiyun { .reg_offset = 1, .mask = MUIC_IRQ_INT2_VIDRM, },
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun { .reg_offset = 2, .mask = MUIC_IRQ_INT3_EOC, },
129*4882a593Smuzhiyun { .reg_offset = 2, .mask = MUIC_IRQ_INT3_CGMBC, },
130*4882a593Smuzhiyun { .reg_offset = 2, .mask = MUIC_IRQ_INT3_OVP, },
131*4882a593Smuzhiyun { .reg_offset = 2, .mask = MUIC_IRQ_INT3_MBCCHG_ERR, },
132*4882a593Smuzhiyun { .reg_offset = 2, .mask = MUIC_IRQ_INT3_CHG_ENABLED, },
133*4882a593Smuzhiyun { .reg_offset = 2, .mask = MUIC_IRQ_INT3_BAT_DET, },
134*4882a593Smuzhiyun };
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun static const struct regmap_irq_chip max77693_muic_irq_chip = {
137*4882a593Smuzhiyun .name = "max77693-muic",
138*4882a593Smuzhiyun .status_base = MAX77693_MUIC_REG_INT1,
139*4882a593Smuzhiyun .mask_base = MAX77693_MUIC_REG_INTMASK1,
140*4882a593Smuzhiyun .mask_invert = true,
141*4882a593Smuzhiyun .num_regs = 3,
142*4882a593Smuzhiyun .irqs = max77693_muic_irqs,
143*4882a593Smuzhiyun .num_irqs = ARRAY_SIZE(max77693_muic_irqs),
144*4882a593Smuzhiyun };
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun static const struct regmap_config max77693_regmap_haptic_config = {
147*4882a593Smuzhiyun .reg_bits = 8,
148*4882a593Smuzhiyun .val_bits = 8,
149*4882a593Smuzhiyun .max_register = MAX77693_HAPTIC_REG_END,
150*4882a593Smuzhiyun };
151*4882a593Smuzhiyun
max77693_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)152*4882a593Smuzhiyun static int max77693_i2c_probe(struct i2c_client *i2c,
153*4882a593Smuzhiyun const struct i2c_device_id *id)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun struct max77693_dev *max77693;
156*4882a593Smuzhiyun unsigned int reg_data;
157*4882a593Smuzhiyun int ret = 0;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun max77693 = devm_kzalloc(&i2c->dev,
160*4882a593Smuzhiyun sizeof(struct max77693_dev), GFP_KERNEL);
161*4882a593Smuzhiyun if (max77693 == NULL)
162*4882a593Smuzhiyun return -ENOMEM;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun i2c_set_clientdata(i2c, max77693);
165*4882a593Smuzhiyun max77693->dev = &i2c->dev;
166*4882a593Smuzhiyun max77693->i2c = i2c;
167*4882a593Smuzhiyun max77693->irq = i2c->irq;
168*4882a593Smuzhiyun max77693->type = id->driver_data;
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun max77693->regmap = devm_regmap_init_i2c(i2c, &max77693_regmap_config);
171*4882a593Smuzhiyun if (IS_ERR(max77693->regmap)) {
172*4882a593Smuzhiyun ret = PTR_ERR(max77693->regmap);
173*4882a593Smuzhiyun dev_err(max77693->dev, "failed to allocate register map: %d\n",
174*4882a593Smuzhiyun ret);
175*4882a593Smuzhiyun return ret;
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun ret = regmap_read(max77693->regmap, MAX77693_PMIC_REG_PMIC_ID2,
179*4882a593Smuzhiyun ®_data);
180*4882a593Smuzhiyun if (ret < 0) {
181*4882a593Smuzhiyun dev_err(max77693->dev, "device not found on this channel\n");
182*4882a593Smuzhiyun return ret;
183*4882a593Smuzhiyun } else
184*4882a593Smuzhiyun dev_info(max77693->dev, "device ID: 0x%x\n", reg_data);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun max77693->i2c_muic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_MUIC);
187*4882a593Smuzhiyun if (IS_ERR(max77693->i2c_muic)) {
188*4882a593Smuzhiyun dev_err(max77693->dev, "Failed to allocate I2C device for MUIC\n");
189*4882a593Smuzhiyun return PTR_ERR(max77693->i2c_muic);
190*4882a593Smuzhiyun }
191*4882a593Smuzhiyun i2c_set_clientdata(max77693->i2c_muic, max77693);
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun max77693->i2c_haptic = i2c_new_dummy_device(i2c->adapter, I2C_ADDR_HAPTIC);
194*4882a593Smuzhiyun if (IS_ERR(max77693->i2c_haptic)) {
195*4882a593Smuzhiyun dev_err(max77693->dev, "Failed to allocate I2C device for Haptic\n");
196*4882a593Smuzhiyun ret = PTR_ERR(max77693->i2c_haptic);
197*4882a593Smuzhiyun goto err_i2c_haptic;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun i2c_set_clientdata(max77693->i2c_haptic, max77693);
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun max77693->regmap_haptic = devm_regmap_init_i2c(max77693->i2c_haptic,
202*4882a593Smuzhiyun &max77693_regmap_haptic_config);
203*4882a593Smuzhiyun if (IS_ERR(max77693->regmap_haptic)) {
204*4882a593Smuzhiyun ret = PTR_ERR(max77693->regmap_haptic);
205*4882a593Smuzhiyun dev_err(max77693->dev,
206*4882a593Smuzhiyun "failed to initialize haptic register map: %d\n", ret);
207*4882a593Smuzhiyun goto err_regmap;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /*
211*4882a593Smuzhiyun * Initialize register map for MUIC device because use regmap-muic
212*4882a593Smuzhiyun * instance of MUIC device when irq of max77693 is initialized
213*4882a593Smuzhiyun * before call max77693-muic probe() function.
214*4882a593Smuzhiyun */
215*4882a593Smuzhiyun max77693->regmap_muic = devm_regmap_init_i2c(max77693->i2c_muic,
216*4882a593Smuzhiyun &max77693_regmap_muic_config);
217*4882a593Smuzhiyun if (IS_ERR(max77693->regmap_muic)) {
218*4882a593Smuzhiyun ret = PTR_ERR(max77693->regmap_muic);
219*4882a593Smuzhiyun dev_err(max77693->dev,
220*4882a593Smuzhiyun "failed to allocate register map: %d\n", ret);
221*4882a593Smuzhiyun goto err_regmap;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun ret = regmap_add_irq_chip(max77693->regmap, max77693->irq,
225*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED |
226*4882a593Smuzhiyun IRQF_TRIGGER_FALLING, 0,
227*4882a593Smuzhiyun &max77693_led_irq_chip,
228*4882a593Smuzhiyun &max77693->irq_data_led);
229*4882a593Smuzhiyun if (ret) {
230*4882a593Smuzhiyun dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
231*4882a593Smuzhiyun goto err_regmap;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun ret = regmap_add_irq_chip(max77693->regmap, max77693->irq,
235*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED |
236*4882a593Smuzhiyun IRQF_TRIGGER_FALLING, 0,
237*4882a593Smuzhiyun &max77693_topsys_irq_chip,
238*4882a593Smuzhiyun &max77693->irq_data_topsys);
239*4882a593Smuzhiyun if (ret) {
240*4882a593Smuzhiyun dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
241*4882a593Smuzhiyun goto err_irq_topsys;
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun ret = regmap_add_irq_chip(max77693->regmap, max77693->irq,
245*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED |
246*4882a593Smuzhiyun IRQF_TRIGGER_FALLING, 0,
247*4882a593Smuzhiyun &max77693_charger_irq_chip,
248*4882a593Smuzhiyun &max77693->irq_data_chg);
249*4882a593Smuzhiyun if (ret) {
250*4882a593Smuzhiyun dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
251*4882a593Smuzhiyun goto err_irq_charger;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun ret = regmap_add_irq_chip(max77693->regmap_muic, max77693->irq,
255*4882a593Smuzhiyun IRQF_ONESHOT | IRQF_SHARED |
256*4882a593Smuzhiyun IRQF_TRIGGER_FALLING, 0,
257*4882a593Smuzhiyun &max77693_muic_irq_chip,
258*4882a593Smuzhiyun &max77693->irq_data_muic);
259*4882a593Smuzhiyun if (ret) {
260*4882a593Smuzhiyun dev_err(max77693->dev, "failed to add irq chip: %d\n", ret);
261*4882a593Smuzhiyun goto err_irq_muic;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun /* Unmask interrupts from all blocks in interrupt source register */
265*4882a593Smuzhiyun ret = regmap_update_bits(max77693->regmap,
266*4882a593Smuzhiyun MAX77693_PMIC_REG_INTSRC_MASK,
267*4882a593Smuzhiyun SRC_IRQ_ALL, (unsigned int)~SRC_IRQ_ALL);
268*4882a593Smuzhiyun if (ret < 0) {
269*4882a593Smuzhiyun dev_err(max77693->dev,
270*4882a593Smuzhiyun "Could not unmask interrupts in INTSRC: %d\n",
271*4882a593Smuzhiyun ret);
272*4882a593Smuzhiyun goto err_intsrc;
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun pm_runtime_set_active(max77693->dev);
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun ret = mfd_add_devices(max77693->dev, -1, max77693_devs,
278*4882a593Smuzhiyun ARRAY_SIZE(max77693_devs), NULL, 0, NULL);
279*4882a593Smuzhiyun if (ret < 0)
280*4882a593Smuzhiyun goto err_mfd;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun return ret;
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun err_mfd:
285*4882a593Smuzhiyun mfd_remove_devices(max77693->dev);
286*4882a593Smuzhiyun err_intsrc:
287*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_muic);
288*4882a593Smuzhiyun err_irq_muic:
289*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_chg);
290*4882a593Smuzhiyun err_irq_charger:
291*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_topsys);
292*4882a593Smuzhiyun err_irq_topsys:
293*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_led);
294*4882a593Smuzhiyun err_regmap:
295*4882a593Smuzhiyun i2c_unregister_device(max77693->i2c_haptic);
296*4882a593Smuzhiyun err_i2c_haptic:
297*4882a593Smuzhiyun i2c_unregister_device(max77693->i2c_muic);
298*4882a593Smuzhiyun return ret;
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
max77693_i2c_remove(struct i2c_client * i2c)301*4882a593Smuzhiyun static int max77693_i2c_remove(struct i2c_client *i2c)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct max77693_dev *max77693 = i2c_get_clientdata(i2c);
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun mfd_remove_devices(max77693->dev);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_muic);
308*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_chg);
309*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_topsys);
310*4882a593Smuzhiyun regmap_del_irq_chip(max77693->irq, max77693->irq_data_led);
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun i2c_unregister_device(max77693->i2c_muic);
313*4882a593Smuzhiyun i2c_unregister_device(max77693->i2c_haptic);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun return 0;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun static const struct i2c_device_id max77693_i2c_id[] = {
319*4882a593Smuzhiyun { "max77693", TYPE_MAX77693 },
320*4882a593Smuzhiyun { }
321*4882a593Smuzhiyun };
322*4882a593Smuzhiyun MODULE_DEVICE_TABLE(i2c, max77693_i2c_id);
323*4882a593Smuzhiyun
max77693_suspend(struct device * dev)324*4882a593Smuzhiyun static int max77693_suspend(struct device *dev)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
327*4882a593Smuzhiyun struct max77693_dev *max77693 = i2c_get_clientdata(i2c);
328*4882a593Smuzhiyun
329*4882a593Smuzhiyun if (device_may_wakeup(dev)) {
330*4882a593Smuzhiyun enable_irq_wake(max77693->irq);
331*4882a593Smuzhiyun disable_irq(max77693->irq);
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun return 0;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
max77693_resume(struct device * dev)337*4882a593Smuzhiyun static int max77693_resume(struct device *dev)
338*4882a593Smuzhiyun {
339*4882a593Smuzhiyun struct i2c_client *i2c = to_i2c_client(dev);
340*4882a593Smuzhiyun struct max77693_dev *max77693 = i2c_get_clientdata(i2c);
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun if (device_may_wakeup(dev)) {
343*4882a593Smuzhiyun disable_irq_wake(max77693->irq);
344*4882a593Smuzhiyun enable_irq(max77693->irq);
345*4882a593Smuzhiyun }
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun return 0;
348*4882a593Smuzhiyun }
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun static const struct dev_pm_ops max77693_pm = {
351*4882a593Smuzhiyun .suspend = max77693_suspend,
352*4882a593Smuzhiyun .resume = max77693_resume,
353*4882a593Smuzhiyun };
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun #ifdef CONFIG_OF
356*4882a593Smuzhiyun static const struct of_device_id max77693_dt_match[] = {
357*4882a593Smuzhiyun { .compatible = "maxim,max77693" },
358*4882a593Smuzhiyun {},
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, max77693_dt_match);
361*4882a593Smuzhiyun #endif
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun static struct i2c_driver max77693_i2c_driver = {
364*4882a593Smuzhiyun .driver = {
365*4882a593Smuzhiyun .name = "max77693",
366*4882a593Smuzhiyun .pm = &max77693_pm,
367*4882a593Smuzhiyun .of_match_table = of_match_ptr(max77693_dt_match),
368*4882a593Smuzhiyun },
369*4882a593Smuzhiyun .probe = max77693_i2c_probe,
370*4882a593Smuzhiyun .remove = max77693_i2c_remove,
371*4882a593Smuzhiyun .id_table = max77693_i2c_id,
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun module_i2c_driver(max77693_i2c_driver);
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun MODULE_DESCRIPTION("MAXIM 77693 multi-function core driver");
377*4882a593Smuzhiyun MODULE_AUTHOR("SangYoung, Son <hello.son@samsung.com>");
378*4882a593Smuzhiyun MODULE_LICENSE("GPL");
379